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1. 发明授权

US07352035B1 Flash memory devices and methods for fabricating flash memory devices 失效
标题翻译：闪存设备和制造闪存设备的方法
公开(公告)号：US07352035B1
公开(公告)日：2008-04-01
申请号：US11700084
申请日：2007-01-31
申请人： Jai-Hyuk Song , Jeong-Hyuk Choi , Ok-Cheon Hong
发明人： Jai-Hyuk Song , Jeong-Hyuk Choi , Ok-Cheon Hong
IPC分类号： H01L29/788 , H01L21/8239 , G11C16/02
CPC分类号： H01L29/66833 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11568 , H01L29/66825 , H01L29/7881 , H01L29/792
摘要： A flash memory device includes a cell string having a plurality of cell transistors connected in series, and a string selection transistor and a ground selection transistor connected to both ends of the cell string, respectively, wherein the cell transistor has a channel impurity concentration higher than a channel impurity concentration of at least one of the string selection transistor and the ground selection transistor.
摘要翻译：一种闪速存储器件，包括串联有多个单元晶体管的单元串，以及串联选择晶体管和接地选择晶体管，分别连接到单元串的两端，其中单元晶体管的沟道杂质浓度高于串选择晶体管和接地选择晶体管中的至少一个的沟道杂质浓度。

2. 发明授权

US09087734B2 Non-volatile memory devices with non-uniform floating gate coupling 有权
标题翻译：具有非均匀浮栅耦合的非易失性存储器件
公开(公告)号：US09087734B2
公开(公告)日：2015-07-21
申请号：US13158990
申请日：2011-06-13
申请人： Joon-Sung Lim , Jong-Ho Park , Ok-Cheon Hong , Ji-Hwan Jeon
发明人： Joon-Sung Lim , Jong-Ho Park , Ok-Cheon Hong , Ji-Hwan Jeon
IPC分类号： H01L29/788 , H01L29/66 , G11C11/34 , H01L27/115
CPC分类号： H01L27/11521 , H01L27/11519
摘要： A memory device includes a substrate having an active region defined therein that extends linearly along a first direction. The device also includes a select line on the substrate and extending along a second direction to perpendicularly cross the active region, first and second floating gate patterns on the active region and spaced apart along the first direction, and first and second dielectric patterns on respective ones of the first and second floating gate patterns. The device further includes first and second word lines on respective ones of the first and second dielectric patterns and extending in parallel with the select line along the first direction. A first area of overlap of the first word line with the first floating gate pattern and the first dielectric pattern is less than a second area of overlap of the second word line with the second floating gate pattern and the second dielectric pattern. The first word line may be disposed between the select line and the second word line.
摘要翻译：存储器件包括其中限定在其中的有源区域沿着第一方向线性延伸的衬底。该器件还包括在衬底上的选择线，并沿着第二方向延伸以垂直地穿过有源区，有源区上的第一和第二浮动栅极图案并沿着第一方向间隔开，并且在相应的一个上分开的第一和第二电介质图案的第一和第二浮栅图案。该装置还包括在第一和第二电介质图案的相应的第一和第二字线上并沿着第一方向与选择线平行延伸的第一和第二字线。第一字线与第一浮栅图案和第一介电图案的重叠的第一区域小于第二字线与第二浮栅图案和第二介质图案的第二重叠区域。第一字线可以设置在选择线和第二字线之间。

3. 发明申请

US20110303962A1 NON-VOLATILE MEMORY DEVICES WITH NON-UNIFORM FLOATING GATE COUPLING 有权
标题翻译：具有非均匀浮动门耦合的非易失性存储器件
公开(公告)号：US20110303962A1
公开(公告)日：2011-12-15
申请号：US13158990
申请日：2011-06-13
申请人： Joon-Sung Lim , Jong-Ho Park , Ok-Cheon Hong , Ji-Hwan Jeon
发明人： Joon-Sung Lim , Jong-Ho Park , Ok-Cheon Hong , Ji-Hwan Jeon
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , H01L27/11519
摘要： A memory device includes a substrate having an active region defined therein that extends linearly along a first direction. The device also includes a select line on the substrate and extending along a second direction to perpendicularly cross the active region, first and second floating gate patterns on the active region and spaced apart along the first direction, and first and second dielectric patterns on respective ones of the first and second floating gate patterns. The device further includes first and second word lines on respective ones of the first and second dielectric patterns and extending in parallel with the select line along the first direction. A first area of overlap of the first word line with the first floating gate pattern and the first dielectric pattern is less than a second area of overlap of the second word line with the second floating gate pattern and the second dielectric pattern. The first word line may be disposed between the select line and the second word line.
摘要翻译：存储器件包括其中限定在其中的有源区域沿着第一方向线性延伸的衬底。该器件还包括在衬底上的选择线，并沿着第二方向延伸以垂直地穿过有源区，有源区上的第一和第二浮动栅极图案并沿着第一方向间隔开，并且在相应的一个上分开的第一和第二电介质图案的第一和第二浮栅图案。该装置还包括在第一和第二电介质图案的相应的第一和第二字线上并沿着第一方向与选择线平行延伸的第一和第二字线。第一字线与第一浮栅图案和第一介电图案的重叠的第一区域小于第二字线与第二浮栅图案和第二介质图案的第二重叠区域。第一字线可以设置在选择线和第二字线之间。

4. 发明申请

US20080093651A1 FLASH MEMORY DEVICES AND METHODS FOR FABRICATING FLASH MEMORY DEVICES 失效
标题翻译：闪速存储器件和用于制造闪速存储器件的方法
公开(公告)号：US20080093651A1
公开(公告)日：2008-04-24
申请号：US11700084
申请日：2007-01-31
申请人： Jai-Hyuk Song , Jeong-Hyuk Choi , Ok-Cheon Hong
发明人： Jai-Hyuk Song , Jeong-Hyuk Choi , Ok-Cheon Hong
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/66833 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11568 , H01L29/66825 , H01L29/7881 , H01L29/792
摘要： A flash memory device includes a cell string having a plurality of cell transistors connected in series, and a string selection transistor and a ground selection transistor connected to both ends of the cell string, respectively, wherein the cell transistor has a channel impurity concentration higher than a channel impurity concentration of at least one of the string selection transistor and the ground selection transistor.
摘要翻译：一种闪速存储器件，包括串联有多个单元晶体管的单元串，以及串联选择晶体管和接地选择晶体管，分别连接到单元串的两端，其中单元晶体管的沟道杂质浓度高于串选择晶体管和接地选择晶体管中的至少一个的沟道杂质浓度。

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