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1. 发明授权

US06707682B2 Low-EMI electronic apparatus, low-EMI circuit board, and method of manufacturing the low-EMI circuit board 失效
标题翻译：低EMI电子设备，低EMI电路板以及制造低EMI电路板的方法
公开(公告)号：US06707682B2
公开(公告)日：2004-03-16
申请号：US09956909
申请日：2001-09-21
申请人： Yutaka Akiba , Yasunori Narizuka , Hirayoshi Tanei , Naoya Kitamura
发明人： Yutaka Akiba , Yasunori Narizuka , Hirayoshi Tanei , Naoya Kitamura
IPC分类号： H05K118
CPC分类号： H05K1/0246 , H01L23/5383 , H01L23/552 , H01L25/16 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/16152 , H01L2924/19105 , H01L2924/19106 , H01L2924/3011 , H01L2924/3025 , H05K1/0227 , H05K1/0231 , H05K1/0234 , H05K1/092 , H05K1/113 , H05K1/115 , H05K1/162 , H05K1/167 , H05K3/403 , H05K3/4053 , H05K3/429 , H05K3/4611 , H05K3/4614 , H05K3/4652 , H05K3/467 , H05K9/0039 , H05K2201/0209 , H05K2201/0715 , H05K2201/093 , H05K2201/09309 , H05K2201/09354 , H05K2201/09509 , H05K2201/09518 , H05K2201/09563 , H05K2201/09663 , H05K2201/0979 , H05K2201/10022 , H05K2201/10045 , H05K2201/10446 , H05K2201/10636 , H05K2201/10689 , Y02P70/611 , Y10T29/49155 , H01L2224/0401
摘要： A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation of a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.
摘要翻译：通过将电源层的电位波动相对于在切换IC器件等而发生的接地层的电位波动转换为基底中的焦耳热而不使用任何部件作为对策来实现高安装密度的低EMI电路针对EMI。还公开了其结构，使用它的电路板以及制造电路板的方法。从电源层和接地层观察的固体层之间的杂散电容的Q值的平行板线等效地减少，并且通过形成其中电阻器（电阻层）和另一接地层的结构匹配地终止除了在多层电路板上的电源层和接地层之外提供。还公开了封闭的屏蔽结构。

2. 发明授权

US5388328A Process for fabricating an interconnected multilayer board 失效
标题翻译：用于制造互连的多层板的工艺
公开(公告)号：US5388328A
公开(公告)日：1995-02-14
申请号：US187546
申请日：1994-01-28
申请人： Hitoshi Yokono , Hideo Arima , Takashi Inoue , Naoya Kitamura , Haruhiko Matsuyama , Hitoshi Oka , Fumio Kataoka , Fusaji Shoji , Hideyasu Murooka , Masayuki Kyooi
发明人： Hitoshi Yokono , Hideo Arima , Takashi Inoue , Naoya Kitamura , Haruhiko Matsuyama , Hitoshi Oka , Fumio Kataoka , Fusaji Shoji , Hideyasu Murooka , Masayuki Kyooi
IPC分类号： H01L21/48 , H01L27/01 , H05K3/10 , H05K3/24 , H05K3/46
CPC分类号： H01L21/4857 , H05K3/4647 , H01L2224/1147 , H01L2224/16 , H01L2224/73253 , H01L2924/01014 , H01L2924/01019 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/15312 , H01L2924/16152 , H01L2924/3025 , H05K2203/0733 , H05K2203/0769 , H05K3/108 , H05K3/243 , Y10S428/901 , Y10T29/49126 , Y10T29/49165
摘要： A process for the fabrication of an interconnected multilayer board involves the steps of forming a metallic under-conductive layer on a base substrate, forming a windowed resist layer on the metallic under-conductive layer, filling windows of the resist layer with a conductor by plating thereby forming a conductor layer, forming another windowed resist layer on the conductor layer and filling windows of this resist layer with a conductor by plating, thereby forming a via-hole layer and to provide a two-level structure of the conductor layer and the via-hole layer. Thereafter, the resist layers and portions of the metallic under-conductor layer other than those in contact with a lower face of the conductor constituting the conductor layer are dissolved to form a two-level skeleton structure of conductor lines and spaces within the skeleton structure are filled with a varnish in a solventless form and the varnish is cured.
摘要翻译：制造相互连接的多层板的方法包括以下步骤：在基底基板上形成金属导电层，在金属下导电层上形成窗口化抗蚀剂层，用导体用电镀填充抗蚀剂层的窗口从而形成导体层，在导体层上形成另一个窗口化的抗蚀剂层，并通过电镀用导体填充该抗蚀剂层的窗口，从而形成通孔层，并提供导体层和通孔的两层结构井层。此后，除了与形成导体层的导体的下表面接触的金属下导体层的抗蚀剂层和部分被溶解以形成骨架结构内的导体线和空间的两级骨架结构填充无溶剂形式的清漆，并且清漆被固化。

3. 发明授权

US06506982B1 Multi-layer wiring substrate and manufacturing method thereof 失效
公开(公告)号：US06506982B1
公开(公告)日：2003-01-14
申请号：US09501596
申请日：2000-02-10
申请人： Hidetaka Shigi , Naoya Kitamura , Masashi Nishiki , Tetsuya Yamazaki , Takehiko Hasebe , Masayuki Kyooi , Yukio Maeda
发明人： Hidetaka Shigi , Naoya Kitamura , Masashi Nishiki , Tetsuya Yamazaki , Takehiko Hasebe , Masayuki Kyooi , Yukio Maeda
IPC分类号： H05K111
CPC分类号： H05K3/403 , H01L2224/16237 , H05K1/056 , H05K3/045 , H05K3/42 , H05K3/445 , H05K3/4608 , H05K2201/09636 , H05K2201/09645 , H05K2201/09809 , H05K2201/09854
摘要： A multi-layer wiring substrate capable of high density packaging, and a method of manufacturing the same, in which a carrier substrate, in which through holes can be easily formed in high density corresponding substantially to a pitch of connecting terminals in a semiconductor chip, and build-up layers are formed on the substrate with the application of a conventional build-up technique. When the build-up technique for repeatedly forming insulating layers and wiring layers on a carrier substrate is used to manufacture a multi-layer wiring substrate, the carrier substrate is formed in the following manner. First, an insulating resin layer is formed in a copper foil, in which a plurality of first windows are regularly provided, to cover the copper foil, and the resin layer fills the interior of the windows. Subsequently, second windows of a particular shape are provided in regions of layers of the insulating resin filled in the windows, and independent conducting paths are formed through the second windows to extend from front sides of the second windows to back sides thereof. The conducting paths are formed radially to be spaced a substantially equal distance from centers of the respective second windows.

4. 发明授权

US06353540B1 Low-EMI electronic apparatus, low-EMI circuit board, and method of manufacturing the low-EMI circuit board. 失效
标题翻译：低EMI电子设备，低EMI电路板以及制造低EMI电路板的方法。
公开(公告)号：US06353540B1
公开(公告)日：2002-03-05
申请号：US08860181
申请日：1997-07-10
申请人： Yutaka Akiba , Yasunori Narizuka , Hirayoshi Tanei , Naoya Kitamura
发明人： Yutaka Akiba , Yasunori Narizuka , Hirayoshi Tanei , Naoya Kitamura
IPC分类号： H05K116
CPC分类号： H05K1/0246 , H01L23/5383 , H01L23/552 , H01L25/16 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/16152 , H01L2924/19105 , H01L2924/19106 , H01L2924/3011 , H01L2924/3025 , H05K1/0227 , H05K1/0231 , H05K1/0234 , H05K1/092 , H05K1/113 , H05K1/115 , H05K1/162 , H05K1/167 , H05K3/403 , H05K3/4053 , H05K3/429 , H05K3/4611 , H05K3/4614 , H05K3/4652 , H05K3/467 , H05K9/0039 , H05K2201/0209 , H05K2201/0715 , H05K2201/093 , H05K2201/09309 , H05K2201/09354 , H05K2201/09509 , H05K2201/09518 , H05K2201/09563 , H05K2201/09663 , H05K2201/0979 , H05K2201/10022 , H05K2201/10045 , H05K2201/10446 , H05K2201/10636 , H05K2201/10689 , Y02P70/611 , Y10T29/49155 , H01L2224/0401
摘要： A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation off a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed. This invention can remarkably suppress unwanted radiation by absorbing the potential fluctuation (resonance) which occurs in a power supply loop by equivalently reducing the Q-value of the stray capacitance, absorbing the standing wave by the parallel plate lines matchedly terminated and, closing and shielding the parallel plate lines.
摘要翻译：一种低EMI电路，其通过将电源层上的电位波动相对于在切换IC器件等而发生的接地层的电位变化转换为基底中的焦耳热，而不使用任何部件作为对策来实现高安装密度针对EMI。还公开了其结构，使用它的电路板以及制造电路板的方法。从电源层和接地层观察的固体层之间的杂散电容的Q值的平行板线等效地减少，并且通过形成其中电阻器（电阻层）和另一接地层的结构匹配地终止除了在多层电路板上的电源层和接地层之外提供。还公开了封闭的屏蔽结构。本发明通过吸收电源回路中发生的电位波动（谐振）可以显着地抑制不期望的辐射，通过等效地降低杂散电容的Q值，吸收平行板线匹配终止的驻波，闭合屏蔽平行板线。

5. 发明授权

US5480048A Multilayer wiring board fabricating method 失效
标题翻译：多层布线板制造方法
公开(公告)号：US5480048A
公开(公告)日：1996-01-02
申请号：US113983
申请日：1993-08-30
申请人： Naoya Kitamura , Hisashi Sugiyama , Yoshihide Yamaguchi , Masayuki Kyoui , Hideyasu Murooka , Ryoji Iwamura , Makio Watanabe
发明人： Naoya Kitamura , Hisashi Sugiyama , Yoshihide Yamaguchi , Masayuki Kyoui , Hideyasu Murooka , Ryoji Iwamura , Makio Watanabe
IPC分类号： H01L21/48 , H05K3/10 , H05K3/24 , H05K3/42 , H05K3/46 , B44C1/22 , B29C37/00
CPC分类号： H01L21/4857 , H05K3/4647 , H05K2203/066 , H05K2203/0733 , H05K2203/1189 , H05K3/108 , H05K3/243 , H05K3/427 , H05K3/4602
摘要： A multilayer wiring board fabricating method and a multilayer wiring board fabricated with use of the method that a solvent-free fluid polymer precursor is put on a wiring layer of a base substrate, and space among the wirings is exhausted and is filled with the precursor, and the precursor is hardened under a hydrostatic pressure and then the next wiring layer is formed before the above process is repeated one or more times. The multilayer wiring board fabricating method is excellent in the mass productivity and low cost and in that the wiring can be made highly dense with the substrate having vertical via conductors for connection among the conductor layers.
摘要翻译：使用将无溶剂的流体聚合物前体放在基底基板的布线层上的方法制造的多层布线板制造方法和多层布线板，并且布线之间的空间被排出并填充有前体，并且在静水压力下将前体硬化，然后在上述过程重复一次或多次之前形成下一个布线层。多层布线板的制造方法在质量生产率和低成本方面都是优异的，并且通过具有用于连接导体层之间的垂直通孔导体的基板，可以使布线高密度化。

6. 发明授权

US5393406A Method of producing a thin film multilayer wiring board 失效
标题翻译：薄膜多层布线板的制造方法
公开(公告)号：US5393406A
公开(公告)日：1995-02-28
申请号：US845942
申请日：1992-03-04
申请人： Hitoshi Yokono , Hideo Arima , Takashi Inoue , Naoya Kitamura
发明人： Hitoshi Yokono , Hideo Arima , Takashi Inoue , Naoya Kitamura
IPC分类号： H05K3/10 , H01L21/48 , H05K3/20 , H05K3/42 , H05K3/46 , C25D5/02
CPC分类号： H01L21/4857 , H05K3/423 , H05K3/465 , H05K3/4682 , H01L2224/16 , H01L2224/16235 , H01L2224/73253 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/15312 , H01L2924/16152 , H01L2924/3511 , H05K2201/09881 , H05K2203/0723 , H05K2203/0733 , H05K2203/0769 , H05K3/107 , H05K3/108 , H05K3/205
摘要： A thin film multilayer wiring board-producing method of the present invention is intended to decrease thermal stresses developing during the formation of the multilayer construction, and also to greatly reduce the number of the steps of the process, as compared with a conventional method. A film material can be used as an insulating film of the multilayer wiring board, and is adhesively bonded to a predetermined portion. Wiring conductors are formed by electroplating. The wiring layers are repeated laminated to form the multilayer construction. A metallic film serving as an electrode is formed on one of upper and lower surfaces of a substrate, the metallic film being removed after a multilayer wiring is formed. A soluble insulating film is formed on a metallic undercoat film on the substrate, and grooves are formed in the soluble insulating film, and wiring conductors are formed in the grooves, using either electroplating or both electroplating and electroless plating. Thereafter, the soluble insulating film and the metallic undercoat film are removed. Subsequently, an insoluble insulating film is formed at those locations from which the soluble insulating film and the metallic undercoat have been removed.
摘要翻译：本发明的薄膜多层布线板的制造方法，与以往的方法相比，旨在降低在形成多层结构时的热应力发展，并且大大减少了工艺步骤的数量。膜材料可以用作多层布线板的绝缘膜，并且粘合到预定部分。接线导体通过电镀形成。重复层压布线层以形成多层结构。用作电极的金属膜形成在基板的上表面和下表面之一上，金属膜在形成多层布线之后被去除。在基板上的金属底涂层上形成可溶性绝缘膜，并且在可溶性绝缘膜中形成槽，并且使用电镀或电镀或无电镀两者在沟槽中形成布线导体。然后，除去可溶性绝缘膜和金属底涂膜。随后，在去除可溶性绝缘膜和金属底涂层的那些位置处形成不溶性绝缘膜。

7. 发明授权

US06404205B1 Method for testing the reliability of an electrochemical gas sensor 有权
标题翻译：测试电化学气体传感器可靠性的方法
公开(公告)号：US06404205B1
公开(公告)日：2002-06-11
申请号：US09530906
申请日：2000-05-08
申请人： Naoya Kitamura
发明人： Naoya Kitamura
IPC分类号： G01N2762
CPC分类号： G01N27/4163 , G01N33/004 , G01N33/007
摘要： The present invention is a method by which the deterioration judgement and the correction of an electrochemical carbon monoxide gas sensor are simply carried out without using the correction gas. The method of the present invention is that: the voltage is applied from the outside so that the working electrode of the electrochemical carbon monoxide gas sensor is operated as the negative electrode, and the counter electrode is operated as the positive electrode, and hydrogen is generated from the working electrode, and oxygen is generated from the counter electrode; after that, the potential of the working electrode and the counter electrode is returned to the operation potential as the sensor; and by using the reaction on the hydrogen remained in the vicinity of the working electrode, the sensor current is generated, thereby, it is tested whether the sensor is normally operated.
摘要翻译：本发明是简单地进行电化学一氧化碳气体传感器的劣化判断和校正而不使用校正气体的方法。本发明的方法是：从外部施加电压，使电化学一氧化碳气体传感器的工作电极作为负极动作，对电极作为正极动作，产生氢气从工作电极产生氧，并从对电极产生氧气; 此后，工作电极和对电极的电位作为传感器返回到操作电位; 并且通过对残留在工作电极附近的氢气进行反应，产生传感器电流，由此测试传感器是否正常工作。

8. 发明授权

US5300735A Interconnected multilayer boards and fabrication processes thereof 失效
标题翻译：互连多层板及其制造工艺
公开(公告)号：US5300735A
公开(公告)日：1994-04-05
申请号：US37543
申请日：1993-03-22
申请人： Hitoshi Yokono , Hideo Arima , Takashi Inoue , Naoya Kitamura , Haruhiko Matsuyama , Hitoshi Oka , Fumio Kataoka , Fusaji Shoji , Hideyasu Murooka , Masayuki Kyooi
发明人： Hitoshi Yokono , Hideo Arima , Takashi Inoue , Naoya Kitamura , Haruhiko Matsuyama , Hitoshi Oka , Fumio Kataoka , Fusaji Shoji , Hideyasu Murooka , Masayuki Kyooi
IPC分类号： H01L21/48 , H01L27/01 , H05K3/10 , H05K3/24 , H05K3/46 , H05K1/00
CPC分类号： H01L21/4857 , H05K3/4647 , H01L2224/1147 , H01L2224/16 , H01L2224/73253 , H01L2924/01014 , H01L2924/01019 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/15312 , H01L2924/16152 , H01L2924/3025 , H05K2203/0733 , H05K2203/0769 , H05K3/108 , H05K3/243 , Y10S428/901 , Y10T29/49126 , Y10T29/49165
摘要： Described herein are interconnected mutilayer boards and their fabrication processes. Multilayer conductor lines of a skeleton structure are formed by conducting multilayer metallization while including all resist layers and metallic under-conductive layers and then removing the resist layers and metallic under-conductive layers at once. Spaces between the multilayer conductor lines of the skeleton structure are then filled with a solventless varnish so that insulating layers are formed. Modules making use of such interconnected multilayer boards and computers having such modules are also described.
摘要翻译：这里描述了互连的多层板及其制造工艺。骨架结构的多层导体线通过导电多层金属化而形成，同时包括所有的抗蚀剂层和金属的低导电层，然后立即去除抗蚀剂层和金属的不良导电层。然后用无溶剂清漆填充骨架结构的多层导体线之间的空隙，从而形成绝缘层。还描述了使用这种互连的多层板的模块和具有这种模块的计算机。

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