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1. 发明授权

US08724349B2 Apparatus and method for output voltage calibration of a primary feedback flyback power module 有权
标题翻译：主反馈反激式功率模块的输出电压校准装置和方法
公开(公告)号：US08724349B2
公开(公告)日：2014-05-13
申请号：US13173417
申请日：2011-06-30
申请人： Chien-Fu Tang , Isaac Y. Chen , Liang-Pin Tai
发明人： Chien-Fu Tang , Isaac Y. Chen , Liang-Pin Tai
IPC分类号： H02M3/335
CPC分类号： H02M3/33515
摘要： An apparatus and method for output voltage calibration of a primary feedback flyback power module extract the difference between the output voltage of the power module and a target value, and according thereto, calibrate a reference voltage which is used in regulation of the output voltage, to thereby calibrate the output voltage to be the target value.
摘要翻译：用于主反馈反激功率模块的输出电压校准的装置和方法提取功率模块的输出电压与目标值之间的差异，并且根据该装置和方法校准用于调节输出电压的参考电压，从而将输出电压校准为目标值。

2. 发明授权

US08063617B2 Quick response width modulation for a voltage regulator 有权
标题翻译：电压调节器的快速响应宽度调制
公开(公告)号：US08063617B2
公开(公告)日：2011-11-22
申请号：US12382017
申请日：2009-03-06
申请人： Ting-Hung Wang , Chia-Jung Lee , Liang-Pin Tai
发明人： Ting-Hung Wang , Chia-Jung Lee , Liang-Pin Tai
IPC分类号： G05F1/00
CPC分类号： H02M3/1584 , H02M2003/1566
摘要： A per-phase quick response generation circuit generates a quick response signal to determine a quick response pulse to be inserted into a pulse width modulation signal of the corresponding phase. The quick response pulse will force the upper power switch of the corresponding phase on to increase the current supply ability during load transition. A multi-phase voltage regulator with the quick response generation circuit can have different quick response pulse widths for the interleaved phases, so as to decrease the current imbalance period of the voltage regulator after load transition.
摘要翻译：每相快速响应发生电路产生快速响应信号以确定要插入相应相位的脉宽调制信号的快速响应脉冲。快速响应脉冲将强制相应相位的上电源开关增加负载转换期间的电流供应能力。具有快速响应发生电路的多相电压调节器可以对交错相位具有不同的快速响应脉冲宽度，从而减小负载转换后电压调节器的电流不平衡周期。

3. 发明授权

US08040122B2 Duty feed forward method and apparatus for modulating a duty of a PWM signal and power converting method and power converter using the same 有权
标题翻译：用于调制PWM信号的占空比的负载前馈方法和装置以及使用其的功率转换方法和功率转换器
公开(公告)号：US08040122B2
公开(公告)日：2011-10-18
申请号：US11849629
申请日：2007-09-04
申请人： Tsai-Fu Chang , Liang-Pin Tai
发明人： Tsai-Fu Chang , Liang-Pin Tai
IPC分类号： G05F1/40
CPC分类号： H03K7/08
摘要： The duty of a PWM signal in a power converter is extracted to feed forward to modulate the slope of a linear oscillating ramp signal or the voltage level of an error signal, so as to modulate the duty of the PWM signal, by which the transient response of the power converter and the stability of the PWM loop both are improved.
摘要翻译：提取功率转换器中的PWM信号的占空比以前馈以调制线性振荡斜坡信号的斜率或误差信号的电压电平，以便调制PWM信号的占空比，由此瞬态响应的功率转换器和PWM环路的稳定性都得到了改善。

4. 发明授权

US08031493B2 Method and apparatus for improving the light load efficiency of a switching mode converter 有权
标题翻译：用于提高开关模式转换器的轻负载效率的方法和装置
公开(公告)号：US08031493B2
公开(公告)日：2011-10-04
申请号：US12155771
申请日：2008-06-10
申请人： Pei-Lun Huang , Liang-Pin Tai
发明人： Pei-Lun Huang , Liang-Pin Tai
IPC分类号： H02M3/335
CPC分类号： H02M3/33507
摘要： A method and apparatus are provided for a switching mode converter to improve the light load efficiency thereof. The converter is thus operated with three modes by monitoring a feedback signal and a supply voltage. When the feedback signal indicates that loading gets light enough, the converter is switched from the first mode to the second mode, and during the second mode some cycles are skipped. If loading is too light, the converter is switched from the second mode to the third mode, and during the third mode more cycles will be skipped.
摘要翻译：提供了一种用于开关模式转换器以提高其轻负载效率的方法和装置。因此，通过监视反馈信号和电源电压，转换器通过三种模式运行。当反馈信号指示负载变得足够亮时，转换器从第一模式切换到第二模式，并且在第二模式期间，跳过一些周期。如果负载太轻，则转换器从第二模式切换到第三模式，而在第三模式期间，将跳过更多的周期。

5. 发明授权

US07838900B2 Single-chip common-drain JFET device and its applications 失效
标题翻译：单片共漏极JFET器件及其应用
公开(公告)号：US07838900B2
公开(公告)日：2010-11-23
申请号：US12385718
申请日：2009-04-17
申请人： Liang-Pin Tai , Jing-Meng Liu , Hung-Der Su
发明人： Liang-Pin Tai , Jing-Meng Liu , Hung-Der Su
IPC分类号： H01L29/74 , H01L31/111
CPC分类号： H01L27/098 , H01L27/0744 , H01L29/7722 , H01L29/8083
摘要： A single-chip common-drain JFET device comprises a Drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.
摘要翻译：单芯片公共漏极JFET器件包括漏极，两个栅极和两个源极，使得与其形成两个公共漏极JFET。由于在单个芯片内合并的两个JFET，其间不需要引线接合连接，因此没有由接合线引起的寄生电感和电阻，因此提高性能并降低封装成本。单片式公共漏极JFET器件可以应用于降压转换器，升压转换器，反相转换器，开关和两级DC-DC转换器，以提高其性能和效率。还提供了用于电流感测或比例电流产生的替代单芯片公共漏极JFET器件。

6. 发明授权

US07834606B2 Control circuit and method for a constant on-time PWM switching converter 有权
标题翻译：恒定导通时间PWM开关转换器的控制电路和方法
公开(公告)号：US07834606B2
公开(公告)日：2010-11-16
申请号：US11882485
申请日：2007-08-02
申请人： Kuo-Ping Liu , Ko-Cheng Wang , Liang-Pin Tai , Chung-Sheng Cheng
发明人： Kuo-Ping Liu , Ko-Cheng Wang , Liang-Pin Tai , Chung-Sheng Cheng
IPC分类号： G05F1/00
CPC分类号： H02M3/157 , H02M2001/0048 , Y02B70/1491
摘要： A control circuit provides a control signal for a constant on-time PWM switching converter to produce an output voltage, such that the converter operates with a constant on-time at a first state and operates with a variable on-time at a second state, so as to decrease the switching frequency and thereby the switching loss, to increase the efficiency of the converter, to improve the transient response, and to reduce the recovery time of the output voltage.
摘要翻译：控制电路提供用于恒定导通时间PWM开关转换器的控制信号以产生输出电压，使得转换器在第一状态下以恒定导通时间工作，并且在第二状态下以可变导通时间操作，从而降低开关频率，从而降低开关损耗，提高转换器的效率，改善瞬态响应，并减少输出电压的恢复时间。

7. 发明授权

US07781921B2 Voltage regulator and method for generating indicator signal in voltage regulator 有权
标题翻译：用于在稳压器中产生指示信号的电压调节器和方法
公开(公告)号：US07781921B2
公开(公告)日：2010-08-24
申请号：US12287363
申请日：2008-10-08
申请人： Chien-Hui Wang , Jian-Rong Huang , Kuo-Lung Tseng , Liang-Pin Tai
发明人： Chien-Hui Wang , Jian-Rong Huang , Kuo-Lung Tseng , Liang-Pin Tai
IPC分类号： G01R1/20 , G06F1/00
CPC分类号： H02M3/1588 , H02M1/08 , Y02B70/1466
摘要： The subject matter is a voltage regulator capable of providing an indicator signal to a load, so that the load can operation under the best current-voltage relationship according to the indicator signal. To this end, the voltage regulator includes an amplifier for generating the indicator signal by amplifying a difference between a signal representative of an output voltage and a signal representative of a reference voltage.
摘要翻译：主题是能够向负载提供指示信号的电压调节器，使得负载可以根据指示符信号在最佳电流 - 电压关系下操作。为此，电压调节器包括放大器，用于通过放大表示输出电压的信号和表示参考电压的信号之间的差来产生指示符信号。

8. 发明申请

US20090201079A1 Single-chip common-drain JFET device and its applications 有权
公开(公告)号：US20090201079A1
公开(公告)日：2009-08-13
申请号：US12385720
申请日：2009-04-17
申请人： Liang-Pin Tai , Jing-Meng Liu , Hung-Der Su
发明人： Liang-Pin Tai , Jing-Meng Liu , Hung-Der Su
IPC分类号： G05F3/02
CPC分类号： H01L27/098 , H01L27/0744 , H01L29/7722 , H01L29/8083
摘要： A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

9. 发明申请

US20090041266A1 Electrostatic loudspeaker driver 审中-公开
标题翻译：静电扬声器驱动
公开(公告)号：US20090041266A1
公开(公告)日：2009-02-12
申请号：US12222396
申请日：2008-08-08
申请人： Jwin-Yen Guo , Liang-Pin Tai , Shao-Ming Chang
发明人： Jwin-Yen Guo , Liang-Pin Tai , Shao-Ming Chang
IPC分类号： H03G5/16
CPC分类号： H03F3/217
摘要： An electrostatic loudspeaker driver includes a class-D amplifier and a demodulator circuit. The class-D amplifier is operated with a PWM signal, creating an amplified digital signal according to an input signal. A low-pass filter in the demodulator circuit filters out the PWM carrier frequency in the digital signal and retrieves an audio signal therefrom. The efficiency is improved significantly and heat sink is no longer needed.
摘要翻译：静电扬声器驱动器包括D类放大器和解调器电路。 D类放大器采用PWM信号工作，根据输入信号产生放大的数字信号。解调器电路中的低通滤波器滤除数字信号中的PWM载波频率并从中检索音频信号。效率显着提高，不再需要散热片。

10. 发明申请

US20090039856A1 Stability enhancement apparatus and method for a self-clocking PWM buck converter 审中-公开
标题翻译：用于自定时PWM降压转换器的稳定性增强装置和方法
公开(公告)号：US20090039856A1
公开(公告)日：2009-02-12
申请号：US11905196
申请日：2007-09-28
申请人： Ko-Cheng Wang , Liang-Pin Tai
发明人： Ko-Cheng Wang , Liang-Pin Tai
IPC分类号： G05F1/44 , G05F1/02
CPC分类号： H02M3/156 , H02M2001/0009
摘要： A DCR detecting circuit is parallel connected to the inductor of a self-clocking PWM buck converter which performs a trigger control of a PWM signal by an output feedback, to detect the current signal on the inductor to provide a large enough ripple to be combined into the output feedback, so as to enhance the system stability, while remains the small output ripple, without additional power loss.
摘要翻译： DCR检测电路并联到自定时PWM降压转换器的电感器，其通过输出反馈执行PWM信号的触发控制，以检测电感器上的电流信号，以提供足够大的纹波以被组合输出反馈，从而提高系统的稳定性，同时保持小输出纹波，无需额外的功率损耗。

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