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1. 发明申请

US20090224787A1 PROBING APPARATUS FOR MEASURING ELECTRICAL PROPERTIES OF INTEGRATED CIRCUIT DEVICES ON SEMICONDUCTOR WAFER 审中-公开
标题翻译：用于测量半导体波形上集成电路器件的电气特性的探测器
公开(公告)号：US20090224787A1
公开(公告)日：2009-09-10
申请号：US12043111
申请日：2008-03-05
申请人： LI PENG CHANG , KUO YIN HUANG , JUNG CHUN LIN
发明人： LI PENG CHANG , KUO YIN HUANG , JUNG CHUN LIN
IPC分类号： G01R31/02
CPC分类号： G01R31/2891
摘要： A probing apparatus comprises a wafer chuck configured to receive a semiconductor wafer having a plurality of integrated circuit devices and test keys configured to monitor the fabrication quality of the integrated circuit devices, a carrier configured to receive a probe card having a plurality of probe needles configured to contact the test keys of the semiconductor wafer and collect electrical information of the integrated circuit devices, and an angular adjusting module configured to adjust the angle between the probe card and the semiconductor wafer by rotating the semiconductor wafer.
摘要翻译：探测装置包括晶片卡盘，其被配置为接收具有多个集成电路器件的半导体晶片和被配置为监视集成电路器件的制造质量的测试键，被配置为接收具有配置的多个探针的探针卡的载体接触半导体晶片的测试键并收集集成电路器件的电子信息;以及角度调节模块，其经配置以通过旋转半导体晶片来调节探针卡与半导体晶片之间的角度。

2. 发明申请

US20100001394A1 CHIP PACKAGE WITH ESD PROTECTION STRUCTURE 审中-公开
标题翻译：具有ESD保护结构的芯片封装
公开(公告)号：US20100001394A1
公开(公告)日：2010-01-07
申请号：US12167703
申请日：2008-07-03
申请人： LI PENG CHANG , JUNG CHUN LIN
发明人： LI PENG CHANG , JUNG CHUN LIN
IPC分类号： H01L23/04
CPC分类号： H01L23/60 , H01L2924/0002 , H01L2924/00
摘要： A chip package comprises a semiconductor chip, a plurality of pins coupled to the semiconductor chip, and a conductive structure configured to form an electrical connection between the pins, wherein the electrical connection is configured to be disabled as the chip package is inserted into a socket. Since the pins are electrically connected by the conductive structure, the surge current caused by an ESD event can be distributed to all pins rather than to a single pin as the ESD event occurs. Consequently, all ESD protection circuits connected to the pins can be used to dissipate the surge current during the ESD event, and the circuit damage caused by the ESD can be dramatically reduced.
摘要翻译：芯片封装包括半导体芯片，耦合到半导体芯片的多个引脚以及被配置为在引脚之间形成电连接的导电结构，其中电连接被配置为当芯片封装插入插座时被禁用。由于引脚通过导电结构电连接，因ESD事件发生时，由ESD事件引起的浪涌电流可分配给所有引脚而不是单引脚。因此，连接到引脚的所有ESD保护电路可用于在ESD事件期间耗散浪涌电流，并且可以显着降低由ESD引起的电路损坏。

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