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1. 发明授权

US6100164A Method of fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US6100164A
公开(公告)日：2000-08-08
申请号：US990720
申请日：1997-12-15
申请人： Kang-Sik Youn , Ki-Seog Youn , Ku-Chul Joung
发明人： Kang-Sik Youn , Ki-Seog Youn , Ku-Chul Joung
IPC分类号： H01L21/316 , H01L21/32 , H01L21/76
CPC分类号： H01L21/32
摘要： A semiconductor device and a method of fabricating the same are disclosed. The method includes the steps of forming an anti-oxidation layer on a substrate, forming an oxidizable layer on portions of the anti-oxidation layer to expose a portion of the anti-oxidation layer, varying a size of the exposed portion of the anti-oxidation layer by oxidizing at least a portion of the oxidizable layer, and forming a trench in the substrate according to the size of the exposed portion of the anti-oxidation layer. The semiconductor device includes an anti-oxidation layer formed on a substrate an oxidation layer formed on portions of the anti-oxidation layer by oxidizing at least a portion of an oxidizable layer, so as to define an isolation region of the semiconductor device, a trench formed in the substrate using the oxidation layer, and a field oxide layer formed in the trench.
摘要翻译：公开了一种半导体器件及其制造方法。该方法包括以下步骤：在基底上形成抗氧化层，在抗氧化层的部分上形成可氧化层，以暴露部分抗氧化层，改变抗氧化层的暴露部分的尺寸，通过氧化至少一部分可氧化层，以及根据抗氧化层的暴露部分的尺寸在衬底中形成沟槽。半导体器件包括通过氧化至少一部分可氧化层而形成在基底上的形成在抗氧化层的部分上的氧化层的抗氧化层，以便限定半导体器件的隔离区，沟槽使用氧化层在基板中形成，并且在沟槽中形成场氧化物层。

2. 发明授权

US06297084B1 Method for fabricating semiconductor memory 失效
标题翻译：半导体存储器的制造方法
公开(公告)号：US06297084B1
公开(公告)日：2001-10-02
申请号：US09383635
申请日：1999-08-26
申请人： Ku Chul Joung , Wouns Yang , Kun Sik Park
发明人： Ku Chul Joung , Wouns Yang , Kun Sik Park
IPC分类号： H01L218234
CPC分类号： H01L27/11526 , H01L27/0629 , H01L27/105 , H01L27/11546
摘要： A method for fabricating a semiconductor memory, in which a resistive layer is formed of a material identical to a material of a cell plug layer at a time of formation of the cell plug layer. In addition, a contact pad layer formed of a salicide layer on the cell plug layer is formed with an area larger than the plug layer for simplifying the fabrication process and securing an adequate fabrication allowance, including the steps of (1) forming metal gate electrodes on a semiconductor substrate inclusive of a cell region and a peripheral circuit region, (2) forming gate sidewalls at sides of the gate electrode layers on the cell region and forming a material layer for forming a plug on an entire surface, (3) patterning the material layer for forming a plug on the peripheral circuit region, to form a resistive layer, (4) planarizing the material layer for forming a plug on the cell region, to form a plug layer which stuffs spaces between the gate electrode layers, and (5) selectively forming contact pad layers on a top of the plug layer on the cell region and a portion of the peripheral circuit region and converting into silicide.
摘要翻译：一种制造半导体存储器的方法，其中在形成电池插头层时电阻层由与电池插塞层的材料相同的材料形成。此外，在电池插塞层上由自对准硅层形成的接触焊盘层形成有比插塞层大的区域，以简化制造工艺并确保足够的制造余量，包括以下步骤：（1）形成金属栅电极在包括单元区域和外围电路区域的半导体衬底上，（2）在单元区域的栅极电极层的侧面形成栅极侧壁，并在整个表面上形成用于形成插塞的材料层，（3）图案化用于在外围电路区域上形成插塞的材料层，以形成电阻层;（4）平坦化用于在电池区域形成插塞的材料层，以形成填充栅电极层之间的空间的插塞层;以及（5）在电池区域上的插塞层的顶部和外围电路区域的一部分上选择性地形成接触焊盘层，并转化为硅化物。

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