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1. 发明授权

US06886235B2 Joint device and method of producing its housing 失效
标题翻译：联合装置及其制造方法
公开(公告)号：US06886235B2
公开(公告)日：2005-05-03
申请号：US10398280
申请日：2001-10-17
申请人： Yoshihiro Suzuki , Kouichi Fujita , Yasuhiro Kizaki
发明人： Yoshihiro Suzuki , Kouichi Fujita , Yasuhiro Kizaki
IPC分类号： B21J5/02 , B21K1/14 , B21K1/76 , F16C11/06 , B23P13/04
CPC分类号： F16C11/0623 , B21J5/02 , B21K1/14 , B21K1/762 , F16C11/06 , Y10T29/49996 , Y10T403/32631
摘要： The invention concerns a method of manufacturing a joint housing, in particular for vehicle track rods, having an integral shaft with an internal thread designed to hold a longitudinal pin, the housing being produced from a blank with a ball-like enlargement at one end. In order to ensure low manufacturing costs and low consumption of energy and materials, a longitudinal cavity with a diameter exceeding that of the internal thread and a length exceeding that of the threaded section is first produced in the shaft of the blank by rearwards cup extrusion and the diameter of the threaded section subsequently reduced to that of the thread core while at the same time shaping the surface of the wall to give a flat key face, the overall process being a cold-forming one. Finally, both the external and internal features of the housing are produced by heading, cupping, punching and forming to size perpendicular the to longitudinal axis in the region of the enlargement.
摘要翻译：本发明涉及一种制造接头壳体的方法，特别是用于车辆轨道杆的方法，该方法具有一体的轴，其具有设计成保持纵向销的内螺纹，该壳体由一端具有球状扩大的坯件制成。为了确保低的制造成本和能量和材料的低消耗，首先通过向后杯挤出在坯料的轴中产生直径超过内螺纹并且长度超过螺纹部分的纵向腔，并且螺纹部分的直径随后减小到螺纹芯的直径，同时使壁的表面成形以形成平面的键面，整个过程是冷成形的。最后，壳体的外部和内部特征都是通过在放大的区域中的垂直于纵向轴线的方向，拔罐，冲压和成形来产生的。

2. 发明授权

US5961745A Fe Based soft magnetic glassy alloy 失效
标题翻译：铁基软磁玻璃合金
公开(公告)号：US5961745A
公开(公告)日：1999-10-05
申请号：US832325
申请日：1997-03-26
申请人： Akihisa Inoue , Takao Mizushima , Kouichi Fujita , Oki Yamaguchi , Akihiro Makino
发明人： Akihisa Inoue , Takao Mizushima , Kouichi Fujita , Oki Yamaguchi , Akihiro Makino
IPC分类号： C22C45/02 , H01F1/153
CPC分类号： H01F1/15308
摘要： The present invention is directed to provide a Fe based glassy alloy which exhibits soft magnetic characteristics at room temperature, has a thickness greater than that of a conventional amorphous alloy prepared by a liquid quenching process and can be easily formed in bulk. The Fe based glassy alloy in accordance with the present invention has a temperature distance .DELTA.T.sub.x, expressed by the equation .DELTA.T.sub.x =T.sub.x -T.sub.g, of a supercooled liquid of not less than 35.degree. C., wherein Tx indicates crystallization temperature and Tg represents glass transition temperature.
摘要翻译：本发明旨在提供一种在室温下呈现软磁特性的Fe基玻璃状合金，其厚度大于通过液体淬火工艺制备的常规非晶合金的厚度，并且可以容易地大量地形成。根据本发明的基于Fe的玻璃状合金具有不低于35℃的过冷液体的由等式DELTA Tx = Tx-Tg表示的温度距离DELTA Tx，其中Tx表示结晶温度，Tg表示玻璃化转变温度。

3. 发明授权

US5640598A Data transfer processing system 失效
标题翻译：数据传输处理系统
公开(公告)号：US5640598A
公开(公告)日：1997-06-17
申请号：US595419
申请日：1996-02-05
申请人： Fumiki Sato , Kouichi Fujita
发明人： Fumiki Sato , Kouichi Fujita
IPC分类号： G06F13/28 , G06F9/06 , G06F13/10
CPC分类号： G06F13/28
摘要： A transfer processing procedure comprising instruction words is inputted from an external to a program storing area of a DMA processing unit 40 whose functions are arranged to correspond to instructions, and the DMA processing unit 40 performs a transfer process in accordance with the function corresponding to the inputted instruction word.
摘要翻译：包括指令字的传送处理过程从外部输入到DMA处理单元40的程序存储区域，DMA处理单元40的功能被布置为对应于指令，并且DMA处理单元40根据对应于输入指令字。

4. 发明授权

US5524221A Next instruction pointer calculation system for a microcomputer 失效
标题翻译：下一个微机指令指针计算系统
公开(公告)号：US5524221A
公开(公告)日：1996-06-04
申请号：US311833
申请日：1994-09-23
申请人： Fumiki Sato , Kouichi Fujita
发明人： Fumiki Sato , Kouichi Fujita
IPC分类号： G06F9/22 , G06F9/26 , G06F9/28 , G06F9/32 , G06F9/38 , G06F9/30
CPC分类号： G06F9/226 , G06F9/321 , G06F9/3802
摘要： A microcomputer comprising an internal decoder for addressing instruction codes in an instruction prefetch buffer, a words field provided preferably in a micro ROM for storing number of words which indicate lengths of various instructions, and position calculating means provided in the bus interface unit for inputting the number of words to indicate an address of instruction code in the instruction prefetch buffer, so that the instruction code is read out concurrently with the execution of the micro instruction.
摘要翻译：一种微型计算机，包括用于寻址指令预取缓冲器中的指令代码的内部解码器，优选地在微ROM中提供的字段，用于存储指示各种指令的长度的字数;以及位置计算装置，设置在总线接口单元中，用于输入指示指令预取缓冲器中的指令代码的地址的字数，使得指令代码与微指令的执行同时读出。

5. 发明授权

US5483477A Multiplying circuit and microcomputer including the same 失效
标题翻译：乘法电路和微机包括相同
公开(公告)号：US5483477A
公开(公告)日：1996-01-09
申请号：US205457
申请日：1994-03-04
申请人： Fumiki Sato , Kouichi Fujita
发明人： Fumiki Sato , Kouichi Fujita
IPC分类号： G06F7/49 , G06F7/48 , G06F7/52 , G06F7/533 , G06F7/00 , G06F15/00
CPC分类号： G06F7/5338 , G06F7/4824
摘要： A multiplying circuit wherein an adder 7 outputs a value "0" in which both of a positive part and a negative part of a number with a redundant code are "1", and at a last cycle of the multiplication cycles, the finish detecting circuit 13 detects finishing of multiplication cycles by detecting that "1" exists in a portion storing a positive part of a number with a redundant code of the third bit from the lowest bit of the second latch 8 and in a portion storing a negative part of the same at the same time. In such a construction, a counter circuit for counting multiplication cycles according to the Booth algorithm utilizing a number with a redundant code can be omitted. Accordingly, the number of transistors is reduced and the circuit configuration becomes simple.
摘要翻译：乘法电路，其中加法器7输出其中具有冗余代码的数字的正部分和负部分都为“1”的值“0”，并且在乘法周期的最后一个周期，完成检测电路 13检测乘法周期的完成，通过检测在存储来自第二锁存器8的最低位的第三位的冗余代码的数字的正部分中存储的部分中存在“1”，并且存储负同一时间。在这种结构中，可以省略利用具有冗余码的数量的根据布斯算法进行乘法周期计数的计数器电路。因此，晶体管的数量减少，电路结构变得简单。

6. 发明授权

US4651113A Amplitude stabilized crystal oscillator 失效
标题翻译：振幅稳定的晶体振荡器
公开(公告)号：US4651113A
公开(公告)日：1987-03-17
申请号：US842353
申请日：1986-03-18
申请人： Kouichi Fujita
发明人： Kouichi Fujita
IPC分类号： H03F1/34 , H03B5/36 , H03L5/00
CPC分类号： H03B5/364 , H03L5/00
摘要： An oscillator circuit in a semiconductor substrate of an integrated circuit, includes a gain correction circuit portion connected between the output terminal of the feedback circuit portion and the input end of the amplifier circuit portion composed of MOS transistors. The gain correction circuit portion suppresses the excessive amplitude of the output signal of the feedback circuit portion, so that the characteristic of the waveform of the output signal of the oscillator device is improved.
摘要翻译：集成电路的半导体衬底中的振荡电路包括连接在反馈电路部分的输出端和由MOS晶体管组成的放大器电路部分的输入端之间的增益校正电路部分。增益校正电路部分抑制反馈电路部分的输出信号的过大振幅，从而提高振荡器装置的输出信号的波形特性。

7. 发明授权

US07174593B2 Vacuum cleaner having an ion generator 失效
标题翻译：具有离子发生器的吸尘器
公开(公告)号：US07174593B2
公开(公告)日：2007-02-13
申请号：US10327879
申请日：2002-12-26
申请人： Masakuni Soejima , Yasushi Kondo , Yoshihiro Taniguchi , Ryohei Yoshida , Masaki Shibuya , Seiji Yamaguchi , Saburo Kajikawa , Hidenori Kitamura , Hiroyuki Uratani , Kouichi Fujita , Haruka Ishikawa
发明人： Masakuni Soejima , Yasushi Kondo , Yoshihiro Taniguchi , Ryohei Yoshida , Masaki Shibuya , Seiji Yamaguchi , Saburo Kajikawa , Hidenori Kitamura , Hiroyuki Uratani , Kouichi Fujita , Haruka Ishikawa
IPC分类号： A47L9/04
CPC分类号： A47L9/0411 , A47L7/04 , A47L9/0488 , A47L9/06 , A47L9/0613
摘要： A vacuum cleaner includes an electric blower for generating a suction air flow, a suction head in communication with the electric blower for drawing in dirt, a filter bag communication with the electric blower for capturing and collecting dirt, an exhaust unit for discharging exhaust air from the electric blower to atmosphere, and an ion generator for generating negative ions and/or positive ions. The ion generator is placed between the suction head and the filter bag.
摘要翻译：吸尘器包括用于产生吸入空气流的电动鼓风机，与电动鼓风机连通以吸入污物的吸头，与用于捕集和收集污物的电动鼓风机的过滤袋连通，用于排出废气的排气单元电动鼓风机到大气，以及用于产生负离子和/或正离子的离子发生器。离子发生器放置在吸头和过滤袋之间。

8. 发明授权

US5743669A Ball joint 失效
标题翻译：球接头
公开(公告)号：US5743669A
公开(公告)日：1998-04-28
申请号：US937267
申请日：1997-09-15
申请人： Kouichi Fujita , Masahiro Yamada , Keiichiro Suzuki , Masao Takayama , Masazumi Suzuki
发明人： Kouichi Fujita , Masahiro Yamada , Keiichiro Suzuki , Masao Takayama , Masazumi Suzuki
IPC分类号： F16C11/06
CPC分类号： F16C11/0642 , F16C11/0633 , F16C11/0657 , F16C11/0671 , F16C2326/01 , Y10T29/49663 , Y10T403/32614 , Y10T403/32704 , Y10T403/477 , Y10T403/4966
摘要： A ball joint includes a bearing seat crimped in place within a housing. A ball head of a ball stud slides in the bearing seat. A cylindrical crimpable portion of the bearing seat is inserted through a cylindrical portion of the housing. The bearing seat is fixed to the housing with two stopper portions. One of the stopper portions is formed by crimping the cylindrical crimpable portion against one of the ends of the housing. A dust cover is pushed between the ball stud and the other stopper portion. The stopper portion is enlarged outward using ultrasonic vibration. An inner side face of the cylindrical crimpable portion inclines outward at an angle ranging from 3.degree. to 20.degree. with respect to an axial direction of the cylindrical crimpable portion. A chamfered portion and rotation-stop portions, shaped like flower petals, are formed at one end of the housing.
摘要翻译：球窝接头包括在壳体内卷曲就位的轴承座。球杆的球头在轴承座上滑动。轴承座的圆柱形可卷曲部分通过壳体的圆柱形部分插入。轴承座通过两个止动部分固定在壳体上。其中一个止动部分通过将圆柱形可卷曲部分压靠在壳体的一个端部而形成。防尘罩被推到球头螺栓和另一个挡块部分之间。使用超声波振动使止动部向外侧扩大。圆筒状卷曲部的内侧面相对于圆筒状可卷曲部的轴向以3°〜20°的角度向外侧倾斜。在壳体的一端形成倒角部和形状像花瓣的旋转止动部。

9. 发明授权

US5734855A Processor with pipeline processing function having read buffer register and latch for storing register information where the result of external access type instruction is stored 失效
标题翻译：具有流水线处理功能的处理器具有读缓冲寄存器和锁存器，用于存储存储外部访问类型指令的结果的寄存器信息
公开(公告)号：US5734855A
公开(公告)日：1998-03-31
申请号：US588168
申请日：1996-01-18
申请人： Fumiki Sato , Kouichi Fujita
发明人： Fumiki Sato , Kouichi Fujita
IPC分类号： G06F9/38
CPC分类号： G06F9/3824 , G06F9/3875
摘要： A data processor which uses a pipeline function to process data reads from an external device which may take two cycles or more. The data processor includes a read buffer register (13) which stores data having been read from an external device by the processing of an external access type instruction word. A latch (16) stores information specifying a register in a register file (4) into which the result of the external access type instruction is stored. A controlling device stores data read from the external device temporarily into the read buffer register (13), and stores the data into a register specified by data stored in the data latch (16).
摘要翻译：一种使用流水线功能来处理可能需要两个周期以上的外部设备的数据读取的数据处理器。数据处理器包括读取缓冲寄存器（13），其通过外部访问型指令字的处理存储已经从外部设备读取的数据。锁存器（16）将指定寄存器文件（4）的信息存储到存储了外部访问类型指令的结果的信息中。控制装置将从外部装置读取的数据临时存储到读缓冲寄存器（13）中，并将数据存储到由存储在数据锁存器（16）中的数据指定的寄存器中。

10. 发明授权

US5574932A One-chip microcomputer and program development/evaluation system therefor 失效
标题翻译：单片机及其程序开发/评估系统
公开(公告)号：US5574932A
公开(公告)日：1996-11-12
申请号：US318455
申请日：1994-10-05
申请人： Fumiki Sato , Kouichi Fujita
发明人： Fumiki Sato , Kouichi Fujita
IPC分类号： G06F11/22 , G06F11/36 , G06F15/78 , G06F9/00
CPC分类号： G06F11/3656
摘要： A one-chip microcomputer having a mode setting circuit 40a in a first MCU 1a and a second MCU 1b for setting either a first evaluation operation mode under which the operations of memory 3a stops and programs and data are read from the outside via terminals 7a, 8a and 9a of a first peripheral device 41a in order to operate a CPU 2a or a second evaluation operation mode under which an operation of the CPU 2a stops and signals are input/output from/to the outside via terminals 12a, 13a, and 14a of a second peripheral device 42a in order to control the first peripheral device 41a, wherein the terminals 7a, 8a and 9a of the first peripheral device 41a of the first MCU 1a are connected to the terminals 12a, 13a and 14a of the second peripheral device 42b of the second MCU 1b and a debug ROM 11. The number of external terminals necessary for program development and evaluation can be decreased and exterior peripheral devices are not needed for program development and evaluation.
摘要翻译：具有第一MCU 1a中的模式设置电路40a和用于设置存储器3a的操作停止的第一评估操作模式，以及经由端子7a从外部读取程序和数据的第一MCU 1b的单片微计算机， 8a和9a，以便操作CPU 2a或CPU 2a的操作停止的第二评估操作模式，以及经由端子12a，13a和14a从/向外部输入/输出信号的第二评估操作模式为了控制第一外围设备41a，第一外围设备41a的第一外围设备41a的端子7a，8a和9a被连接到第二外围设备的端子12a，13a和14a 42b和调试ROM 11.可以减少程序开发和评估所需的外部端子的数量，并且外部外围设备不需要用于程序开发和评估。

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