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1. 发明申请

US20150091069A1 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20150091069A1
公开(公告)日：2015-04-02
申请号：US14279301
申请日：2014-05-15
申请人： Jung-Hwan OH , Hyun-Jun KIM , Jong-Bom SEO , Ki-Vin IM , Han-Jin LIM
发明人： Jung-Hwan OH , Hyun-Jun KIM , Jong-Bom SEO , Ki-Vin IM , Han-Jin LIM
IPC分类号： H01L27/108 , H01L49/02
CPC分类号： H01L27/10805 , H01L27/10808 , H01L27/1085 , H01L28/91
摘要： Provided are a semiconductor device and a fabricating method thereof. The semiconductor device includes a storage electrode having a cylinder shape, a dielectric film formed on the storage electrode, and a plate electrode formed on the dielectric film, wherein the plate electrode includes a first semiconductor compound layer and a second semiconductor compound layer sequentially stacked one on the other, and the first semiconductor compound layer has a crystallinity different from that of the second semiconductor compound layer.
摘要翻译：提供一种半导体器件及其制造方法。半导体器件包括具有圆柱形状的存储电极，形成在存储电极上的电介质膜和形成在电介质膜上的平板电极，其中该平板电极包括一个第一半导体化合物层和第二半导体化合物层，另一方面，第一半导体化合物层的结晶度与第二半导体化合物层的结晶度不同。

2. 发明授权

US08399364B2 Methods of fabricating semiconductor devices including multilayer dielectric layers 有权
标题翻译：制造包括多层电介质层的半导体器件的方法
公开(公告)号：US08399364B2
公开(公告)日：2013-03-19
申请号：US13019636
申请日：2011-02-02
申请人： Kil-chul Kim , Jong-cheol Lee , Ki-vin Im , Jae-hyun Yeo
发明人： Kil-chul Kim , Jong-cheol Lee , Ki-vin Im , Jae-hyun Yeo
IPC分类号： H01L21/471
CPC分类号： H01L28/40 , H01L27/1085 , H01L27/11568
摘要： Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.
摘要翻译：公开了制造包括多层电介质层的半导体器件的方法。所述方法包括在半导体衬底上形成包括金属原子和硅原子的多层电介质层。多层介电层包括至少两个具有不同硅浓度的结晶金属硅酸盐层。多层介电层可以用作电容器的介质层，也可以用作非易失性存储器件的阻挡层。

3. 发明授权

US08394201B2 Atomic layer deposition apparatus 有权
公开(公告)号：US08394201B2
公开(公告)日：2013-03-12
申请号：US12356999
申请日：2009-01-21
申请人： Ki-Hyun Kim , Ki-Vin Im , Hoon-Sang Choi , Moon-Hyeong Han
发明人： Ki-Hyun Kim , Ki-Vin Im , Hoon-Sang Choi , Moon-Hyeong Han
IPC分类号： C23C16/455 , C23C16/46 , C23F1/00 , H01L21/306 , C23C16/06 , C23C16/22
CPC分类号： H01L21/30 , C23C16/45546 , C23C16/45551 , C23C16/45578
摘要： An atomic layer deposition apparatus and an atomic layer deposition method increase productivity. The atomic layer deposition apparatus includes a reaction chamber, a heater for supporting a plurality of semiconductor substrates with a given interval within the reaction chamber and to heat the plurality of semiconductor substrates and a plurality of injectors respectively positioned within the reaction chamber and corresponding to the plurality of semiconductor substrates supported by the heater. The plurality of injectors are individually swept above the plurality of semiconductor substrates to spray reaction gas.

4. 发明授权

US07824501B2 In-situ method of cleaning vaporizer during dielectric layer deposition process 有权
标题翻译：介电层沉积过程中清洗蒸发器的原位方法
公开(公告)号：US07824501B2
公开(公告)日：2010-11-02
申请号：US11781334
申请日：2007-07-23
申请人： Hoon-sang Choi , Jong-cheol Lee , Ki-vin Im , Eun-ae Chung , Sang-yeol Kang , Young-sun Kim , Kwang-hee Lee
发明人： Hoon-sang Choi , Jong-cheol Lee , Ki-vin Im , Eun-ae Chung , Sang-yeol Kang , Young-sun Kim , Kwang-hee Lee
IPC分类号： B08B9/08 , B08B3/08 , B08B3/10 , B08B5/00
CPC分类号： C23C16/45525 , C23C16/4401 , C23C16/45544
摘要： Provided is an in-situ method of cleaning a vaporizer of an atomic layer deposition apparatus during a dielectric layer deposition process, to prevent nozzle blocking in the vaporizer and an atomic layer deposition apparatus. During the dielectric layer deposition process, the following steps are repeated: supplying a first source gas for dielectric layer deposition into a chamber of an atomic layer deposition apparatus; purging the first source gas; supplying a second source gas into the chamber of the atomic layer deposition apparatus; purging the second source gas, the in-situ method of cleaning the vaporizer is performed after supplying the first source gas for dielectric layer deposition and before supplying the first source gas again.
摘要翻译：提供了一种在电介质层沉积工艺期间清洁原子层沉积设备的蒸发器的原位方法，以防止蒸发器和原子层沉积设备中的喷嘴堵塞。在电介质层沉积过程中，重复以下步骤：将用于电介质层沉积的第一源气体供应到原子层沉积设备的腔室中; 净化第一源气; 将第二源气体供应到原子层沉积设备的腔室中; 吹扫第二源气体时，在供给用于电介质层沉积的第一源气体并再次供应第一源气体之前执行清洗蒸发器的原位方法。

5. 发明授权

US07791125B2 Semiconductor devices having dielectric layers and methods of forming the same 有权
标题翻译：具有电介质层的半导体器件及其形成方法
公开(公告)号：US07791125B2
公开(公告)日：2010-09-07
申请号：US11881562
申请日：2007-07-27
申请人： Hoon-Sang Choi , Jong-Cheol Lee , Ki-Vin Im , Jae-Hyun Yeo , Eun-Ae Chung , Sang-Yeol Kang
发明人： Hoon-Sang Choi , Jong-Cheol Lee , Ki-Vin Im , Jae-Hyun Yeo , Eun-Ae Chung , Sang-Yeol Kang
IPC分类号： H01L27/108
CPC分类号： H01L21/02194 , H01L21/0228 , H01L21/02318 , H01L21/31604 , H01L21/31641 , H01L21/31645 , H01L28/91
摘要： A method of forming a semiconductor device includes loading a semiconductor substrate into a reaction chamber, and providing metal organic precursors including hafnium and zirconium into the reaction chamber to form hafnium-zirconium oxide (HfxZr1-xO; 0
摘要翻译：一种形成半导体器件的方法包括将半导体衬底加载到反应室中，并向反应室中提供包括铪和锆的金属有机前体以形成铪锆氧化物（Hf x Zr 1-x O; 0

6. 发明授权

US07514315B2 Methods of forming capacitor structures having aluminum oxide diffusion barriers 有权
标题翻译：形成具有氧化铝扩散阻挡层的电容器结构的方法
公开(公告)号：US07514315B2
公开(公告)日：2009-04-07
申请号：US11733970
申请日：2007-04-11
申请人： Jong-Cheol Lee , Kyoung-Ryul Yoon , Ki-Vin Im , Jae-Hyun Yeo , Eun-Ae Chung , Jin-Il Lee
发明人： Jong-Cheol Lee , Kyoung-Ryul Yoon , Ki-Vin Im , Jae-Hyun Yeo , Eun-Ae Chung , Jin-Il Lee
IPC分类号： H01L21/8242 , H01L21/20
CPC分类号： H01L27/10852 , H01L27/10817 , H01L28/75 , H01L28/90
摘要： A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.
摘要翻译：多层电极结构具有包括铝的导电层，形成在导电层上的氧化物层和氧扩散阻挡层。氧化物层包括氧化锆和/或氧化钛。通过再氧化氧化层，在导电层和氧化物层之间的界面处形成氧扩散阻挡层。氧扩散阻挡层包括氧化铝。

7. 发明申请

US20090068814A1 Semiconductor Devices Including Capacitor Support Pads and Related Methods 有权
标题翻译：包括电容器支持垫的半导体器件及相关方法
公开(公告)号：US20090068814A1
公开(公告)日：2009-03-12
申请号：US12137634
申请日：2008-06-12
申请人： Young-kyu Cho , Ki-vin Im , Yong-hee Choi
发明人： Young-kyu Cho , Ki-vin Im , Yong-hee Choi
IPC分类号： H01L21/20
CPC分类号： H01L28/40 , H01L27/0207 , H01L27/10852 , H01L28/91
摘要： A semiconductor device may include a semiconductor substrate and a plurality of first capacitor electrodes arranged in a plurality of parallel lines on the semiconductor substrate with each of the first capacitor electrodes extending away from the semiconductor substrate. A plurality of capacitor support pads may be provided with each capacitor support pad being connected to first capacitor electrodes of at least two adjacent parallel lines of the first capacitor electrodes and with adjacent capacitor support pads being spaced apart. A dielectric layer may be provided on each of the first capacitor electrodes, and a second capacitor electrode may be provided on the dielectric layer so that the dielectric layer is between the second capacitor electrode and each of the first capacitor electrodes. Related methods are also discussed.
摘要翻译：半导体器件可以包括半导体衬底和布置在半导体衬底上的多条平行线中的多个第一电容器电极，其中每个第一电容器电极远离半导体衬底延伸。可以设置多个电容器支撑焊盘，每个电容器支撑焊盘连接到第一电容器电极的至少两个相邻平行线的第一电容器电极，并且相邻的电容器支撑垫间隔开。可以在每个第一电容器电极上设置电介质层，并且可以在电介质层上设置第二电容器电极，使得电介质层位于第二电容器电极和第一电容器电极之间。还讨论了相关方法。

8. 发明申请

US20070032013A1 METHODS OF FORMING A METAL OXIDE LAYER INCLUDING ZIRCONIUM OXIDE AND METHODS OF FORMING A CAPACITOR FOR SEMICONDUCTOR DEVICES INCLUDING THE SAME 审中-公开
标题翻译：形成包含氧化锆的金属氧化物层的方法和形成包括其的半导体器件的电容器的方法
公开(公告)号：US20070032013A1
公开(公告)日：2007-02-08
申请号：US11462405
申请日：2006-08-04
申请人： Kyoung-Ryul Yoon , Young-Geun Park , Ki-Vin Im , Jae-Hyun Yeo , Eun-Ae Chung , Young-Sun Kim
发明人： Kyoung-Ryul Yoon , Young-Geun Park , Ki-Vin Im , Jae-Hyun Yeo , Eun-Ae Chung , Young-Sun Kim
IPC分类号： H01L21/8242
CPC分类号： H01L21/02189 , C23C16/405 , C23C16/56 , H01L21/02266 , H01L21/02271 , H01L21/0228 , H01L21/0234 , H01L21/28185 , H01L21/28194 , H01L21/3141 , H01L21/31641 , H01L27/10852 , H01L27/11507 , H01L28/40 , H01L29/40114 , H01L29/40117 , H01L29/517 , H01L29/7833
摘要： The present invention provides methods of forming a metal oxide layer and methods of forming a capacitor including the same. The methods of forming the metal oxide include forming a thin layer including a metal oxide, such as zirconium oxide, on a substrate and performing a post-treatment on the thin layer at a temperature at which oxygen present in the metal oxide is hindered from being diffused in the thin layer. Consequently, reduced amounts of byproducts are present on the boundary surface of the thin layer and the substrate thereby improving electrical characteristics of the thin layer.
摘要翻译：本发明提供了形成金属氧化物层的方法和形成包括该金属氧化物层的电容器的方法。形成金属氧化物的方法包括在衬底上形成包含氧化锆等金属氧化物的薄层，并在金属氧化物中存在的氧被阻碍的温度下在薄层上进行后处理扩散在薄层。因此，在薄层和基板的边界表面上存在减少量的副产物，从而改善薄层的电特性。

9. 发明申请

US20050070063A1 High performance MIS capacitor with HfO2 dielectric 失效
标题翻译：具有HfO2电介质的高性能MIS电容器
公开(公告)号：US20050070063A1
公开(公告)日：2005-03-31
申请号：US10793818
申请日：2004-03-08
申请人： Ki-Vin Im , Ki-Yeon Park , Jae-Hyun Yeo , In-Sung Park , Seung-Hwan Lee , Young-Sun Kim , Sung-Tae Kim
发明人： Ki-Vin Im , Ki-Yeon Park , Jae-Hyun Yeo , In-Sung Park , Seung-Hwan Lee , Young-Sun Kim , Sung-Tae Kim
IPC分类号： C23C16/40 , C23C16/455 , H01L21/28 , H01L21/314 , H01L21/316 , H01L21/8242 , H01L29/49 , H01L29/51
CPC分类号： H01L21/0228 , C23C16/405 , C23C16/45529 , C23C16/45531 , H01L21/02181 , H01L21/022 , H01L21/28088 , H01L21/28185 , H01L21/28194 , H01L21/3141 , H01L21/31645 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518
摘要： Disclosed is a method for forming metal oxide dielectric layers, more particularly HfO2 dielectric layers, using an atomic layer deposition (ALD) method in which a series of thin intermediate layers are formed and treated with one or more oxidizers and nitrogents before the next intermediate layer is formed on the substrate. The intermediate oxidation treatments reduce the number of organic contaminants incorporated into the metal oxide layer from the organometallic precursors to produce a dielectric layer having improved current leakage characteristics. The dielectric layers formed in this manner remain susceptible to crystallization if exposed to temperatures much above 550° C., so subsequent semiconductor manufacturing processes should be modified or eliminated to avoid such temperatures or limit the duration at such temperatures to maintain the performance of the dielectric materials.
摘要翻译：公开了一种使用原子层沉积（ALD）方法形成金属氧化物电介质层，更具体地HfO 2电介质层的方法，其中在下一个中间层之前形成一系列薄的中间层并用一种或多种氧化剂和氮化物进行处理形成在基板上。中间氧化处理减少了从有机金属前体引入到金属氧化物层中的有机污染物的数量，以产生具有改善的电流泄漏特性的电介质层。如果暴露在高于550℃的温度下，以这种方式形成的电介质层仍然易于结晶，因此随后的半导体制造工艺应当被修改或消除以避免这种温度或限制在这样的温度下的持续时间以保持电介质的性能材料

10. 发明授权

US09184227B1 Methods of manufacturing semiconductor devices having self-aligned contact pads 有权
标题翻译：制造具有自对准接触焊盘的半导体器件的方法
公开(公告)号：US09184227B1
公开(公告)日：2015-11-10
申请号：US14529500
申请日：2014-10-31
申请人： Young-Kuk Kim , Ki-Vin Im , Han-Jin Lim , In-Seak Hwang
发明人： Young-Kuk Kim , Ki-Vin Im , Han-Jin Lim , In-Seak Hwang
IPC分类号： H01L21/336 , H01L49/02 , H01L21/8234
CPC分类号： H01L27/10823 , H01L21/823437 , H01L21/823475 , H01L27/10808 , H01L27/10855 , H01L27/10885 , H01L28/60 , H01L29/4236 , H01L29/42364 , H01L29/7827
摘要： A semiconductor device includes a substrate having a field area that defines active areas, gate trenches in the substrate and extending in a first direction, a buried gate in a respective gate trench, gate capping fences in a respective gate trench over a respective buried gate, the gate capping fences protruding from top surfaces of the active areas and extending in the first direction, bit line trenches in the gate capping fences, a respective bit line trench crossing the gate capping fences and extending in a second direction perpendicular to the first direction, an insulator structure on inner walls of a respective bit line trench, bit lines and bit line capping patterns stacked on the insulator structures in a respective bit line trench, contact pads self-aligned with the gate capping fences and on the substrate between the adjacent bit lines, and a lower electrode of a capacitor on a respective contact pad.
摘要翻译：半导体器件包括具有限定有源区域的场区域的衬底，衬底中的栅极沟槽和沿第一方向延伸的衬底，相应栅极沟槽中的掩埋栅极，在相应的掩埋栅极上的相应栅极沟槽中的栅极栅极栅极，所述栅极覆盖栅栏从所述有源区域的顶表面突出并且沿所述第一方向延伸，所述栅极覆盖栅栏中的位线沟槽跨过所述栅极覆盖栅栏并沿垂直于所述第一方向的第二方向延伸的相应位线沟槽，相应位线沟槽的内壁上的绝缘体结构，堆叠在相应位线沟槽中的绝缘体结构上的位线和位线封接图案，与栅极覆盖栅栏自对准的接触焊盘和相邻位之间的衬底上的绝缘体结构线路和相应接触焊盘上的电容器的下电极。

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