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    • 1. 发明申请
    • MULTIPLE-INPUT MULTIPLE-OUTPUT ANTENNA
    • 多输入多输出天线
    • US20120274536A1
    • 2012-11-01
    • US13457410
    • 2012-04-26
    • CHUN-JUI PAN
    • CHUN-JUI PAN
    • H01Q21/00
    • H01Q1/38H01Q1/243H01Q1/521H01Q9/42H01Q21/28
    • A Multiple-Input Multiple-Output (MIMO) antenna on a substrate includes first and second antennas defined in axial symmetry, a coupling portion, and a grounding portion. The substrate includes a first surface and an opposite second surface. Each of the antennas includes a feeding portion, a radiating portion, and a matching portion. The feeding portion feeds electromagnetic signals to the antenna. The radiating portion radiates the electromagnetic signals, and is in a meandering “S” pattern. A length of the radiating portion is substantially equal to a quarter wavelength of the electromagnetic signals. The matching portion implements impedance matching between the feeding portion and the radiating portion. The coupling portion is located between the first antenna and the second antenna and is serpentine shape. A length of the coupling portion is substantially equal to a half wavelength of the electromagnetic signals. The grounding portion is located on both the first and second surface.
    • 基板上的多输入多输出(MIMO)天线包括以轴对称方式限定的第一和第二天线,耦合部分和接地部分。 衬底包括第一表面和相对的第二表面。 每个天线包括馈电部分,辐射部分和匹配部分。 馈电部分向天线馈送电磁信号。 辐射部分辐射电磁信号,处于曲折的S图案。 辐射部分的长度基本上等于电磁信号的四分之一波长。 匹配部分实现馈电部分和辐射部分之间的阻抗匹配。 耦合部分位于第一天线和第二天线之间,并且是蛇形的。 耦合部分的长度基本上等于电磁信号的半波长。 接地部分位于第一和第二表面上。
    • 9. 发明授权
    • Thin film transistor array substrate
    • 薄膜晶体管阵列基板
    • US07646021B2
    • 2010-01-12
    • US12402480
    • 2009-03-11
    • Yeong-Feng WangChih-Jui PanLiang-Bin Yu
    • Yeong-Feng WangChih-Jui PanLiang-Bin Yu
    • H01L29/04
    • H01L27/124G02F1/136213H01L27/1255H01L29/78642
    • A TFT array substrate includes a substrate, a patterned first metallic layer, a patterned stack layer, a patterned dielectric layer, a patterned transparent conductive layer, and a patterned third metallic layer. Elements of each TFT in the TFT array substrate are arranged vertically, so that the TFT array substrate has relatively small fabrication area and is operable with a high conducting current. Further, the storage capacitance can be enhanced by enclosing or sandwiching the second metallic layer with the common lines and the transparent electrodes. In such a way, pixel flashing caused by those coupled signals can be reduced, thus promoting displaying quality thereof.
    • TFT阵列基板包括基板,图案化第一金属层,图案化叠层,图案化电介质层,图案化透明导电层和图案化的第三金属层。 TFT阵列基板中的每个TFT的元件被垂直布置,使得TFT阵列基板具有相对较小的制造面积并且可以以高导电电流工作。 此外,可以通过用公共线和透明电极包围或夹持第二金属层来增强存储电容。 以这种方式,可以减少由这些耦合信号引起的像素闪烁,从而提高其显示质量。