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1. 发明授权

US5977960A Apparatus, systems and methods for controlling data overlay in multimedia data processing and display systems using mask techniques 失效
标题翻译：用于使用掩模技术在多媒体数据处理和显示系统中控制数据覆盖的装置，系统和方法
公开(公告)号：US5977960A
公开(公告)日：1999-11-02
申请号：US707937
申请日：1996-09-10
申请人： Robert Marshall Nally , John C. Schafer
发明人： Robert Marshall Nally , John C. Schafer
IPC分类号： G09G5/14 , G09G5/395 , G09G5/36
CPC分类号： G09G5/395 , G09G5/14 , G09G2340/125
摘要： A memory system 107,300 is provided which includes a memory 107 having a data area for storing data words and a mask area 302 for storing a control mask. Mask generation circuitry 301 is provided for generating such a control mask for storage in the mask area 302 of the memory 107. Mask controlled memory read control circuitry 303 is provided which is operable to selectively retrieve from the mask area 302 bits of the mask stored therein and in response selectively retrieve and output data words stored in the data area of the memory 107.
摘要翻译：提供了一种存储器系统107,300，其包括具有用于存储数据字的数据区域的存储器107和用于存储控制掩码的掩码区域302。掩膜产生电路301被提供用于产生用于存储在存储器107的掩模区域302中的这种控制掩模。提供了掩模控制的存储器读取控制电路303，其可操作以从掩模区域选择性地检索存储在其中的掩模的302位并且响应于选择性地检索和输出存储在存储器107的数据区域中的数据字。

2. 发明授权

US08253750B1 Digital media processor 有权
标题翻译：数字媒体处理器
公开(公告)号：US08253750B1
公开(公告)日：2012-08-28
申请号：US12832830
申请日：2010-07-08
申请人： Jen-Hsun Huang , Gerrit A. Slavenburg , Stephen D. Lew , John C. Schafer , Thomas F. Fox , Taner E. Ozcelik
发明人： Jen-Hsun Huang , Gerrit A. Slavenburg , Stephen D. Lew , John C. Schafer , Thomas F. Fox , Taner E. Ozcelik
IPC分类号： G06F13/14 , G06F15/80 , G06F15/00
CPC分类号： G06T15/005 , G06F15/78 , G09G5/003 , G09G2360/02 , H04N13/161
摘要： Circuits, methods, and apparatus that provide highly integrated digital media processors for digital consumer electronics applications. These digital media processors are capable of performing the parallel processing of multiple format audio, video, and graphics signals. In one embodiment, audio and video signals may be received from a variety of input devices or appliances, such as antennas, VCRs, DVDs, and networked devices such as camcorders and modems, while output audio and video signals may be provided to output devices such as televisions, monitors, and networked devices such as printers and networked video recorders. Another embodiment of the present invention interfaces with a variety of devices such as navigation, entertainment, safety, memory, and networking devices. This embodiment can also be configured for use in a digital TV, set-top box, or home server. In this configuration, video and audio streams may be received from a number of cable, satellite, Internet, and consumer devices.
摘要翻译：为数字消费电子应用提供高度集成的数字媒体处理器的电路，方法和设备。这些数字媒体处理器能够执行多格式音频，视频和图形信号的并行处理。在一个实施例中，音频和视频信号可以从诸如天线，VCR，DVD以及诸如摄像机和调制解调器之类的网络设备的各种输入设备或设备接收，而输出音频和视频信号可以被提供给诸如作为电视机，显示器和网络设备，如打印机和网络录像机。本发明的另一实施例与诸如导航，娱乐，安全，存储器和网络设备的各种设备接口。该实施例还可以被配置为用于数字电视，机顶盒或家庭服务器中。在该配置中，可以从多个有线，卫星，因特网和消费者设备接收视频和音频流。

3. 发明授权

US5625379A Video processing apparatus systems and methods 失效
标题翻译：视频处理设备系统和方法
公开(公告)号：US5625379A
公开(公告)日：1997-04-29
申请号：US402935
申请日：1995-03-13
申请人： Christopher L. Reinert , Sudhir Sharma , Robert M. Nally , John C. Schafer
发明人： Christopher L. Reinert , Sudhir Sharma , Robert M. Nally , John C. Schafer
IPC分类号： G09G3/20 , G09G5/00 , G09G5/02 , G09G5/06 , G09G5/08 , G09G5/36 , G09G5/391 , G09G5/395 , G09G5/399 , G09G5/40 , H04N9/64 , G09G5/04
CPC分类号： H04N9/641 , G09G5/006 , G09G5/008 , G09G5/02 , G09G5/06 , G09G5/08 , G09G5/363 , G09G5/391 , G09G5/395 , G09G5/40 , G09G2310/0232 , G09G2320/0606 , G09G2320/0673 , G09G2340/0407 , G09G2340/125
摘要： A display interface device 20 is provided which includes inputs for receiving video data words, the video data words including control codes for controlling the output format of a display, and a video clock signal received from an associated video controller. A first-in/first-out memory 30 is also provided with a video data word clocked into memory 30 by the first clock and clocked out of memory 30 by a second clock generated from a clock received from an associated graphics controller.
摘要翻译：提供显示接口装置20，其包括用于接收视频数据字的输入，视频数据字包括用于控制显示器的输出格式的控制代码和从相关视频控制器接收的视频时钟信号。先进先出存储器30还具有通过第一时钟定时存入存储器30的视频数据字，并通过从相关图形控制器接收的时钟产生的第二时钟从存储器30中输出。

4. 发明授权

US5598525A Apparatus, systems and methods for controlling graphics and video data in multimedia data processing and display systems 失效
标题翻译：用于控制多媒体数据处理和显示系统中的图形和视频数据的装置，系统和方法
公开(公告)号：US5598525A
公开(公告)日：1997-01-28
申请号：US376919
申请日：1995-01-23
申请人： Robert M. Nally , John C. Schafer
发明人： Robert M. Nally , John C. Schafer
IPC分类号： G06T11/20 , G06F15/00
CPC分类号： G06T11/203
摘要： A graphics and video controller 105 is provided which includes a dual aperture interface 206 for receiving words of graphics and video pixel data, each word of such data associated with an address directing that word to be processed as either graphics or video data. Circuitry 200, 201, 202, 207, 208 is provided for writing a word of the pixel data received from the interface 206 to a one of the on- and off-screen memory areas corresponding to the address associated with the received word. Circuitry 201, 202 is provided for selectively retrieving graphics and video data from the on-screen and off-screen memory areas. A first pipeline 205 is provided for processing data received from the on-screen area of frame buffer 107 while a second pipeline 204 is provided for processing data retrieved from the off-screen area of the frame buffer.
摘要翻译：提供了图形和视频控制器105，其包括用于接收图形和视频像素数据的单词的双孔径接口206，这些数据的每个单词与将要处理的字作为图形或视频数据相关联的地址相关联。提供电路200,201,202,207,208，用于将从接口206接收的像素数据的字写入对应于与接收到的字相关联的地址的开和关屏幕之间的存储区域中的一个。提供电路201,202用于从屏幕上和离屏存储区域选择性地检索图形和视频数据。提供第一流水线205，用于处理从帧缓冲器107的屏幕上区域接收的数据，同时提供第二流水线204用于处理从帧缓冲器的屏幕外区域检索的数据。

5. 发明授权

US5577203A Video processing methods 失效
标题翻译：视频处理方法
公开(公告)号：US5577203A
公开(公告)日：1996-11-19
申请号：US402934
申请日：1995-03-13
申请人： Christopher L. Reinert , Sudhir Sharma , Robert M. Nally , John C. Schafer
发明人： Christopher L. Reinert , Sudhir Sharma , Robert M. Nally , John C. Schafer
IPC分类号： G09G3/20 , G09G5/00 , G09G5/02 , G09G5/06 , G09G5/08 , G09G5/36 , G09G5/391 , G09G5/395 , G09G5/399 , G09G5/40 , H04N9/64
CPC分类号： H04N9/641 , G09G5/006 , G09G5/008 , G09G5/02 , G09G5/06 , G09G5/08 , G09G5/363 , G09G5/391 , G09G5/395 , G09G5/40 , G09G2310/0232 , G09G2320/0606 , G09G2320/0673 , G09G2340/0407 , G09G2340/125
摘要： Methods are provided for transferring a stream of video data from a video data source to a display interface unit 20. A video data word is clocked into a first-in-first-out memory 30 by a first clock and clocked out of memory 30 by a second clock generated from a clock received from an associated graphics controller.
摘要翻译：提供了用于将视频数据流从视频数据源传输到显示接口单元20的方法。视频数据字通过第一时钟被定时输入先进先出存储器30，并通过从从相关联的图形控制器接收的时钟产生的第二时钟。

6. 发明授权

US5542038A Method and system for generating dynamic zoom codes 失效
标题翻译：生成动态缩放代码的方法和系统
公开(公告)号：US5542038A
公开(公告)日：1996-07-30
申请号：US98840
申请日：1993-07-29
申请人： John C. Schafer
发明人： John C. Schafer
IPC分类号： G06T3/40
CPC分类号： G06T3/4007
摘要： Circuitry for altering a received data stream as a function of a received factor, the received factor indicative of an output format of the received data stream. Included within the circuitry is a first circuit operable to selectively expand portions of the received data stream as a function of the received factor. Further included within the circuitry is a second circuit operable to dynamically generate a zoom code associated with a selected portion of the received data stream, the zoom code providing direction to an associated device for completing the generation of the output format.
摘要翻译：用于根据接收到的因子改变接收到的数据流的电路，所接收的因子表示所接收的数据流的输出格式。包括在电路内的是第一电路，其可操作以作为所接收的因子的函数选择性地扩展所接收的数据流的部分。进一步包括在电路内的是第二电路，其可操作以动态地产生与所接收的数据流的所选部分相关联的缩放代码，缩放代码向相关设备提供方向以完成输出格式的生成。

7. 发明授权

US5440683A Video processor multiple streams of video data in real-time 失效
标题翻译：视频处理器实时处理多个视频数据流
公开(公告)号：US5440683A
公开(公告)日：1995-08-08
申请号：US328382
申请日：1994-10-20
申请人： Robert M. Nally , John C. Schafer
发明人： Robert M. Nally , John C. Schafer
IPC分类号： G11B27/02 , G11B27/031 , G11B27/032 , H04N5/262 , H04N5/91 , H04N5/92 , H04N9/79 , G06F15/00
CPC分类号： H04N5/262 , G11B27/031
摘要： A digital video editor employing a single chip special-purpose digital video processing unit (VPU) having the capability to combine several different digital video input signals into a single digital video output signal is disclosed. The VPU comprises a microprocessor operating under a set of instructions which is operative for receiving, storing and manipulating portions of an incoming digital video signal and a delay circuit, coupled to the microprocessor, for delaying execution of a particular instruction if a particular portion upon which the instruction is to operate has not yet been stored. The VPU processes multiple digitized video signals in real time in a time-sharing fashion because its processing speed is substantially greater than the rate at which it receives video data and processes multiple picture elements of a single digital stream simultaneously. In a preferred environment, The VPU operates in conjunction with an IBM compatible personal computer, an inexpensive general purpose computer. By processing video digitally, the VPU avoids generation loss and allows efficient digital compression and storage of video data.
摘要翻译：公开了一种采用单芯片专用数字视频处理单元（VPU）的数字视频编辑器，其具有将多个不同的数字视频输入信号组合成单个数字视频输出信号的能力。 VPU包括在一组指令下操作的微处理器，其操作用于接收，存储和操纵耦合到微处理器的输入数字视频信号和延迟电路的部分，用于延迟特定指令的执行，如果其上的特定部分指令操作尚未存储。 VPU以时分方式实时处理多个数字化视频信号，因为它的处理速度明显大于其接收视频数据的速率并且同时处理单个数字流的多个图像元素。在优选的环境中，VPU与IBM兼容的个人计算机（便宜的通用计算机）一起运行。通过数字处理视频，VPU避免了生成丢失，并允许视频数据的高效数字压缩和存储。

8. 发明申请

US20140055559A1 DIGITAL MEDIA PROCESSOR 审中-公开
标题翻译：数字媒体处理器
公开(公告)号：US20140055559A1
公开(公告)日：2014-02-27
申请号：US13568875
申请日：2012-08-07
申请人： Jen-Hsun Huang , Gerrit A. Slavenburg , Stephen D. Lew , John C. Schafer , Thomas F. Fox , Taner E. Ozcelik
发明人： Jen-Hsun Huang , Gerrit A. Slavenburg , Stephen D. Lew , John C. Schafer , Thomas F. Fox , Taner E. Ozcelik
IPC分类号： G06T15/00 , H04N13/00
CPC分类号： G06T15/005 , G06F15/78 , G09G5/003 , G09G2360/02 , H04N13/161
摘要： Circuits, methods, and apparatus that provide highly integrated digital media processors for digital consumer electronics applications. These digital media processors are capable of performing the parallel processing of multiple format audio, video, and graphics signals. In one embodiment, audio and video signals may be received from a variety of input devices or appliances, such as antennas, VCRs, DVDs, and networked devices such as camcorders and modems, while output audio and video signals may be provided to output devices such as televisions, monitors, and networked devices such as printers and networked video recorders. Another embodiment of the present invention interfaces with a variety of devices such as navigation, entertainment, safety, memory, and networking devices. This embodiment can also be configured for use in a digital TV, set-top box, or home server. In this configuration, video and audio streams may be received from a number of cable, satellite, Internet, and consumer devices.
摘要翻译：为数字消费电子应用提供高度集成的数字媒体处理器的电路，方法和设备。这些数字媒体处理器能够执行多格式音频，视频和图形信号的并行处理。在一个实施例中，音频和视频信号可以从诸如天线，VCR，DVD以及诸如摄像机和调制解调器之类的网络设备的各种输入设备或设备接收，而输出音频和视频信号可以被提供给诸如作为电视机，显示器和网络设备，如打印机和网络录像机。本发明的另一实施例与诸如导航，娱乐，安全，存储器和网络设备的各种设备接口。该实施例还可以被配置为用于数字电视，机顶盒或家庭服务器中。在该配置中，可以从多个有线，卫星，因特网和消费者设备接收视频和音频流。

9. 再颁专利

USRE39898E1 Apparatus, systems and methods for controlling graphics and video data in multimedia data processing and display systems 有权
标题翻译：用于控制多媒体数据处理和显示系统中的图形和视频数据的装置，系统和方法
公开(公告)号：USRE39898E1
公开(公告)日：2007-10-30
申请号：US09374041
申请日：1999-08-13
申请人： Robert M. Nally , John C. Schafer
发明人： Robert M. Nally , John C. Schafer
IPC分类号： G09G5/397 , G09G5/36 , G09G5/39 , G06F15/80 , G06F15/76 , G06T1/20
CPC分类号： G06T11/203
摘要： A graphics and video controller 105 is provided which includes a dual aperture interface 206 for receiving words of graphics and video pixel data, each word of such data associated with an address directing that word to be processed as either graphics or video data. Circuitry 200, 201, 202, 207, 208 is provided for writing a word of the pixel data received from the interface 206 to a one of the on- and off-screen memory areas corresponding to the address associated with the received word. Circuitry 201, 202 is provided for selectively retrieving graphics and video data from the on-screen and off-screen memory areas. A first pipeline 205 is provided for processing data received from the on-screen area of frame buffer 107 while a second pipeline 204 is provided for processing data retrieved from the off-screen area of the frame buffer.
摘要翻译：提供了图形和视频控制器105，其包括用于接收图形和视频像素数据的单词的双孔径接口206，这些数据的每个单词与将要处理的字作为图形或视频数据相关联的地址相关联。电路200,201,202,207,208被提供用于将从接口206接收的像素数据的字写入对应于与接收到的字相关联的地址的开和关屏幕之间的存储区域中的一个。提供电路201,202用于从屏幕上和离屏存储区域选择性地检索图形和视频数据。提供第一流水线205，用于处理从帧缓冲器107的屏幕上区域接收的数据，同时提供第二流水线204用于处理从帧缓冲器的屏幕外区域检索的数据。

10. 发明授权

US5581280A Video processing apparatus, systems and methods 失效
标题翻译：视频处理设备，系统和方法
公开(公告)号：US5581280A
公开(公告)日：1996-12-03
申请号：US402931
申请日：1995-03-13
申请人： Christopher L. Reinert , Sudhir Sharma , Robert M. Nally , John C. Schafer
发明人： Christopher L. Reinert , Sudhir Sharma , Robert M. Nally , John C. Schafer
IPC分类号： G09G3/20 , G09G5/00 , G09G5/02 , G09G5/06 , G09G5/08 , G09G5/36 , G09G5/391 , G09G5/395 , G09G5/399 , G09G5/40 , H04N9/64
CPC分类号： H04N9/641 , G09G5/006 , G09G5/008 , G09G5/02 , G09G5/06 , G09G5/08 , G09G5/363 , G09G5/391 , G09G5/395 , G09G5/40 , G09G2310/0232 , G09G2320/0606 , G09G2320/0673 , G09G2340/0407 , G09G2340/125
摘要： A display interface device 20 is provided which includes inputs for receiving video data words, the video data words including control codes for controlling the output format of a display, and a video clock signal received from an associated video controller. A first-in/first-out memory 30 is also provided with a video data word clocked into memory 30 by the first clock and clocked out of memory 30 by a second clock generated from a clock received from an associated graphics controller.
摘要翻译：提供显示接口装置20，其包括用于接收视频数据字的输入，视频数据字包括用于控制显示器的输出格式的控制代码和从相关视频控制器接收的视频时钟信号。先进先出存储器30还具有通过第一时钟定时存入存储器30的视频数据字，并通过从相关图形控制器接收的时钟产生的第二时钟从存储器30中输出。

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