专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08238169B2 Method and apparatus for restoring data in a non-volatile memory 有权
标题翻译：用于在非易失性存储器中恢复数据的方法和装置
公开(公告)号：US08238169B2
公开(公告)日：2012-08-07
申请号：US13027621
申请日：2011-02-15
申请人： Jeong Y. Choi , Stephen Fung
发明人： Jeong Y. Choi , Stephen Fung
IPC分类号： G11C16/06
CPC分类号： G11C16/3418 , G06F11/1068 , G11C2029/0411
摘要： A method and apparatus for selectively restoring data in a non-volatile memory array based on failure type. Weakened data and erroneous data are identified by performing two readings of a specific memory section. Alternatively, an error correction code is used after a first reading of data to identify erroneous data. The manner in which data is restored will depend on whether the data changed because of an erase failure or a program failure. If only a program failure occurred then the data will be reprogrammed without an intervening erase step. If the data experienced an erase failure, then the data will be erased prior to being programmed with correct data.
摘要翻译：一种用于基于故障类型选择性地恢复非易失性存储器阵列中的数据的方法和装置。通过执行特定存储器部分的两个读数来识别弱数据和错误数据。或者，在首次读取数据之后使用纠错码来识别错误数据。数据恢复的方式取决于数据是否因擦除故障或程序故障而改变。如果仅发生程序故障，则数据将被重新编程，而无需中间擦除步骤。如果数据经历擦除故障，则在使用正确的数据编程之前，数据将被擦除。

2. 发明授权

US07567891B1 Hot-carrier device degradation modeling and extraction methodologies 有权
标题翻译：热载体降解建模和提取方法
公开(公告)号：US07567891B1
公开(公告)日：2009-07-28
申请号：US09969185
申请日：2001-09-27
申请人： Zhihong Liu , Lifeng Wu , Jeong Y. Choi , Ping Chen , Alvin I. Chen , Gang Zhang
发明人： Zhihong Liu , Lifeng Wu , Jeong Y. Choi , Ping Chen , Alvin I. Chen , Gang Zhang
IPC分类号： G06F7/60 , G06F17/50 , G06F9/45 , G01R15/00 , G01R27/28 , G01R27/26 , H03K19/20 , H03K19/094
CPC分类号： G06F17/5036 , G01R31/2848 , G06F2217/78
摘要： The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of building device degradation models, including allowing the user to select a device parameter used to build the device degradation model independent of the device parameter selected. The user can also select the functional relation between stress time and degradation level. To further improve accuracy, multiple acceleration parameters can be used to account for different regions of the degradation process. Analytical functions may be used to represent aged device model parameters, either directly or by fitting measured device parameters versus device age values, allowing devices with different age values to share the same device model. The concept of binning is extended to include device degradation. In addition to a binning based on device width and length, age is added. In an exemplary embodiment, only devices with minimum channel length have degraded models constructed. The present invention also allows the degradation of one device parameter to be determined based on an age value derived from another parameter. In yet another aspect, a degraded device is modeled as a fresh device with a voltage source connected to a terminal.
摘要翻译：本发明涉及用于热载体装置降解建模和提取的方法的许多改进。提出了改进建筑设备劣化模型的几个改进，包括允许用户选择用于构建设备退化模型的设备参数，而不依赖于所选择的设备参数。用户还可以选择应力时间与劣化水平之间的功能关系。为了进一步提高精度，可以使用多个加速参数来解释退化过程的不同区域。分析功能可以直接表示老化的设备模型参数，也可以通过拟合测量的设备参数与设备寿命值进行比较，从而允许具有不同年龄值的设备共享相同的设备型号。分箱的概念被扩展到包括设备退化。除了基于设备宽度和长度的分类，还添加了年龄。在示例性实施例中，只有具有最小信道长度的设备具有构造的退化模型。本发明还允许基于从另一参数导出的年龄值来确定一个设备参数的劣化。在另一方面，劣化设备被建模为具有连接到终端的电压源的新设备。

3. 发明授权

US07292968B2 Hot carrier circuit reliability simulation 有权
标题翻译：热载体电路可靠性仿真
公开(公告)号：US07292968B2
公开(公告)日：2007-11-06
申请号：US09832933
申请日：2001-04-11
申请人： Lifeng Wu , Zhihong Liu , Alvin I. Chen , Jeong Y. Choi , Bruce W. McGaughy
发明人： Lifeng Wu , Zhihong Liu , Alvin I. Chen , Jeong Y. Choi , Bruce W. McGaughy
IPC分类号： G06F17/50 , G06F9/44
CPC分类号： G06F17/5036
摘要： The present invention is directed to a number of improvements in methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects. A plurality of different circuit stress times can be simulated within a single run. Different aging criteria may be used for different circuit blocks, circuit block types, devices, device models and device types. The user may specify the degradation of selected circuit blocks, circuit block types, devices, device models and device types independently of the simulation. Device degradation can be characterized in tables. Continuous degradation levels can be quantized. Techniques are also described for representing the aged device in the netlist as the fresh device augmented with a plurality of independent current sources connected between its terminals to mimic the effects of aging in the device. The use of device model cards with age parameters is also described. To further improve the circuit reliability simulation, a gradual or multi-step aging is used instead of the standard one step aging process. Many of these features can be embedded within the circuit simulator. A user data interface is also presented to implement these techniques and further allow users to enter their device models not presented in the simulator. For example, a proprietary model of, say, the substrate current in an NMOS could used be with a SPICE simulator employing a different model to simulate the aging of the circuit.
摘要翻译：本发明涉及在老化电路中的可靠性模拟方法的许多改进，其操作已经通过热载波或其它效应而降级。可以在单次运行中模拟多个不同的电路应力时间。不同的老化标准可用于不同的电路块，电路块类型，器件，器件型号和器件类型。用户可以独立于模拟来指定所选择的电路块，电路块类型，设备，设备模型和设备类型的劣化。器件劣化可以在表中进行表征。可以量化连续降解水平。还描述了用于在网表中表示老化设备的技术，因为新设备通过连接在其终端之间的多个独立电流源来增强，以模拟设备中的老化的影响。还描述了使用具有年龄参数的设备型号卡。为了进一步提高电路可靠性仿真，采用逐步或多步老化代替标准的一步老化过程。这些功能中的许多可以嵌入在电路仿真器中。还呈现用户数据接口以实现这些技术，并且进一步允许用户输入其未在模拟器中呈现的设备模型。例如，一个专有的模型，例如NMOS中的衬底电流可以用SPICE仿真器使用不同的模型来模拟电路的老化。

4. 发明授权

US08460995B2 Method of forming a MIM capacitor 有权
标题翻译：形成MIM电容器的方法
公开(公告)号：US08460995B2
公开(公告)日：2013-06-11
申请号：US12804855
申请日：2010-07-30
申请人： Jeong Y. Choi
发明人： Jeong Y. Choi
IPC分类号： H01L21/8242
CPC分类号： H01L27/10894 , H01L27/10855 , H01L27/10882 , H01L27/10888
摘要： An embedded memory system includes an array of random access memory (RAM) cells, on the same substrate as an array of logic transistors. Each RAM cell includes an access transistor and a capacitor structure. The capacitor structure is fabricated by forming a metal-insulator-metal capacitor in a dielectric layer. The embedded RAM system includes fewer metal layers in the memory region than in the logic region.
摘要翻译：嵌入式存储器系统包括与逻辑晶体管阵列相同的衬底上的随机存取存储器（RAM）单元阵列。每个RAM单元包括存取晶体管和电容器结构。通过在电介质层中形成金属 - 绝缘体 - 金属电容器来制造电容器结构。嵌入式RAM系统在存储器区域中比在逻辑区域中包括更少的金属层。

5. 发明申请

US20120025285A1 SYSTEM WITH LOGIC AND EMBEDDED MIM CAPACITOR 有权
标题翻译：具有逻辑和嵌入式MIM电容的系统
公开(公告)号：US20120025285A1
公开(公告)日：2012-02-02
申请号：US13191423
申请日：2011-07-26
申请人： Jeong Y. Choi
发明人： Jeong Y. Choi
IPC分类号： H01L27/108 , H01L21/8242
CPC分类号： H01L27/10852 , H01L27/105 , H01L27/10894 , H01L27/11 , H01L27/1116 , H01L28/91
摘要： An embedded memory system includes an array of random access memory (RAM) cells, on the same substrate as an array of logic transistors. Each RAM cell includes an access transistor and a capacitor structure. The capacitor structure is fabricated by forming a metal-insulator-metal capacitor in a dielectric layer. The embedded RAM system includes fewer metal layers in the logic region than in the memory region
摘要翻译：嵌入式存储器系统包括与逻辑晶体管阵列相同的衬底上的随机存取存储器（RAM）单元阵列。每个RAM单元包括存取晶体管和电容器结构。通过在电介质层中形成金属 - 绝缘体 - 金属电容器来制造电容器结构。嵌入式RAM系统在逻辑区域中包括比在存储器区域中更少的金属层

6. 发明申请

US20110141812A1 Method and Apparatus for Restoring Data in a Non-Volatile Memory 有权
标题翻译：用于在非易失性存储器中恢复数据的方法和装置
公开(公告)号：US20110141812A1
公开(公告)日：2011-06-16
申请号：US13027621
申请日：2011-02-15
申请人： Jeong Y. Choi , Stephen Fung
发明人： Jeong Y. Choi , Stephen Fung
IPC分类号： G11C16/06
CPC分类号： G11C16/3418 , G06F11/1068 , G11C2029/0411
摘要： A method and apparatus for selectively restoring data in a non-volatile memory array based on failure type. Weakened data and erroneous data are identified by performing two readings of a specific memory section. Alternatively, an error correction code is used after a first reading of data to identify erroneous data. The manner in which data is restored will depend on whether the data changed because of an erase failure or a program failure. If only a program failure occurred then the data will be reprogrammed without an intervening erase step. If the data experienced an erase failure, then the data will be erased prior to being programmed with correct data.
摘要翻译：一种用于基于故障类型选择性地恢复非易失性存储器阵列中的数据的方法和装置。通过执行特定存储器部分的两个读数来识别弱数据和错误数据。或者，在首次读取数据之后使用纠错码来识别错误数据。数据恢复的方式取决于数据是否因擦除故障或程序故障而改变。如果仅发生程序故障，则数据将被重新编程，而无需中间擦除步骤。如果数据经历擦除故障，则在使用正确的数据编程之前，数据将被擦除。

7. 发明授权

US07929359B2 Embedded DRAM with bias-independent capacitance 有权
标题翻译：具有偏置独立电容的嵌入式DRAM
公开(公告)号：US07929359B2
公开(公告)日：2011-04-19
申请号：US12291762
申请日：2008-11-13
申请人： Jae Hong Jeong , Jeong Y. Choi
发明人： Jae Hong Jeong , Jeong Y. Choi
IPC分类号： G11C5/14 , G11C11/24 , G11C8/00
CPC分类号： H01L27/105 , G11C8/08 , G11C11/404 , H01L27/10897
摘要： An embedded memory system that includes DRAM cells and logic transistors. The capacitor of the embedded memory responds to a positive bias voltage of ½ Vdd. The wordline driver of a p-channel access transistor applying the positive power supply voltage when the p-channel access FET is not being accessed and a voltage lower than the threshold voltage of the p-channel access FET is being accessed. For DRAM cells containing an n-channel access FET, the wordline driver applies either a negative voltage or the ground voltage to the n-channel access FET when the DRAM cell is not being accessed. A second voltage composed of Vdd and a boosted voltage is applied to the n-channel FET when the DRAM cell is being accessed.
摘要翻译：包括DRAM单元和逻辑晶体管的嵌入式存储器系统。嵌入式存储器的电容器响应½Vdd的正偏置电压。 p沟道存取晶体管的字线驱动器在p沟道存取FET未被访问时施加正电源电压，并且正在访问低于p沟道存取FET的阈值电压的电压。对于包含n沟道存取FET的DRAM单元，当DRAM单元未被访问时，字线驱动器向n沟道存取FET施加负电压或接地电压。当DRAM单元被访问时，由Vdd和升压电压构成的第二电压被施加到n沟道FET。

8. 发明申请

US20100202203A1 Data restoration method for a non-volatile memory 有权
标题翻译：用于非易失性存储器的数据恢复方法
公开(公告)号：US20100202203A1
公开(公告)日：2010-08-12
申请号：US12378248
申请日：2009-02-11
申请人： Jeong Y. Choi , Stephen Fung
发明人： Jeong Y. Choi , Stephen Fung
IPC分类号： G11C16/04 , G11C29/00 , G11C16/06 , G11C7/00
CPC分类号： G11C16/3418 , G06F11/1068 , G11C2029/0411
摘要： A method and apparatus for selectively restoring data in a non-volatile memory array based on failure type. Weakened data and erroneous data are identified by performing two readings of a specific memory section. Alternatively, an error correction code is used after a first reading of data to identify erroneous data. The manner in which data is restored will depend on whether the data changed because of an erase failure or a program failure. If only a program failure occurred then the data will be reprogrammed without an intervening erase step. If the data experienced an erase failure, then the data will be erased prior to being programmed with correct data.
摘要翻译：一种用于基于故障类型选择性地恢复非易失性存储器阵列中的数据的方法和装置。通过执行特定存储器部分的两个读数来识别弱数据和错误数据。或者，在首次读取数据之后使用纠错码来识别错误数据。数据恢复的方式取决于数据是否因擦除故障或程序故障而改变。如果仅发生程序故障，则数据将被重新编程，而无需中间擦除步骤。如果数据经历擦除故障，则在使用正确的数据编程之前，数据将被擦除。

9. 发明申请

US20100120213A1 Embedded DRAM with multiple gate oxide thicknesses 有权
标题翻译：具有多个栅极氧化物厚度的嵌入式DRAM
公开(公告)号：US20100120213A1
公开(公告)日：2010-05-13
申请号：US12291765
申请日：2008-11-13
申请人： Jeong Y. Choi
发明人： Jeong Y. Choi
IPC分类号： H01L21/8242
CPC分类号： H01L27/10894 , H01L27/1085 , H01L27/10861 , H01L27/10873 , H01L29/66181
摘要： A method of forming an embedded DRAM cell having multiple-thickness gate dielectrics. An oxidation-enhancing dopant is selectively implanted into a well region in an area that is exposed by a first mask. A thermal oxidation step simultaneously produces the field dielectric for two distinct devices each having a different oxide thickness. The method is applicable to quad-density DRAM cells using fewer oxidation steps. The method is also applicable to planar DRAM cells, and does not require increasing the number of masks during the fabrication of planar DRAM cells.
摘要翻译：一种形成具有多层栅极电介质的嵌入式DRAM单元的方法。将氧化增强掺杂剂选择性地注入到通过第一掩模曝光的区域中的阱区中。热氧化步骤同时产生两个不同器件的场电介质，每个不同的器件具有不同的氧化物厚度。该方法适用于使用较少氧化步骤的四密度DRAM单元。该方法也适用于平面DRAM单元，并且在制造平面DRAM单元期间不需要增加掩模的数量。

10. 发明申请

US20090299716A1 Hot-Carrier Device Degradation Modeling and Extraction Methodologies 审中-公开
标题翻译：热载体装置降解建模和提取方法
公开(公告)号：US20090299716A1
公开(公告)日：2009-12-03
申请号：US12486191
申请日：2009-06-17
申请人： Zhihong Liu , Lifeng Wu , Jeong Y. Choi , Ping Chen , Alvin I. Chen , Gang Zhang
发明人： Zhihong Liu , Lifeng Wu , Jeong Y. Choi , Ping Chen , Alvin I. Chen , Gang Zhang
IPC分类号： G06F17/50 , G01R31/26
CPC分类号： G06F17/5036 , G01R31/2848 , G06F2217/78
摘要： The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of building device degradation models, including allowing the user to select a device parameter used to build the device degradation model independent of the device parameter selected. The user can also select the functional relation between stress time and degradation level. To further improve accuracy, multiple acceleration parameters can be used to account for different regions of the degradation process. Analytical functions may be used to represent aged device model parameters, either directly or by fitting measured device parameters versus device age values, allowing devices with different age values to share the same device model. The concept of binning is extended to include device degradation. In addition to a binning based on device width and length, age is added. In an exemplary embodiment, only devices with minimum channel length have degraded models constructed. The present invention also allows the degradation of one device parameter to be determined based on an age value derived from another parameter. In yet another aspect, a degraded device is modeled as a fresh device with a voltage source connected to a terminal.
摘要翻译：本发明涉及用于热载体装置降解建模和提取的方法的许多改进。提出了改进建筑设备劣化模型的几个改进，包括允许用户选择用于构建设备退化模型的设备参数，而不依赖于所选择的设备参数。用户还可以选择应力时间与劣化水平之间的功能关系。为了进一步提高精度，可以使用多个加速参数来解释退化过程的不同区域。分析功能可以直接表示老化的设备模型参数，也可以通过拟合测量的设备参数与设备寿命值进行比较，从而允许具有不同年龄值的设备共享相同的设备型号。分箱的概念被扩展到包括设备退化。除了基于设备宽度和长度的分类，还添加了年龄。在示例性实施例中，只有具有最小信道长度的设备具有构造的退化模型。本发明还允许基于从另一参数导出的年龄值来确定一个设备参数的劣化。在另一方面，劣化设备被建模为具有连接到终端的电压源的新设备。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式