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1. 发明授权

US07647483B2 Multi-threaded parallel processor methods and apparatus 有权
标题翻译：多线程并行处理器的方法和装置
公开(公告)号：US07647483B2
公开(公告)日：2010-01-12
申请号：US11676837
申请日：2007-02-20
申请人： John P. Bates , Attila Vass
发明人： John P. Bates , Attila Vass
IPC分类号： G06F9/48
CPC分类号： G06F9/463 , G06F9/4881
摘要： A processor system and a processor readable medium, which implement a method for implementing multiple contexts on one or more SPE are disclosed. Code and/or data for a first and second contexts may be respectively stored simultaneously in first and second regions of an SPE's local memory, storing code and/or data for a second context in a second region of the local memory, the SPE may execute the first context while the second context waits. Code and/or data for the first context may be transferred from the first region to the second and code and/or data for the second context may be transferred from the second region to the first, and the SPE may execute the second context during a pause or stoppage of execution of the first context. Alternatively, the code and/or data for the second context may be transferred to another SPE's local memory.
摘要翻译：公开了一种处理器系统和处理器可读介质，其实现用于在一个或多个SPE上实现多个上下文的方法。第一和第二上下文的代码和/或数据可以分别同时存储在SPE的本地存储器的第一和第二区域中，在本地存储器的第二区域中存储第二上下文的代码和/或数据，SPE可以执行第二个上下文等待的第一个上下文。用于第一上下文的代码和/或数据可以从第一区域传送到第二区域，并且用于第二上下文的代码和/或数据可以从第二区域传送到第一区域，并且SPE可以在第一区域期间执行第二上下文暂停或停止执行第一个上下文。或者，用于第二上下文的代码和/或数据可以被传送到另一个SPE的本地存储器。

2. 发明授权

US07487147B2 Predictive user interface 有权
标题翻译：预测用户界面
公开(公告)号：US07487147B2
公开(公告)日：2009-02-03
申请号：US11181540
申请日：2005-07-13
申请人： John P. Bates , Payton R. White , Yutaka Takeda
发明人： John P. Bates , Payton R. White , Yutaka Takeda
IPC分类号： G06F7/00 , G06F3/00 , G06F3/048
CPC分类号： G06F3/0236 , G06F3/0237 , G06F3/04817 , Y10S707/99935
摘要： A user interface enables the input of text and other complicated inputs by identifying entities having an increased likelihood of being selected and decreasing the precision needed to select these entities. The user interface displays a set of entities in a radial pattern. The user manipulates a pointer with a joystick or other input device to select entities. The entities having a higher selection probabilities are allocated more space in the pattern than the other entities. The entities having a higher selection probabilities may also be emphasized with visual cues. Selection probabilities may be determined by comparing a sequence of entities previously selected, such as a partially input word, with a set of commonly selected sequences of entities, such as a set of words commonly used by users. The user interface can display a list of words corresponding with a sequence of selected entities, including characters from different writing systems.
摘要翻译：用户接口通过识别具有增加的可能性被选择的实体并且降低选择这些实体所需的精度来实现文本和其他复杂输入的输入。用户界面以径向模式显示一组实体。用户使用操纵杆或其他输入设备操纵指针以选择实体。具有较高选择概率的实体在模式中被分配比其他实体更多的空间。具有更高选择概率的实体也可以用视觉线索强调。可以通过将先前选择的实体的序列（例如部分输入的字）与一组常用的实体序列（诸如用户通常使用的一组单词）进行比较来确定选择概率。用户界面可以显示与选定实体的序列相对应的单词列表，包括来自不同书写系统的字符。

3. 发明授权

US07421708B2 Peer-to-peer networking system using interconnectivity framework and peer library for interacting with applications 有权
标题翻译：使用互连框架和对等库的对等网络系统与应用程序交互
公开(公告)号：US07421708B2
公开(公告)日：2008-09-02
申请号：US10859430
申请日：2004-06-01
申请人： Attila Vass , Howard Berkey , John P. Bates , Payton R. White
发明人： Attila Vass , Howard Berkey , John P. Bates , Payton R. White
IPC分类号： G06F9/00
CPC分类号： H04L67/104 , H04L67/1002 , H04L67/1008 , H04L67/1046 , H04L67/1063 , H04L67/1068 , H04L67/108 , H04L67/1089 , H04L67/1093 , H04L67/34 , H04L69/329
摘要： An interconnectivity framework, method, and system for communicating in a peer-to-peer network is disclosed. A peer of the interconnectivity framework includes a peer library for publishing, messaging and locating component blocks over the peer-to-peer network and a telespace framework for managing component blocks in response to a requirement of an application to be executed at the peer. The component blocks being obtained by the peer library enable execution of the application at the peer in accordance with the requirement. The requirement defines the type of application so that the appropriate component blocks can be obtained from the peer-to-peer network. A networker is further included to enable communication with specific grids of the peer-to-peer network and to enable the publishing, messaging, and locating of objects published by specific peers of a grid of the peer-to-peer network.
摘要翻译：公开了一种用于在对等网络中通信的互连框架，方法和系统。互连框架的对等体包括用于在对等网络上发布，消息和定位组件块的对等库，以及用于响应于在对等体上执行的应用的需求来管理组件块的电话空间框架。由对等库获得的组件块可以根据要求在对等体上执行应用程序。该要求定义应用程序的类型，以便可以从对等网络获取适当的组件块。还包括网络器以实现与对等网络的特定网格的通信，并且能够发布，消息传送和定位由对等网络的网格的特定对等体发布的对象。

4. 发明授权

US08171235B2 Atomic compare and swap using dedicated processor 有权
标题翻译：使用专用处理器进行原子比较和交换
公开(公告)号：US08171235B2
公开(公告)日：2012-05-01
申请号：US12361301
申请日：2009-01-28
申请人： James E. Marr , John P. Bates
发明人： James E. Marr , John P. Bates
IPC分类号： G06F12/00
CPC分类号： G06F9/3004 , G06F9/30021 , G06F9/30087
摘要： An atomic compare and swap operation that can be implemented in processor system having first and second processors that have different sized memory transfer capabilities. The first processor notifies the second processor to perform a compare and swap operation on an address in main memory. The address has a size less than or equal to a maximum memory transfer size for the second processor and greater than a maximum memory transfer size for the first processor. The second processor atomically performs the compare and swap operation and notifies the first processor of the success or failure of the compare and swap operation.
摘要翻译：可以在具有不同大小的存储器传输能力的第一和第二处理器的处理器系统中实现的原子比较和交换操作。第一处理器通知第二处理器对主存储器中的地址执行比较和交换操作。地址的大小小于或等于第二处理器的最大内存传输大小，大于第一个处理器的最大内存传输大小。第二个处理器原子地执行比较和交换操作，并通知第一个处理器比较和交换操作的成功或失败。

5. 发明授权

US07979680B2 Multi-threaded parallel processor methods and apparatus 有权
标题翻译：多线程并行处理器的方法和装置
公开(公告)号：US07979680B2
公开(公告)日：2011-07-12
申请号：US12630775
申请日：2009-12-03
申请人： John P. Bates , Attila Vass
发明人： John P. Bates , Attila Vass
IPC分类号： G06F9/48
CPC分类号： G06F9/463 , G06F9/4881
摘要： A processor system may implement multiple contexts on one or more processors having a local memory. Code and/or data for first and second contexts may be respectively stored simultaneously in first and second regions of a processor's local memory, storing code and/or data for a second context in a second region of the local memory, the secondary processor may execute the first context while the second context waits. Code and/or data for the first context may be transferred from the first region to the second and code and/or data for the second context may be transferred from the second region to the first, and the processor may execute the second context during a pause or stoppage of execution of the first context. Alternatively, the code and/or data for the second context may be transferred to another processor's local memory.
摘要翻译：处理器系统可以在具有本地存储器的一个或多个处理器上实现多个上下文。第一和第二上下文的代码和/或数据可以分别同时存储在处理器的本地存储器的第一和第二区域中，在本地存储器的第二区域中存储用于第二上下文的代码和/或数据，次要处理器可以执行第二个上下文等待的第一个上下文。用于第一上下文的代码和/或数据可以从第一区域传送到第二区域，并且用于第二上下文的代码和/或数据可以从第二区域传送到第一区域，并且处理器可以在暂停或停止执行第一个上下文。或者，用于第二上下文的代码和/或数据可以被传送到另一个处理器的本地存储器。

6. 发明申请

US20100251245A1 PROCESSOR TASK AND DATA MANAGEMENT 有权
标题翻译：处理器任务和数据管理
公开(公告)号：US20100251245A1
公开(公告)日：2010-09-30
申请号：US12796601
申请日：2010-06-08
申请人： Richard B. Stenson , John P. Bates
发明人： Richard B. Stenson , John P. Bates
IPC分类号： G06F9/46 , G06F5/14 , G06F9/30 , G06F15/00
CPC分类号： G06F9/5044 , G06F2209/5017 , G06F2212/251 , G06F2212/253
摘要： Task and data management systems methods and apparatus are disclosed. A processor event that requires more memory space than is available in a local storage of a co-processor is divided into two or more segments. Each segment has a segment size that is less than or the same as an amount of memory space available in the local storage. The segments are processed with one or more co-processors to produce two or more corresponding outputs. The two or more outputs are associated into one or more groups. Each group is less than or equal to a target data size associated with a subsequent process.
摘要翻译：公开了任务和数据管理系统的方法和装置。需要比协处理器的本地存储器中可用的更多存储器空间的处理器事件被分成两个或更多个段。每个段具有小于或等于本地存储中可用的内存空间量的段大小。用一个或多个协处理器处理段以产生两个或更多个对应的输出。两个或更多个输出与一个或多个组相关联。每个组小于或等于与后续过程相关联的目标数据大小。

7. 发明授权

US07730119B2 Sub-task processor distribution scheduling 有权
标题翻译：子任务处理器分发调度
公开(公告)号：US07730119B2
公开(公告)日：2010-06-01
申请号：US11459301
申请日：2006-07-21
申请人： John P. Bates , Payton R. White
发明人： John P. Bates , Payton R. White
IPC分类号： G06F15/16
CPC分类号： G06F9/5044 , G06F19/00 , G06F2209/5017
摘要： A method for processing of processor executable tasks and a processor readable medium having embodied therein processor executable instructions for implementing the method are disclosed. A system for distributing processing work amongst a plurality of distributed processors is also disclosed.
摘要翻译：公开了一种用于处理可执行任务的方法和一种其中体现的用于实现该方法的处理器可执行指令的处理器可读介质。还公开了一种用于在多个分布式处理器之间分配处理工作的系统。

8. 发明申请

US20090147013A1 PROCESSOR TASK AND DATA MANAGEMENT 有权
标题翻译：处理器任务和数据管理
公开(公告)号：US20090147013A1
公开(公告)日：2009-06-11
申请号：US12371424
申请日：2009-02-13
申请人： Richard B. Stenson , John P. Bates
发明人： Richard B. Stenson , John P. Bates
IPC分类号： G06F15/80 , G06F9/46
CPC分类号： G06F9/5044 , G06F2209/5017 , G06F2212/251 , G06F2212/253
摘要： Task and data management systems methods and apparatus are disclosed. A processor event that requires more memory space than is available in a local storage of a co-processor is divided into two or more segments. Each segment has a segment size that is less than or the same as an amount of memory space available in the local storage. The segments are processed with one or more co-processors to produce two or more corresponding outputs.
摘要翻译：公开了任务和数据管理系统的方法和装置。需要比协处理器的本地存储器中可用的更多存储器空间的处理器事件被分成两个或更多个段。每个段具有小于或等于本地存储中可用的内存空间量的段大小。用一个或多个协处理器处理段以产生两个或更多个对应的输出。

9. 发明授权

US07522168B2 Cell processor task and data management 有权
标题翻译：单元处理器任务和数据管理
公开(公告)号：US07522168B2
公开(公告)日：2009-04-21
申请号：US11238095
申请日：2005-09-27
申请人： Richard B. Stenson , John P. Bates
发明人： Richard B. Stenson , John P. Bates
IPC分类号： G06T15/00
CPC分类号： G06F9/5044 , G06F2209/5017 , G06F2212/251 , G06F2212/253
摘要： Cell processor task and data management systems methods and apparatus are disclosed. A cell processor divides an event that event requires more memory space than is available in a local storage of a synergistic processing element (SPE) into two or more segments. Each segment has a segment size that is less than or the same as an amount of memory space available in the local storage. The segments are processed with one or more SPE of the cell processor to produce two or more corresponding outputs.
摘要翻译：公开了小区处理器任务和数据管理系统的方法和装置。单元处理器分配事件，该事件需要比在协同处理元件（SPE）的本地存储器中可用的更多存储器空间到两个或更多个段。每个段具有小于或等于本地存储中可用的内存空间量的段大小。用单元处理器的一个或多个SPE处理段以产生两个或更多个对应的输出。

10. 发明申请

US20080140771A1 SIMULATED ENVIRONMENT COMPUTING FRAMEWORK 审中-公开
标题翻译：模拟环境计算框架
公开(公告)号：US20080140771A1
公开(公告)日：2008-06-12
申请号：US11929681
申请日：2007-10-30
申请人： Attila Vass , Benbuck Nason , John P. Bates , James E. Marr , Ivy Tsai
发明人： Attila Vass , Benbuck Nason , John P. Bates , James E. Marr , Ivy Tsai
IPC分类号： G06F15/16
CPC分类号： A63F13/352 , A63F13/12 , A63F13/358 , A63F13/92 , A63F2300/513 , A63F2300/534 , A63F2300/5533 , H04L67/38
摘要： Apparatus and systems for implementing simulated environments are disclosed. Remote implementation of function calls is also disclosed. A simulated environment apparatus may include a plurality of simulation servers coupled to each other over data transfer links. The simulation servers may be configured to perform computations related to simulating an environment. A plurality of view servers may be coupled to the simulation servers over data transfer links. Each view server is configured to facilitate interaction between a plurality of client devices and the simulation servers. Each user device may control an avatar within the simulated environment. A simulated environment system may include a data center configured to communicate over a network with one or more remotely distributed client devices.
摘要翻译：公开了用于实现模拟环境的装置和系统。还公开了远程执行函数调用。模拟环境设备可以包括通过数据传输链路彼此耦合的多个仿真服务器。模拟服务器可以被配置为执行与模拟环境相关的计算。多个视图服务器可以通过数据传输链路耦合到仿真服务器。每个视图服务器被配置为促进多个客户端设备和仿真服务器之间的交互。每个用户设备可以控制模拟环境中的化身。模拟环境系统可以包括被配置为通过网络与一个或多个远程分布式客户端设备进行通信的数据中心。

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