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    • 2. 发明申请
    • Battery cell protection and conditioning circuit and system
    • 电池电池保护和调理电路及系统
    • US20110068745A1
    • 2011-03-24
    • US12678486
    • 2010-02-17
    • Ioannis Milios
    • Ioannis Milios
    • H02J7/00
    • H02J7/0031H01M10/052H01M10/441H02J7/0022
    • A type of protection and cell conditioning circuit is proposed that partly uses the typically existing hardware present in traditional cell-protection circuits and that can achieve an optimum state of charge for the individual cell independently from the actions of the external battery charger. For minimum cost, the proposed circuit and system can solve the battery-cell-balancing problem, while optimizing the performance of the battery pack and while simultaneously enhancing the safety of the battery pack. Multiple battery cells can be communicatively combined to form large batteries. Information from and commands to each of the individual battery cells can be relayed through a low-power serial bus in order to form “intelligent” and optimally managed battery systems.
    • 提出了一种类型的保护和电池调理电路,其部分地使用传统电池保护电路中存在的通常存在的硬件,并且可以独立于外部电池充电器的动作实现各个电池的最佳充电状态。 为了最低成本,所提出的电路和系统可以解决电池电池平衡问题,同时优化电池组的性能,同时提高电池组的安全性。 多个电池可以通信组合形成大电池。 可以通过低功率串行总线中继每个单独的电池单元的信息和命令,以形成“智能”和最佳管理的电池系统。
    • 3. 发明申请
    • Cell charge management system
    • 细胞电荷管理系统
    • US20120256593A1
    • 2012-10-11
    • US13516732
    • 2011-02-10
    • Ioannis Milios
    • Ioannis Milios
    • H02J7/00
    • H02J7/0019H01M10/441Y02T10/7055
    • A series array of electrochemical cells is charged by first applying a first charging current to the series array, thereby applying the first charging current to each of the cells in the series array. When one of the cells reaches a predefined maximum voltage, the series charging current is ceased. A second charging current is then selectively applied to various of the cells in the series array, topping up each of the cells in the series array. Priority is given to the weakest cell in the array. If there is an idle time for the battery load before the array is connected to a load, then charge is transferred from fully charged cells to weaker cells, thereby reducing charge imbalance among the cells. The array is connected to a load and power is drawn from the series array.
    • 通过首先对串联阵列施加第一充电电流来对电化学电池的一系列阵列进行充电,从而将第一充电电流施加到串联阵列中的每个电池。 当其中一个电池达到预定的最大电压时,串联充电电流停止。 然后,将第二充电电流选择性地施加到串联阵列中的各个单元,从而对串联阵列中的每个单元进行补充。 优先级被赋予阵列中最弱的单元。 如果在阵列连接到负载之前电池负载有空闲时间,则充电将从完全充电的电池转移到较弱的电池,从而减少电池之间的电荷不平衡。 该阵列连接到一个负载,并且从串联阵列中抽出功率。
    • 6. 发明授权
    • Conveyor for conveying people
    • 输送机输送人
    • US07100334B2
    • 2006-09-05
    • US10250003
    • 2003-05-27
    • Ioannis MiliosDimitrios Korres
    • Ioannis MiliosDimitrios Korres
    • E04F11/00
    • E04F11/00
    • A conveyor specialized to convey people, and more particularly a conveyor which may serve as a conventional staircase, comprises treads that can individually raise and lower by the amount of the tread rise. To ascend, a user stands on the lowest level, and the tread lifts to match the height of the next tread. The user steps forward to the next tread. That tread likewise lifts to match the height of the next tread, and so on. In this way the user is able to ascend the height of the staircase without having to step up. A corresponding process permits descending the height of the staircase without having to step down. The conveyor can work even if the staircase winds or curves or goes around corners. Optionally a platform is caused to move laterally from each step to the next, so that the user need not even step forward during the process.
    • 专门用于输送人的输送机,更具体地,可用作传统的楼梯的输送机,包括可以单独地提升和降低胎面上升量的踏面。 上升时,使用者站在最低水平面上,并且胎面抬起以匹配下一个胎面的高度。 用户向前走到下一步。 该胎面同样升高以匹配下一个胎面的高度,等等。 以这种方式,用户能够上升楼梯的高度而不必加强。 相应的过程允许楼梯的高度下降而不必下降。 即使楼梯风弯曲或转弯,输送机也可以工作。 可选地,使平台从每个步骤横向移动到下一个步骤,使得用户在该过程期间不需要甚至前进。
    • 7. 发明授权
    • Power conservation with a synchronous master-slave serial data bus
    • 使用同步主从串行数据总线进行省电
    • US06557063B1
    • 2003-04-29
    • US09868294
    • 2002-06-04
    • Wei WangVictor MartenIoannis Milios
    • Wei WangVictor MartenIoannis Milios
    • G06F1300
    • H04L7/0008H04L1/1803
    • A system is described in which the Master can stop its clock and go into a low-power state (for power conservation reasons) at arbitrary times. Before going into the stopped-clock or low-power mode, the Master checks that the serial bus is idle (defined as both Clock and Data lines being “High”). A latch circuit is provided which is active when them aster is in low-power mode. The latch circuit watches for the very first negative-going clock pulse (from the slave), and its configuration is such that when latched, it holds the clock line low. Holding the clock line low prompts the slave to discontinue efforts to send the data. Stated differently, the slave will not conclude that it had successfully sent its data, and this prompts the slave to retain a copy of its data for later resending.
    • 描述了一种系统,其中主机可以在任意时间停止其时钟并进入低功率状态(为了省电原因)。 在进入停止时钟或低功耗模式之前,主器件检查串行总线是否空闲(定义为时钟和数据线均为“高”)。 提供一个锁存电路,当它们处于低功率模式时,该电路是有效的。 锁存电路监视第一个负向时钟脉冲(从从器件),其配置使得当锁存时,它将时钟线保持为低电平。 保持时钟线为低提示从机停止发送数据的努力。 换句话说,奴隶不会断定它已成功发送其数据,并且这提示从属方保留其数据的副本以供稍后重新发送。
    • 8. 发明授权
    • Clock stretcher and level shifter with small component count and low power consumption
    • 时钟延长器和电平移位器,具有小的元件数量和低功耗
    • US06239644B1
    • 2001-05-29
    • US09445191
    • 2000-03-15
    • Victor MartenIoannis MiliosWei Wang
    • Victor MartenIoannis MiliosWei Wang
    • H03L500
    • H03K19/018507G06F1/08G06F13/4217Y02D10/14Y02D10/151
    • A clock stretching circuit (110) mites between a synchronous bus (112) and a microcontroller (124) which is asleep most of the time to save electrical power. The bus is of a type in which a slow bus device can cause the sender of data to “hold” the data until the slow device is up to speed. The stretching circuit (110) is of small component count and low power consumption, and there is no requirement for a continuous clock. In one embodiment is comprised of a triple analog switch (120, 121, 122) and a very small number of additional components. In another embodiment a dual four-position multiplexer (162, 163) is employed. In still another embodiment, four transistors (210, 212, 213, 215) are used with handful of additional components. A level shifter (220, 221, 222, 223) including an MOSFET and a large-value resistor help to minimize power drain within the bus device. The components can be external to an off-the-shelf microcontroller or can be included in an IC that also contains an embedded microcontroller.
    • 时钟延长电路(110)在同步总线(112)和微处理器(124)之间ites),大部分时间都在睡眠以节省电力。 总线是一种类型,其中慢速总线设备可以使数据的发送者“保持”数据,直到慢速设备达到速度。 拉伸电路(110)的元件数量小,功耗低,不需要连续时钟。 在一个实施例中,包括三重模拟开关(120,121,122)和非常少量的附加组件。 在另一个实施例中,采用双重四位多路复用器(162,163)。 在另一个实施例中,四个晶体管(210,212,213,215)与少数附加组件一起使用。 包括MOSFET和大值电阻的电平移位器(220,221,222,223)有助于最小化总线装置内的功率消耗。 这些组件可以在现成的微控制器外部,也可以包含在还包含嵌入式微控制器的IC中。
    • 9. 发明授权
    • Stored program system with protected memory and secure signature
extraction
    • 存储程序系统具有受保护的内存和安全签名提取
    • US5860099A
    • 1999-01-12
    • US61203
    • 1993-05-12
    • Ioannis MiliosCarl Oppedahl
    • Ioannis MiliosCarl Oppedahl
    • G06F12/14H04L9/32G06F12/00H04L9/00
    • H04L9/3247G06F12/1408H04L2209/605
    • A controller contains software which, when triggered in some prearranged way such as assertion of an input to the controller, calculates a digital signature for the contents of the protected memory of the controller. The digital signature is preferably extracted from the contents of the memory with a function that varies greatly with even small changes to the memory contents. The function preferably is such that one cannot easily determine from the output what input generated the output. The function is preferably such that one cannot easily create a data set for input that yields any particular predetermined output. The circuitry generating the signature may be embedded in hardware of the controller so that its digital signature function is unknown even to the programmer writing the main body of code to be stored in the protected memory. With such a hardware configuration, it is possible to have a very high degree of confidence that the memory contents are what they are expected to be.
    • 控制器包含软件,当以某种预先安排的方式触发时,例如断言到控制器的输入,计算控制器的受保护存储器的内容的数字签名。 优选地,从存储器的内容中提取数字签名,其功能随着对存储器内容的甚至小的改变而大大变化。 该功能优选地使得不能从输出容易地确定产生输出的输入。 该功能优选地使得不能容易地创建用于产生任何特定预定输出的输入的数据集。 生成签名的电路可以嵌入在控制器的硬件中,使得即使对于编写要存储在受保护存储器中的代码主体的编程器,其数字签名功能也是未知数。 通过这样的硬件配置,可以非常高的置信度使得存储器内容是它们预期的内容。
    • 10. 发明授权
    • Enegry-saving keyboard
    • 节省空间的键盘
    • US5585792A
    • 1996-12-17
    • US328077
    • 1994-10-24
    • Jun LiuIoannis Milios
    • Jun LiuIoannis Milios
    • G06F1/32H03K17/00H03M11/20H03K17/94
    • G06F1/3215G06F1/3271H03M11/20H03K2217/0036Y02B60/1257
    • An improved energy-saving keyboard with low parts count accomplishes a sophisticated regime of low-power mode intervals in response to key closures and communications from the computer to which the keyboard is connected. An interrupt pin of the keyboard controller (encoder) prompts the transition from low-power mode to normal mode. The communications from the computer is synchronous communications mediated by a clock line, and the interrupt pin is tied not to the clock line but to the data line of the synchronous channel. The interrupt pin is also tied to a resistor array providing pullup biases to the keyboard matrix; in normal-power mode a discrete output of the encoder forces the common point of the resistor array to a fixed voltage level. In low-power mode, on the other hand, the discrete output is not asserted, and the resistor array is pulled high by a pullup impedance of relatively high resistance to the fixed voltage level. In this way, any key closure at the keyboard triggers the interrupt. LEDs, if lit, are gradually dimmed in the absence of key activity, to conserve electrical power.
    • 具有低零件数量的改进的节能键盘响应于键盘连接到的计算机的关键关闭和通信,实现了低功率模式间隔的复杂方式。 键盘控制器(编码器)的中断引脚提示从低功耗模式转换到正常模式。 来自计算机的通信是由时钟线介导的同步通信,并且中断引脚不连接到时钟线,而是与同步通道的数据线相连。 中断引脚也连接到电阻器阵列,为键盘矩阵提供上拉偏移; 在正常功率模式下,编码器的离散输出将电阻器阵列的公共点强制到固定的电压电平。 另一方面,在低功耗模式下,离散输出不被置位,并且电阻器阵列被拉高到具有相对高的固定电压电阻的上拉阻抗。 以这种方式,键盘上的任何键关闭触发中断。 LED如果点亮,在没有关键活动的情况下逐渐变暗,以节省电力。