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1. 发明授权

US08362556B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08362556B2
公开(公告)日：2013-01-29
申请号：US12835514
申请日：2010-07-13
申请人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
发明人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
IPC分类号： H01L29/66
CPC分类号： H01L29/7835 , H01L21/76264 , H01L29/0653 , H01L29/1083 , H01L29/4238 , H01L29/7391 , H01L29/7816
摘要： A semiconductor device includes a substrate with one or more active regions and an isolation layer formed to surround an active region and to extend deeper into the substrate than the one or more active regions. The semiconductor further includes a gate electrode, which covers a portion of the active region, and which has one end; portion thereof extending over the isolation layer.
摘要翻译：半导体器件包括具有一个或多个有源区的衬底和形成为围绕有源区并且比一个或多个有源区更深地延伸到衬底中的隔离层。半导体还包括覆盖有源区的一部分并具有一端的栅电极; 其部分在隔离层上延伸。

2. 发明申请

US20120049278A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120049278A1
公开(公告)日：2012-03-01
申请号：US13290535
申请日：2011-11-07
申请人： Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young CHAE , In-Taek OH
发明人： Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young CHAE , In-Taek OH
IPC分类号： H01L29/78
CPC分类号： H01L29/0847 , H01L29/0653 , H01L29/0878 , H01L29/42368 , H01L29/7816 , H01L29/7835
摘要： The semiconductor device includes: a first conductive-type first well and a second conductive-type second well configured over substrate to contact each other; a second conductive-type anti-diffusion region configured in an interface where the first conductive-type first well contacts the second conductive-type second well over the substrate; and a gate electrode configured to simultaneously cross the first conductive-type first well, the second conductive-type anti-diffusion region, and the second conductive-type second well over the substrate.
摘要翻译：半导体器件包括：第一导电型第一阱和第二导电类型的第二阱，被配置在衬底上以彼此接触; 第二导电型防扩散区，其配置在所述第一导电型第一阱与所述第二导电型第二阱相接触的界面处; 以及栅电极，其被配置为在所述衬底上同时与所述第一导电型第一阱，所述第二导电型反扩散区和所述第二导电型第二阱交叉。

3. 发明授权

US07369563B2 Method and apparatus for sharing a single internet protocol address without a network address translation in an internet access gateway for a local network 有权
标题翻译：用于在本地网络的互联网接入网关中共享单个互联网协议地址而不进行网络地址转换的方法和装置
公开(公告)号：US07369563B2
公开(公告)日：2008-05-06
申请号：US10436093
申请日：2003-05-13
申请人： Hyung-Suk Choi , Kee-Ho Park
发明人： Hyung-Suk Choi , Kee-Ho Park
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L29/12018 , H04L12/2856 , H04L12/2874 , H04L29/12009 , H04L29/12924 , H04L61/10 , H04L61/6063
摘要： Disclosed is a technique which can share single public Internet protocol without a network address translation when a plurality of computers use the Internet through an Internet access gateway. The Internet access gateway according to the invention includes a local network access point which is connected to a local network for either inputting or outputting a packet either to local network or therefrom; an Internet access point which is connected to the Internet for either inputting or outputting the packet either to the Internet or therefrom; a port translation table for storing nodes having one Internet protocol address, public port numbers corresponding to each of the nodes, a local port number corresponding to each of the nodes, and a media access control (MAC) address corresponding to each of the nodes; and an address translation processor for changing a public port number using a local port number and the MAC address included in an Internet protocol packet as delimiters in a predetermined assigning manner when the Internet protocol packet is received at the local network, storing a changed public number in the port translation table, for a public port number corresponding to an Internet protocol packet with reference to the port translation table when the Internet protocol packet is received at the Internet, and searching for a local port number corresponding to the public port number.
摘要翻译：公开了当多个计算机通过因特网接入网关使用因特网时，可以共享单个公共因特网协议而不进行网络地址转换的技术。根据本发明的因特网接入网关包括本地网络接入点，其连接到本地网络，用于向本地网络或从其输入或输出分组; 互联网接入点，其连接到互联网，用于将数据包输入或输出到因特网或从该互联网; 用于存储具有一个因特网协议地址的节点的端口转换表，对应于每个节点的公共端口号，与每个节点对应的本地端口号，以及与每个节点对应的媒体访问控制（MAC）地址; 以及地址转换处理器，用于当在本地网络上接收到因特网协议分组时，使用本地端口号和包含在因特网协议分组中的MAC地址作为分隔符以预定分配方式改变公共端口号，存储改变的公共号码在端口转换表中，对于在Internet上接收到因特网协议分组时参照端口转换表对应于因特网协议分组的公共端口号，并搜索与公共端口号对应的本地端口号。

4. 发明授权

US09105684B2 Isolation structure, semiconductor device having the same, and method for fabricating the isolation structure 有权
标题翻译：隔离结构，具有相同的半导体器件，以及用于制造隔离结构的方法
公开(公告)号：US09105684B2
公开(公告)日：2015-08-11
申请号：US13465593
申请日：2012-05-07
申请人： Hyung-suk Choi , Hyun-tae Jung , Eung-ryul Park , Da-soon Lee
发明人： Hyung-suk Choi , Hyun-tae Jung , Eung-ryul Park , Da-soon Lee
IPC分类号： H01L29/06 , H01L21/762 , H01L21/761
CPC分类号： H01L29/0649 , H01L21/761 , H01L21/76224
摘要： An isolation structure of a semiconductor, a semiconductor device having the same, and a method for fabricating the isolation structure are provided. An isolation structure of a semiconductor device may include a trench formed in a substrate, an oxide layer formed on a bottom surface and an inner sidewall of the trench, a filler formed on the oxide layer to fill a part of inside of the trench, and a fourth oxide layer filling an upper portion of the filler of the trench to a height above an upper surface of the trench, an undercut structure being formed on a boundary area between the inner sidewall and the oxide layer.
摘要翻译：提供半导体的隔离结构，具有该隔离结构的半导体器件以及用于制造隔离结构的方法。半导体器件的隔离结构可以包括形成在衬底中的沟槽，形成在沟槽的底表面和内侧壁上的氧化物层，形成在氧化物层上以填充沟槽内部的一部分的填充物，以及将沟槽的填料的上部填充到沟槽的上表面上方的高度的第四氧化物层，在内侧壁和氧化物层之间的边界区域上形成底切结构。

5. 发明申请

US20140021542A1 SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20140021542A1
公开(公告)日：2014-01-23
申请号：US13957103
申请日：2013-08-01
申请人： Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young Chae , In-Taek OH
发明人： Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young Chae , In-Taek OH
IPC分类号： H01L29/78
CPC分类号： H01L29/7816 , H01L29/0878 , H01L29/42368 , H01L29/66681
摘要： A semiconductor device includes a second conductive-type deep well configured above a substrate. The deep well includes an ion implantation region and a diffusion region. A first conductive-type first well is formed in the diffusion region. A gate electrode extends over portions of the ion implantation region and of the diffusion region, and partially overlaps the first well. The ion implantation region has a uniform impurity concentration whereas the impurity concentration of the diffusion region varies from being the highest concentration at the boundary interface between the ion implantation region and the diffusion region to being the lowest at the portion of the diffusion region that is the farthest away from the boundary interface.

6. 发明授权

US08546883B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08546883B2
公开(公告)日：2013-10-01
申请号：US12835523
申请日：2010-07-13
申请人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
发明人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
IPC分类号： H01L29/66
CPC分类号： H01L29/7816 , H01L29/0878 , H01L29/42368 , H01L29/66681
摘要： A semiconductor device includes a second conductive-type deep well configured above a substrate. The deep well includes an ion implantation region and a diffusion region. A first conductive-type first well is formed in the diffusion region. A gate electrode extends over portions of the ion implantation region and of the diffusion region, and partially overlaps the first well. The ion implantation region has a uniform impurity concentration whereas the impurity concentration of the diffusion region varies from being the highest concentration at the boundary interface between the ion implantation region and the diffusion region to being the lowest at the portion of the diffusion region that is the farthest away from the boundary interface.
摘要翻译：半导体器件包括在衬底上方构造的第二导电类型深阱。深阱包括离子注入区域和扩散区域。在扩散区域中形成第一导电型第一阱。栅电极延伸在离子注入区域和扩散区域的部分上，并且部分地与第一阱重叠。离子注入区域具有均匀的杂质浓度，而扩散区域的杂质浓度从在离子注入区域和扩散区域之间的边界界面处的最高浓度变为在扩散区域的部分处的最低浓度距离边界界面最远。

7. 发明授权

US08546881B2 Semiconductor device 有权
公开(公告)号：US08546881B2
公开(公告)日：2013-10-01
申请号：US12875021
申请日：2010-09-02
申请人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
发明人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
IPC分类号： H01L29/66
CPC分类号： H01L29/7835 , H01L29/0653 , H01L29/0847 , H01L29/0878 , H01L29/1045 , H01L29/1095 , H01L29/42368 , H01L29/7816
摘要： A semiconductor device includes a second conductive-type well configured over a substrate, a first conductive-type body region configured over the second conductive-type well, a gate electrode which overlaps a portion of the first conductive-type body region, and a first conductive-type channel extension region formed over the substrate and which overlaps a portion of the gate electrode.

8. 发明申请

US20110133277A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110133277A1
公开(公告)日：2011-06-09
申请号：US12875021
申请日：2010-09-02
申请人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
发明人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
IPC分类号： H01L29/78
CPC分类号： H01L29/7835 , H01L29/0653 , H01L29/0847 , H01L29/0878 , H01L29/1045 , H01L29/1095 , H01L29/42368 , H01L29/7816
摘要： A semiconductor device includes a second conductive-type well configured over a substrate, a first conductive-type body region configured over the second conductive-type well, a gate electrode which overlaps a portion of the first conductive-type body region, and a first conductive-type channel extension region formed over the substrate and which overlaps a portion of the gate electrode.
摘要翻译：半导体器件包括在衬底上构造的第二导电类型阱，配置在第二导电类型阱上的第一导电类型体区域，与第一导电型体区域的一部分重叠的栅电极，导电型沟道延伸区，形成在衬底上并与栅电极的一部分重叠。

9. 发明申请

US20110127612A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：用于制造半导体器件的半导体器件和方法
公开(公告)号：US20110127612A1
公开(公告)日：2011-06-02
申请号：US12882826
申请日：2010-09-15
申请人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
发明人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
IPC分类号： H01L27/088 , H01L21/336
CPC分类号： H01L29/66681 , H01L21/823412 , H01L21/823462 , H01L21/823493 , H01L27/088 , H01L29/0653 , H01L29/0692 , H01L29/0847 , H01L29/1045 , H01L29/1087 , H01L29/66659 , H01L29/7835
摘要： A semiconductor device includes: an active region configured over a substrate to include a first conductive-type first deep well and second conductive-type second deep well forming a junction therebetween. A gate electrode extends across the junction and over a portion of first conductive-type first deep well and a portion of the second conductive-type second deep well. A second conductive-type source region is in the first conductive-type first deep well at one side of the gate electrode whereas a second conductive-type drain region is in the second conductive-type second deep well on another side of the gate electrode. A first conductive-type impurity region is in the first conductive-type first deep well surrounding the second conductive-type source region and extending toward the junction so as to partially overlap with the gate electrode and/or partially overlap with the second conductive-type source region.
摘要翻译：半导体器件包括：有源区，被配置在衬底上，以包括第一导电型第一深阱和第二导电型第二深阱，其形成两者之间的接合点。栅极电极延伸穿过接头并且在第一导电类型的第一深阱的一部分和第二导电类型的第二深阱的一部分上延伸。第二导电型源极区位于栅电极一侧的第一导电型第一深阱中，而第二导电型漏极区位于栅电极另一侧的第二导电型第二深阱中。第一导电型杂质区位于围绕第二导电型源极区的第一导电类型的第一深阱中并且朝向结延伸以与栅电极部分重叠和/或部分地与第二导电型源区。

10. 发明授权

US08575702B2 Semiconductor device and method for fabricating semiconductor device 有权
公开(公告)号：US08575702B2
公开(公告)日：2013-11-05
申请号：US12882826
申请日：2010-09-15
申请人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
发明人： Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
IPC分类号： H01L21/70
CPC分类号： H01L29/66681 , H01L21/823412 , H01L21/823462 , H01L21/823493 , H01L27/088 , H01L29/0653 , H01L29/0692 , H01L29/0847 , H01L29/1045 , H01L29/1087 , H01L29/66659 , H01L29/7835
摘要： A semiconductor device includes: an active region configured over a substrate to include a first conductive-type first deep well and second conductive-type second deep well forming a junction therebetween. A gate electrode extends across the junction and over a portion of first conductive-type first deep well and a portion of the second conductive-type second deep well. A second conductive-type source region is in the first conductive-type first deep well at one side of the gate electrode whereas a second conductive-type drain region is in the second conductive-type second deep well on another side of the gate electrode. A first conductive-type impurity region is in the first conductive-type first deep well surrounding the second conductive-type source region and extending toward the junction so as to partially overlap with the gate electrode and/or partially overlap with the second conductive-type source region.

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