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1. 发明授权

US09117759B2 Methods of forming bulb-shaped trenches in silicon 有权
标题翻译：在硅中形成球形沟槽的方法
公开(公告)号：US09117759B2
公开(公告)日：2015-08-25
申请号：US13206907
申请日：2011-08-10
申请人： Sanjeev Sapra , Cheng-Shun Chen , Hung-Ming Tsai , Sheng-Wei Yang
发明人： Sanjeev Sapra , Cheng-Shun Chen , Hung-Ming Tsai , Sheng-Wei Yang
IPC分类号： H01L21/3205 , H01L21/306 , H01L21/02 , H01L21/308 , H01L21/311 , B82Y30/00
CPC分类号： H01L23/5283 , B82Y30/00 , H01L21/02238 , H01L21/30604 , H01L21/3083 , H01L21/31111 , H01L29/04 , H01L29/16 , H01L2924/0002 , H01L2924/00
摘要： A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.
摘要翻译：公开了一种在硅中产生一个具有一个灯泡形横截面的沟槽的方法。该方法包括在硅中形成至少一个沟槽并在至少一个沟槽中形成衬垫。将衬垫从至少一个沟槽的底表面移除以暴露下面的硅。去除底层暴露的硅的一部分以在硅中形成空腔。进行至少一个去除周期以去除空腔中的暴露的硅以形成球形横截面轮廓，每个去除周期包括使空腔中的硅经受臭氧化水以氧化硅并将氧化的硅经受氟化氢溶液去除氧化硅。还公开了一种半导体器件结构，其包括包括具有灯泡形横截面轮廓的空腔的至少一个沟槽。

2. 发明授权

US08921183B2 Method for fabricating trench isolation structure 有权
标题翻译：沟槽隔离结构的制作方法
公开(公告)号：US08921183B2
公开(公告)日：2014-12-30
申请号：US12962655
申请日：2010-12-08
申请人： Jen-Jui Huang , Hung-Ming Tsai
发明人： Jen-Jui Huang , Hung-Ming Tsai
IPC分类号： H01L21/336 , H01L21/76 , H01L21/762
CPC分类号： H01L21/76227
摘要： A method for fabricating a trench isolation structure is described. A trench is formed in a substrate. A liner layer is formed at least in the trench. A precursor layer is formed at least on the sidewalls of the trench. The precursor layer is converted to an insulating layer that has a larger volume than the precursor layer and fills up the trench.
摘要翻译：描述了一种用于制造沟槽隔离结构的方法。在衬底中形成沟槽。至少在沟槽中形成衬垫层。至少在沟槽的侧壁上形成前体层。前体层被转换成具有比前体层更大的体积并填充沟槽的绝缘层。

3. 发明授权

US08592985B2 Methods of forming conductive structures and methods of forming DRAM cells 有权
标题翻译：形成导电结构的方法和形成DRAM单元的方法
公开(公告)号：US08592985B2
公开(公告)日：2013-11-26
申请号：US13443141
申请日：2012-04-10
申请人： Jaydeb Goswami , Hung Ming Tsai , Duane M. Goodner
发明人： Jaydeb Goswami , Hung Ming Tsai , Duane M. Goodner
IPC分类号： H01L23/48
CPC分类号： H01L23/53252 , C23C16/045 , H01L21/743 , H01L21/76876 , H01L21/76877 , H01L21/76879 , H01L23/528 , H01L23/53257 , H01L23/53266 , H01L27/10876 , H01L27/10891 , H01L2924/0002 , H01L2924/00
摘要： Some embodiments include methods of forming conductive structures. An electrically conductive material may be deposited with a first deposition method. The first deposition method has a first deposition rate and forms a first portion of a conductive structure. A second portion of the conductive structure may be formed by depositing the electrically conductive material with a second deposition method having a second deposition rate. The second deposition rate may be different from the first deposition rate by at least about a factor of 3. In some embodiments, a region of the conductive structure is utilized as a transistor gate of a DRAM cell. Some embodiments include semiconductor constructions.
摘要翻译：一些实施例包括形成导电结构的方法。可以用第一沉积方法沉积导电材料。第一沉积方法具有第一沉积速率并形成导电结构的第一部分。导电结构的第二部分可以通过用具有第二沉积速率的第二沉积方法沉积导电材料来形成。第二沉积速率可以不同于第一沉积速率至少约3倍。在一些实施例中，导电结构的区域用作DRAM单元的晶体管栅极。一些实施例包括半导体结构。

4. 发明授权

US08415728B2 Memory device and method of fabricating the same 有权
标题翻译：存储器件及其制造方法
公开(公告)号：US08415728B2
公开(公告)日：2013-04-09
申请号：US12945423
申请日：2010-11-12
申请人： Ying Cheng Chuang , Ping Cheng Hsu , Sheng Wei Yang , Ming Cheng Chang , Hung Ming Tsai
发明人： Ying Cheng Chuang , Ping Cheng Hsu , Sheng Wei Yang , Ming Cheng Chang , Hung Ming Tsai
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L21/76229 , H01L27/10876 , H01L27/10891
摘要： A memory device includes a mesa structure and a word line. The mesa structure, having two opposite side surfaces, includes at least one pair of source/drain regions and at least one channel base region corresponding to the pair of source/drain regions formed therein. The word line includes two linear sections and at least one interconnecting portion. Each linear section extends on the respective side surface of the mesa structure, adjacent to the channel base region. The at least one interconnecting portion penetrates through the mesa structure, connecting the two linear sections.
摘要翻译：存储器件包括台面结构和字线。具有两个相对侧表面的台面结构包括至少一对源极/漏极区域和与其中形成的一对源极/漏极区域对应的至少一个沟道基极区域。字线包括两个线性部分和至少一个互连部分。每个线性部分在台面结构的相邻侧表面上延伸，邻近通道基底区域。至少一个互连部分穿过台面结构，连接两个线性部分。

5. 发明授权

US08334196B2 Methods of forming conductive contacts in the fabrication of integrated circuitry 有权
标题翻译：在集成电路制造中形成导电触点的方法
公开(公告)号：US08334196B2
公开(公告)日：2012-12-18
申请号：US12917339
申请日：2010-11-01
申请人： Ying-Cheng Chuang , Hung-Ming Tsai , Sheng-Wei Yang , Ping-Cheng Hsu , Ming-Cheng Chang
发明人： Ying-Cheng Chuang , Hung-Ming Tsai , Sheng-Wei Yang , Ping-Cheng Hsu , Ming-Cheng Chang
IPC分类号： H01L21/768 , H01L21/28
CPC分类号： H01L27/10876 , H01L21/28531 , H01L21/76897 , H01L27/10855 , H01L27/10888
摘要： A method of forming a conductive contact includes forming a structure comprising an upper surface joining with a sidewall surface. The sidewall surface contains elemental-form silicon. Silicon is epitaxially grown from the sidewall surface. Dielectric material is formed over the upper surface and the epitaxially-grown silicon. A conductive contact is formed through the dielectric material to conductively connect with the upper surface.
摘要翻译：形成导电接触的方法包括形成包括与侧壁表面接合的上表面的结构。侧壁表面含有元素型硅。硅从侧壁表面外延生长。电介质材料形成在上表面和外延生长的硅上。通过电介质材料形成导电接触，以与上表面导电连接。

6. 发明申请

US20120214285A1 Methods Of Forming A Vertical Transistor And At Least A Conductive Line Electrically Coupled Therewith, Methods Of Forming Memory Cells, And Methods Of Forming Arrays Of Memory Cells 有权
标题翻译：形成垂直晶体管的方法和至少一个导电线电耦合的方法，形成记忆细胞的方法和形成记忆细胞阵列的方法
公开(公告)号：US20120214285A1
公开(公告)日：2012-08-23
申请号：US13031829
申请日：2011-02-22
申请人： Jaydip Guha , Shyam Surthi , Suraj J. Mathew , Kamal M. Karda , Hung-Ming Tsai
发明人： Jaydip Guha , Shyam Surthi , Suraj J. Mathew , Kamal M. Karda , Hung-Ming Tsai
IPC分类号： H01L21/336
CPC分类号： H01L21/823487 , H01L27/108 , H01L27/10876 , H01L27/1104 , H01L29/41741 , H01L29/66666 , H01L29/66825 , H01L29/66833
摘要： Trenches are formed into semiconductive material. Masking material is formed laterally over at least elevationally inner sidewall portions of the trenches. Conductivity modifying impurity is implanted through bases of the trenches into semiconductive material there-below. Such impurity is diffused into the masking material received laterally over the elevationally inner sidewall portions of the trenches and into semiconductive material received between the trenches below a mid-channel portion. An elevationally inner source/drain is formed in the semiconductive material below the mid-channel portion. The inner source/drain portion includes said semiconductive material between the trenches which has the impurity therein. A conductive line is formed laterally over and electrically coupled to at least one of opposing sides of the inner source/drain. A gate is formed elevationally outward of and spaced from the conductive line and laterally adjacent the mid-channel portion. Other embodiments are disclosed.
摘要翻译：沟槽形成半导体材料。遮蔽材料横向形成在沟槽的至少垂直内侧壁部分上。电导率改性杂质通过沟槽的基底注入到下面的半导体材料中。这种杂质被扩散到横向覆盖在沟槽的顶部内侧壁部分上的掩蔽材料中，并且被扩散到半导体材料中，该半导体材料被容纳在中间通道部分下方的沟槽之间。在中间通道部分下方的半导体材料中形成一个正面内部源极/漏极。内部源极/漏极部分包括在其中具有杂质的沟槽之间的所述半导体材料。导电线横向形成并电耦合到内源/漏的相对侧中的至少一个。栅极形成在导电线的正上方并与导电线隔开并且横向邻近中间通道部分。公开了其他实施例。

7. 发明申请

US20120119277A1 MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：存储器件及其制造方法
公开(公告)号：US20120119277A1
公开(公告)日：2012-05-17
申请号：US12945536
申请日：2010-11-12
申请人： YING CHENG CHUANG , PING CHENG HSU , SHENG WEI YANG , MING CHENG CHANG , HUNG MING TSAI
发明人： YING CHENG CHUANG , PING CHENG HSU , SHENG WEI YANG , MING CHENG CHANG , HUNG MING TSAI
IPC分类号： H01L27/108 , H01L27/088 , H01L21/8242
CPC分类号： H01L21/76224 , H01L27/10876 , H01L27/10891
摘要： A memory device includes a plurality of isolations and trench fillers arranged in an alternating manner in a direction, a plurality of mesa structures between the isolations and trench fillers, and a plurality of word lines each overlying a side surface of the respective mesa. In one embodiment of the present invention, the width measured in the direction of the trench filler is smaller than that of the isolation, each mesa structure includes at least one paired source/drain regions and at least one channel base region corresponding to the paired source/drain regions, and each of the word lines is on a side surface of the mesa structure, adjacent the respective isolation, and is arranged adjacent the channel base region.
摘要翻译：存储器件包括多个隔离件和沟槽填料，沿方向交替排列，隔离件和沟槽填料之间的多个台面结构，以及各自覆盖相应台面的侧表面的多个字线。在本发明的一个实施例中，在沟槽填料的方向上测量的宽度小于隔离层的宽度，每个台面结构包括至少一个成对的源极/漏极区域和对应于配对源极的至少一个沟道基极区域 /漏极区域，并且每个字线在台面结构的侧表面上，与相应的隔离相邻，并且被布置为与通道基底区域相邻。

8. 发明授权

US07855124B2 Method for forming a semiconductor device 有权
标题翻译：半导体器件形成方法
公开(公告)号：US07855124B2
公开(公告)日：2010-12-21
申请号：US12035529
申请日：2008-02-22
申请人： Hung-Ming Tsai , Ching-Nan Hsiao , Chung-Lin Huang
发明人： Hung-Ming Tsai , Ching-Nan Hsiao , Chung-Lin Huang
IPC分类号： H01L21/76
CPC分类号： H01L21/823437 , H01L21/28273 , H01L21/823468 , H01L21/823481 , H01L27/11521
摘要： A method for forming a semiconductor device, includes the steps of providing a substrate; forming a patterned stack on the substrate including a first dielectric layer on the substrate, a first conductive layer on the first dielectric layer and a mask layer on the first conductive layer, wherein a width of the mask layer is smaller than a width of the first conductive layer; forming a second dielectric layer on the sidewall of the patterned stack; forming a third dielectric layer on the substrate; forming a second conductive layer over the substrate; and removing the mask layer and a portion of the first conductive layer covered by the mask layer to form an opening so as to partially expose the first conductive layer.
摘要翻译：一种形成半导体器件的方法，包括以下步骤：提供衬底; 在所述衬底上形成图案化的叠层，所述衬底上包括在所述衬底上的第一电介质层，所述第一电介质层上的第一导电层和所述第一导电层上的掩模层，其中所述掩模层的宽度小于所述第一导电层的宽度导电层; 在所述图案化叠层的侧壁上形成第二电介质层; 在所述基板上形成第三电介质层; 在所述衬底上形成第二导电层; 以及去除所述掩模层和由所述掩模层覆盖的所述第一导电层的一部分以形成开口以部分地暴露所述第一导电层。

9. 发明申请

US20100032743A1 DYNAMIC RANDOM ACCESS MEMORY STRUCTURE, ARRAY THEREOF, AND METHOD OF MAKING THE SAME 审中-公开
标题翻译：动态随机访问存储器结构及其阵列及其制造方法
公开(公告)号：US20100032743A1
公开(公告)日：2010-02-11
申请号：US12236487
申请日：2008-09-23
申请人： Jen-Jui Huang , Hung-Ming Tsai , Kuo-Chung Chen
发明人： Jen-Jui Huang , Hung-Ming Tsai , Kuo-Chung Chen
IPC分类号： H01L27/108
CPC分类号： H01L27/10885 , H01L27/10823 , H01L27/10876 , H01L29/66666 , H01L29/7827
摘要： A dynamic random access memory (DRAM) structure has a stacked capacitor disposed above an upper source/drain region of a vertical transistor having a surrounding gate. The gates of each row of a memory array are electrically connected with a buried word line. Each of bit lines is disposed between two adjacent columns of transistors and electrically connected with lower source/drain regions through bit line contacts. The DRAM structure may have a unit cell size of 4F2.
摘要翻译：动态随机存取存储器（DRAM）结构具有堆叠电容器，其设置在具有周围栅极的垂直晶体管的上部源极/漏极区域之上。存储器阵列的每行的栅极与掩埋字线电连接。每个位线设置在两个相邻的晶体管列之间，并通过位线触点与下部源极/漏极区电连接。 DRAM结构可以具有4F2的单元电池尺寸。

10. 发明申请

US20080316173A1 Computer cursor control device which can broadcast multimedia data 审中-公开
标题翻译：可广播多媒体数据的电脑光标控制装置
公开(公告)号：US20080316173A1
公开(公告)日：2008-12-25
申请号：US11812828
申请日：2007-06-22
申请人： Hung-Ming Tsai
发明人： Hung-Ming Tsai
IPC分类号： G06F3/033
CPC分类号： G06F3/03543 , G06F3/0317
摘要： A computer cursor control device is disclosed which can broadcast multimedia and control a computer cursor and comprises an interface unit; a mouse module connecting to the interface unit and controlling the computer cursor in a mouse mode; a multimedia module connecting to the interface unit and accessing a multimedia file in a multimedia mode for further broadcasting the multimedia file; and a button control unit connecting to the mouse module and the multimedia module respectively which enters a control signal for controlling the computer cursor or broadcasting the multimedia file.
摘要翻译：公开了一种计算机光标控制装置，其可以广播多媒体并控制计算机光标并且包括接口单元; 连接到接口单元并以鼠标模式控制计算机光标的鼠标模块; 连接到所述接口单元并以多媒体模式访问多媒体文件以进一步广播所述多媒体文件的多媒体模块; 以及分别连接到鼠标模块和多媒体模块的按钮控制单元，其输入用于控制计算机光标或广播多媒体文件的控制信号。

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