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    • 2. 发明授权
    • Reference voltage source, in particular for amplifier circuits
    • 参考电压源,特别是放大器电路
    • US4274061A
    • 1981-06-16
    • US83249
    • 1979-10-10
    • Horst Kraemer
    • Horst Kraemer
    • G05F3/22G05F3/26H03F3/04H03F3/45
    • G05F3/265
    • A reference voltage source, in particular for amplifier circuits, includes a pair of transistors having their bases connected together, one of the transistors being further connected as a diode and the other being operated normally. In the collector circuit of the transistors, a current mirror circuit is connected which includes a further transistor which is connected in series through an additional transistor to a reference potential. The base of the additional transistor is connected with emitter resistors in the emitter circuit of the first-mentioned transistors and the reference voltage is taken off at the connection between the serially connected further and additional transistors. Additional current mirror circuits may be employed for providing a symmetrical operation of the amplifier circuit supplied by the reference voltage source.
    • 特别是用于放大器电路的参考电压源包括其基极连接在一起的一对晶体管,其中一个晶体管进一步连接为二极管,另一个晶体管正常工作。 在晶体管的集电极电路中,连接电流镜电路,其包括通过附加晶体管串联连接到参考电位的另一个晶体管。 附加晶体管的基极与先前提到的晶体管的发射极电路中的发射极电阻相连,参考电压在串联连接的另外的晶体管之间的连接处被取消。 可以使用附加电流镜电路来提供由参考电压源提供的放大器电路的对称操作。
    • 5. 发明授权
    • Brake system of the brake-by-wire type
    • 制动器制动系统
    • US08226175B2
    • 2012-07-24
    • US12671251
    • 2008-07-17
    • Peter DrottHolger von HaynThomas SellingerHorst Kraemer
    • Peter DrottHolger von HaynThomas SellingerHorst Kraemer
    • B60T8/32
    • B60T7/042B60T8/4077
    • A brake system of the brake-by-wire (BBW) type for a vehicle having a brake pressure signal generator which can be activated by a brake pedal and can be connected to wheel brakes outside the BBW operating mode, having a pressure source which can be actuated by an electronic control unit and can be connected to the brakes of the vehicle in the BBW operating mode, having provisions for sensing a driver's deceleration request and having a pedal travel simulator which interacts with the brake pedal. A restoring force acting on the brake pedal can be simulated in the BBW operating mode independently of the actuating of the pressure source, and having a device which can be actuated by the electronic control unit and which permits activation of the pedal travel simulator in the BBW operating mode and deactivation of the pedal travel simulator outside the BBW operating mode.
    • 一种用于具有制动压力信号发生器的车辆制动器(BBW)类型的制动系统,其能够由制动踏板启动并且可以连接到BBW操作模式之外的车轮制动器,具有可以 由电子控制单元启动,并且可以在BBW操作模式下连接到车辆的制动器,具有用于感测驾驶员的减速请求并具有与制动踏板相互作用的踏板行驶模拟器的装置。 作用在制动踏板上的恢复力可以在BBW操作模式下独立于压力源的致动而被模拟,并且具有能够由电子控制单元致动并允许在BBW中启动踏板行驶模拟器的装置 BBW操作模式之外的踏板行驶模拟器的操作模式和停用。
    • 6. 发明授权
    • Method and arrangement for adapting a clock to a plesiochronous data
signal and for clocking the data signal with the adapted clock
    • 用于将时钟适配到同步数据信号并用适配时钟对数据信号计时的方法和装置
    • US5046075A
    • 1991-09-03
    • US444833
    • 1989-12-01
    • Horst KraemerKarlheinz Klinger
    • Horst KraemerKarlheinz Klinger
    • H04L7/033
    • H04L7/0338
    • A method and an apparatus for adapting a locally-generated clock having an arbitrary phase relation to a plesiochronous data signal in which further clocks are derived from the clock via a delay line chain in such a fashion that a clock sequence having identical phase spacings is produced. These clocks are clocked by the data signal in edge-triggered D-flip-flops. The difference between the logical states of the Q outputs of two neighboring D-flip-flops provides a preselection of the best-adapted clock. Proceeding from the Q outputs and Q outputs of the D-flip-flops and the non-inverting and inverting outputs of a plurality of amplifiers, a gate arrangement connects an optimally-adapted clock to a clock output. A data signal is delayed in a delay unit by the time that the selection of the optimally-adapted clock requires. This then clocks the delayed data signal in an edge-triggered D-flip-flop.
    • 一种用于使具有任意相位关系的本地生成的时钟适配于同步数据信号的方法和装置,其中通过延迟线链从时钟导出其它时钟,使得产生具有相同相位间隔的时钟序列 。 这些时钟由边沿触发D触发器中的数据信号计时。 两个相邻D-触发器的Q输出的逻辑状态之间的差异提供了最佳适配时钟的预选择。 从D触发器的Q输出和& upbar&Q输出和多个放大器的非反相和反相输出端口,栅极布置将最佳适应时钟连接到时钟输出。 在最佳适应时钟的选择所需的时间之后,延迟单元中的数据信号被延迟。 然后在边沿触发的D触发器中对延迟的数据信号进行计时。