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1. 发明申请

US20160204108A1 CMOS TRANSISTOR, SEMICONDUCTOR DEVICE INCLUDING THE TRANSISTOR, AND SEMICONDUCTOR MODULE INCLUDING THE DEVICE 有权
标题翻译： CMOS晶体管，包括晶体管的半导体器件和包括器件的半导体器件
公开(公告)号：US20160204108A1
公开(公告)日：2016-07-14
申请号：US15054571
申请日：2016-02-26
申请人： Hye-Lan Lee , Hong-Bae Park , Sang-Jin Hyun , Yu-Gyun Shin , Sug-Hun Hong , Hoon-Joo Na , Hyung-Seok Hong
发明人： Hye-Lan Lee , Hong-Bae Park , Sang-Jin Hyun , Yu-Gyun Shin , Sug-Hun Hong , Hoon-Joo Na , Hyung-Seok Hong
IPC分类号： H01L27/092 , H01L29/423 , H01L29/51 , H01L29/49
CPC分类号： H01L27/092 , H01L21/823842 , H01L21/82385 , H01L21/823871 , H01L23/485 , H01L27/0629 , H01L27/0805 , H01L27/0811 , H01L29/42376 , H01L29/4966 , H01L29/517 , H01L29/94 , H01L2924/0002 , H01L2924/00
摘要： Provided are a CMOS transistor, a semiconductor device having the transistor, and a semiconductor module having the device. The CMOS transistor may include first and second interconnection structures respectively disposed in first and second regions of a semiconductor substrate. The first and second regions of the semiconductor substrate may have different conductivity types. The first and second interconnection structures may be disposed on the semiconductor substrate. The first interconnection structure may have a different stacked structure from the second interconnection structure. The CMOS transistor may be disposed in the semiconductor device. The semiconductor device may be disposed in the semiconductor module.
摘要翻译：提供了CMOS晶体管，具有晶体管的半导体器件和具有该器件的半导体模块。 CMOS晶体管可以包括分别设置在半导体衬底的第一和第二区域中的第一和第二互连结构。半导体衬底的第一和第二区域可以具有不同的导电类型。第一和第二互连结构可以设置在半导体衬底上。第一互连结构可以具有与第二互连结构不同的堆叠结构。 CMOS晶体管可以设置在半导体器件中。半导体器件可以设置在半导体模块中。

2. 发明授权

US08513740B2 Complementary metal oxide semiconductor device having metal gate stack structure and method of manufacturing the same 有权
标题翻译：具有金属栅叠层结构的互补金属氧化物半导体器件及其制造方法
公开(公告)号：US08513740B2
公开(公告)日：2013-08-20
申请号：US12873611
申请日：2010-09-01
申请人： Hong-bae Park , Sug-hun Hong , Sang-jin Hyun , Hoon-ju Na , Hye-lan Lee , Hyung-seok Hong
发明人： Hong-bae Park , Sug-hun Hong , Sang-jin Hyun , Hoon-ju Na , Hye-lan Lee , Hyung-seok Hong
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L27/092 , H01L29/4966 , H01L29/66545 , H01L29/7833
摘要： A complementary metal oxide semiconductor (CMOS) device including: a semiconductor substrate including a NMOS region and a PMOS region; a NMOS metal gate stack structure on the NMOS region and including a first high dielectric layer, a first barrier metal gate on the first high dielectric layer and including a metal oxide nitride layer, and a first metal gate on the first barrier metal gate; and a PMOS metal gate stack structure on the PMOS region and including a second high dielectric layer, a second barrier metal gate on the second high dielectric layer and including a metal oxide nitride layer, and a second metal gate on the second barrier metal gate.
摘要翻译：一种互补金属氧化物半导体（CMOS）器件，包括：包括NMOS区域和PMOS区域的半导体衬底; 在NMOS区域上的NMOS金属栅叠层结构，包括第一高介电层，第一高电介质层上的第一势垒金属栅极，并且包括金属氧化物氮化物层，以及第一栅极金属栅极上的第一金属栅极; 以及在PMOS区域上的PMOS金属栅极堆叠结构，并且包括第二高介电层，第二高介电层上的第二阻挡金属栅极，并且包括金属氧化物氮化物层，以及在第二阻挡金属栅极上的第二金属栅极。

3. 发明申请

US20120122309A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING A WORK FUNCTION CONTROL FILM 有权
标题翻译：使用工作功能控制膜制作半导体器件的方法
公开(公告)号：US20120122309A1
公开(公告)日：2012-05-17
申请号：US13241871
申请日：2011-09-23
申请人： Hong-Bae PARK , Sang-Jin Hyun , Hu-Yong Lee , Hoon-Joo Na , Jeong-Hee Han , Hye-Lan Lee , Hyung-Seok Hong
发明人： Hong-Bae PARK , Sang-Jin Hyun , Hu-Yong Lee , Hoon-Joo Na , Jeong-Hee Han , Hye-Lan Lee , Hyung-Seok Hong
IPC分类号： H01L21/28
CPC分类号： H01L21/823842 , H01L21/28185 , H01L21/28202 , H01L29/495 , H01L29/513 , H01L29/518 , H01L29/66545
摘要： A method of fabricating a semiconductor device may include: preparing a substrate in which first and second regions are defined; forming an interlayer insulating film, which includes first and second trenches, on the substrate; forming a work function control film, which contains Al and N, along a top surface of the interlayer insulating film, side and bottom surfaces of the first trench, and side and bottom surfaces of the second trench; forming a mask pattern on the work function control film formed in the second region; injecting a work function control material into the work function control film formed in the first region to control a work function of the work function control film formed in the first region; removing the mask pattern; and forming a first metal gate electrode to fill the first trench and forming a second metal gate electrode to fill the second trench.
摘要翻译：制造半导体器件的方法可以包括：制备其中限定了第一和第二区域的衬底; 在衬底上形成包括第一和第二沟槽的层间绝缘膜; 沿着层间绝缘膜的上表面，第一沟槽的侧表面和底表面以及第二沟槽的侧表面和底表面形成包含Al和N的功函数控制膜; 在形成在第二区域中的功函数控制膜上形成掩模图案; 将工作功能控制材料注入到形成在第一区域中的功函数控制膜中，以控制形成在第一区域中的功函数控制膜的功函数; 去除掩模图案; 以及形成第一金属栅电极以填充所述第一沟槽并形成第二金属栅电极以填充所述第二沟槽。

4. 发明授权

US07982703B2 Driving liquid crystal display 有权
标题翻译：驱动液晶显示
公开(公告)号：US07982703B2
公开(公告)日：2011-07-19
申请号：US12007264
申请日：2008-01-08
申请人： Yong Sung Ham , Hong Bae Park
发明人： Yong Sung Ham , Hong Bae Park
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3611 , G09G2320/02 , G09G2320/0252 , G09G2340/16
摘要： A method for driving a liquid crystal display, includes receiving source data, reducing the number of bits of the source data, thereby generating a reduced-bit source data, comparing the reduced-bit source data of a previous frame with the reduced-bit source data of a current frame to select a preset modulated data in accordance with the result of the comparison, and modulating the source data by using the selected modulated data.
摘要翻译：一种用于驱动液晶显示器的方法，包括接收源数据，减少源数据的位数，从而生成降低位源数据，将先前帧的缩减比特源数据与缩减比特源进行比较根据比较结果选择预设调制数据的当前帧的数据，以及通过使用所选择的调制数据调制源数据。

5. 发明授权

US07521331B2 High dielectric film and related method of manufacture 有权
标题翻译：高介电膜及相关制造方法
公开(公告)号：US07521331B2
公开(公告)日：2009-04-21
申请号：US11359404
申请日：2006-02-23
申请人： Hong-bae Park , Yu-gyun Shin , Sang-bom Kang
发明人： Hong-bae Park , Yu-gyun Shin , Sang-bom Kang
IPC分类号： H01L21/76
CPC分类号： H01L21/0228 , C23C16/308 , C23C16/45531 , H01L21/02142 , H01L21/02194 , H01L21/02274 , H01L21/3141 , H01L21/3145 , H01L21/31645
摘要： A method of forming a high dielectric film for a semiconductor device comprises supplying a first source gas to a reaction chamber during a first time interval, supplying a first reactant gas to the reaction chamber during a second time interval after the first time interval, supplying a second source gas to the reaction chamber for a third time interval after the second time interval, supplying a second reactant gas to the reaction chamber for a fourth time interval after the third time interval, and supplying an additive gas including nitrogen to the reaction chamber during a fifth time interval.
摘要翻译：形成用于半导体器件的高电介质膜的方法包括：在第一时间间隔内将第一源气体供应到反应室，在第一时间间隔之后的第二时间间隔期间将第一反应气体供应到反应室，在所述第二时间间隔之后的第三时间间隔内将第二源气体供应到所述反应室，在所述第三时间间隔之后，将第二反应气体供应到所述反应室中第四时间间隔，并且在所述第三时间间隔内向所述反应室供应包含氮气的添加剂气体第五个时间间隔。

6. 发明申请

US20080129668A1 Driving liquid crystal display 有权
标题翻译：驱动液晶显示
公开(公告)号：US20080129668A1
公开(公告)日：2008-06-05
申请号：US12007264
申请日：2008-01-08
申请人： Yong Sung Ham , Hong Bae Park
发明人： Yong Sung Ham , Hong Bae Park
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3611 , G09G2320/02 , G09G2320/0252 , G09G2340/16
摘要： A method for driving a liquid crystal display, includes receiving source data, reducing the number of bits of the source data, thereby generating a reduced-bit source data, comparing the reduced-bit source data of a previous frame with the reduced-bit source data of a current frame to select a preset modulated data in accordance with the result of the comparison, and modulating the source data by using the selected modulated data.
摘要翻译：一种用于驱动液晶显示器的方法，包括接收源数据，减少源数据的位数，从而生成降低位源数据，将先前帧的缩减比特源数据与缩减比特源进行比较根据比较结果选择预设调制数据的当前帧的数据，以及通过使用所选择的调制数据调制源数据。

7. 发明申请

US20070120179A1 SONOS type non-volatile memory devices having a laminate blocking insulation layer and methods of manufacturing the same 审中-公开
标题翻译：具有层压阻挡绝缘层的SONOS型非易失性存储器件及其制造方法
公开(公告)号：US20070120179A1
公开(公告)日：2007-05-31
申请号：US11505033
申请日：2006-08-16
申请人： Hong-Bae Park , Yu-Gyun Shin
发明人： Hong-Bae Park , Yu-Gyun Shin
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/792 , H01L29/513 , H01L29/66833
摘要： A SONOS type non-volatile memory device includes a substrate having source/drain regions doped with impurities and a channel region between the source/drain regions. A tunnel insulation layer including silicon oxide is formed on the channel region of the substrate. A charge-trapping insulation layer including silicon nitride is formed on the tunnel insulation layer. A blocking insulation layer is formed on the charge-trapping insulation layer. The blocking insulation layer has a laminate layered structure in which a plurality of layers, at least one of which includes a metal oxide layer, are sequentially stacked. An electrode is formed on the blocking insulation layer.
摘要翻译： SONOS型非易失性存储器件包括具有掺杂有杂质的源极/漏极区域和源极/漏极区域之间的沟道区域的衬底。在衬底的沟道区上形成包括氧化硅的隧道绝缘层。在隧道绝缘层上形成包括氮化硅的电荷捕获绝缘层。在电荷俘获绝缘层上形成阻挡绝缘层。隔离绝缘层具有层叠层叠结构，其中顺序层叠多个层，其中至少一层包括金属氧化物层。在隔离绝缘层上形成电极。

8. 发明申请

US20060035405A1 Methods of manufacturing a thin film including hafnium titanium oxide and methods of manufacturing a semiconductor device including the same 有权
标题翻译：制造包括铪钛氧化物的薄膜的方法及其制造方法
公开(公告)号：US20060035405A1
公开(公告)日：2006-02-16
申请号：US11191423
申请日：2005-07-28
申请人： Hong-Bae Park , Yu-Gyun Shin , Sang-Bom Kang
发明人： Hong-Bae Park , Yu-Gyun Shin , Sang-Bom Kang
IPC分类号： H01L21/16
CPC分类号： H01L21/02194 , C23C16/405 , C23C16/45529 , C23C16/45531 , H01L21/0228 , H01L21/28194 , H01L21/3141 , H01L21/31604 , H01L21/31645 , H01L29/513 , H01L29/517
摘要： The present invention can provide methods of manufacturing a thin film including hafnium titanium oxide. The methods can include introducing a first reactant including a hafnium precursor onto a substrate; chemisorbing a first portion of the first reactant to the substrate, and physisorbing a second portion of the first reactant to the substrate and the chemisorbed first portion of the first reactant; providing a first oxidant onto the substrate; forming a first thin film including hafnium oxide on the substrate; introducing a second reactant including a titanium precursor onto the first thin film; chemisorbing a first portion of the second reactant to the first thin film, and physisorbing a second portion of the second reactant to the first thin film and the chemisorbed first portion of the second reactant; providing a second oxidant onto the first thin film; and forming a second thin film including titanium oxide on the first thin film. The present invention can further provide methods of manufacturing a gate structure and a capacitor.
摘要翻译：本发明可以提供制造包括铪钛氧化物的薄膜的方法。所述方法可以包括将包含铪前体的第一反应物引入到基底上; 将所述第一反应物的第一部分化学吸附至所述基底，以及将所述第一反应物的第二部分物理吸附至所述基底和所述第一反应物的化学吸附的第一部分; 在衬底上提供第一氧化剂; 在基板上形成包括氧化铪的第一薄膜; 将包含钛前体的第二反应物引入到所述第一薄膜上; 将所述第二反应物的第一部分化学吸附到所述第一薄膜，以及将所述第二反应物的第二部分物理吸附到所述第一薄膜和所述第二反应物的化学吸附的第一部分; 在第一薄膜上提供第二氧化剂; 以及在所述第一薄膜上形成包括氧化钛的第二薄膜。本发明还可以提供制造栅极结构和电容器的方法。

9. 发明申请

US20060013946A1 Methods of forming a thin film structure, and a gate structure and a capacitor including the thin film structure 审中-公开
标题翻译：形成薄膜结构的方法以及包括薄膜结构的栅极结构和电容器
公开(公告)号：US20060013946A1
公开(公告)日：2006-01-19
申请号：US11182893
申请日：2005-07-15
申请人： Hong-Bae Park , Sang-Bom Kang , Beom-Jun Jin , Yu-Gyun Shin
发明人： Hong-Bae Park , Sang-Bom Kang , Beom-Jun Jin , Yu-Gyun Shin
IPC分类号： C23C16/00 , B05D5/12
CPC分类号： H01L21/02148 , C23C16/401 , C23C16/45531 , C23C16/45553 , H01L21/0228 , H01L21/28194 , H01L21/3141 , H01L21/31616 , H01L21/31645 , H01L29/517
摘要： A thin film structure is formed that includes hafnium silicon oxide using an atomic layer deposition process. A first reactant including tetrakis ethyl methyl amino hafnium (TEMAH) is introduced onto a substrate. A first portion of the first reactant is chemisorbed to the substrate, whereas a second portion of the first reactant is physorbed to the first portion of the first reactant. A first oxidant is provided onto the substrate. A first thin film including hafnium oxide is formed on the substrate by chemically reacting the first oxidant with the first portion of the first reactant. A second reactant including amino propyl tri ethoxy silane (APTES) is introduced onto the first thin film. A first portion of the second reactant is chemisorbed to the first thin film, whereas a second portion of the second reactant is physorbed to the first portion of the second reactant. A second oxidant is provided onto the first thin film. A second thin film including silicon oxide is formed on the first thin film by chemically reacting the second oxidant with the first portion of the second reactant.
摘要翻译：使用原子层沉积工艺形成包括氧化铪的薄膜结构。将包含四乙基甲基氨基铪（TEMAH）的第一反应物引入到基材上。第一反应物的第一部分被化学吸附到基底上，而第一反应物的第二部分被物理吸附到第一反应物的第一部分。第一氧化剂被提供到基底上。通过使第一氧化剂与第一反应物的第一部分发生化学反应，在衬底上形成包括氧化铪的第一薄膜。将包含氨基丙基三乙氧基硅烷（APTES）的第二反应物引入到第一薄膜上。第二反应物的第一部分被化学吸附到第一薄膜，而第二反应物的第二部分被物理吸附到第二反应物的第一部分。在第一薄膜上提供第二氧化剂。通过使第二氧化剂与第二反应物的第一部分化学反应，在第一薄膜上形成包括氧化硅的第二薄膜。

10. 发明授权

US06815776B2 Multi-finger type electrostatic discharge protection circuit 失效
标题翻译：多指型静电放电保护电路
公开(公告)号：US06815776B2
公开(公告)日：2004-11-09
申请号：US10028432
申请日：2001-12-28
申请人： Myoung Goo Lee , Hong Bae Park
发明人： Myoung Goo Lee , Hong Bae Park
IPC分类号： H01L2362
CPC分类号： H01L27/0266 , H01L23/4824 , H01L2924/0002 , H01L2924/00
摘要： A multi-finger type electrostatic discharge protection circuit is disclosed. In an NMOS type ESD protection circuit, a pair of gates are formed in parallel with each other in one of multiple active regions so as to enable all the gate fingers in the active regions to perform npn bipolar operations uniformly. The present invention discharges an ESD pulse effectively by forming one or more additional n+ (or p+) type active regions, which are connected to Vcc (or Vss), between respective active regions.
摘要翻译：公开了一种多指型静电放电保护电路。在NMOS型ESD保护电路中，一对栅极在多个有源区域中的一个中彼此并联形成，以便能够使有源区域中的所有栅极指令均匀地执行npn双极性操作。本发明通过在相应的有源区域之间形成一个或多个连接到Vcc（或Vss）的附加n +（或p +）型有源区域来有效地放电ESD脉冲。

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