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    • 5. 发明授权
    • Nickel complexes for flexible transistors and inverters
    • 镍复合物用于柔性晶体管和逆变器
    • US08981096B2
    • 2015-03-17
    • US13097656
    • 2011-04-29
    • Vellaisamy A. L. RoyZong-Xiang XuPaul Kim Ho ChuTat Kun Kwok
    • Vellaisamy A. L. RoyZong-Xiang XuPaul Kim Ho ChuTat Kun Kwok
    • C07D241/38H01L51/00H01L51/05
    • H01L51/0083H01L51/0003H01L51/0051H01L51/0084H01L51/0512H01L51/0533H01L51/0558H01L51/105
    • The design and synthesis of six nickel charge transfer (CT) complexes are described herein. The six nickel CT complexes have a nickel center, two organic ligands coordinated with the nickel center to form a dianionic square planar supramolecule and an organic counter-cation as represented by The ligands and counter-cations are selected to optimize properties, such as molecular alignment, film morphology, and molecular packaging. Described herein, the ligands can be 2,3-pyrazinedithiol (L1), 1,2-benzenedithol (L2) or 2,3-quinoxalinedithol (L3) and the counter-cations can be diquat (2,2′-ebpy) or methyl viologen (4,4′-mbpy). The six nickel CT complexes can also be utilized semiconductor devices, such as thin film transistors or inverters. Processes are also provided for the fabrication of semiconductors devices. The processes can include fabricating a substrate with a bilayer octadecylphosphonic acid (ODPA)/Al2O3 dielectric and applying one of the six nickel charge transfer (CT) complexes to the substrate.
    • 本文描述了六种镍电荷转移(CT)复合物的设计和合成。 六个镍CT复合物具有镍中心,两个有机配体与镍中心配位以形成二阴离子正方形平面超分子和由“配体”和“反阳离子”所表示的有机抗衡阳离子,以优化特性,如分子对准 ,膜形态和分子包装。 本文描述的配体可以是2,3-吡嗪二硫醇(L1),1,2-苯二酚(L2)或2,3-喹喔啉基二醇(L3),抗衡阳离子可以是二季铵盐(2,2'-ebpy)或 甲基紫精(4,4'-mbpy)。 六个镍CT复合体也可以用于薄膜晶体管或逆变器等半导体器件。 还提供了用于制造半导体器件的工艺。 这些方法可以包括用双层十八烷基膦酸(ODPA)/ Al 2 O 3电介质制造衬底,并将六种镍电荷转移(CT)复合物中的一种施加到衬底上。
    • 6. 发明授权
    • Intake system of engine
    • 发动机进气系统
    • US08726659B2
    • 2014-05-20
    • US13189269
    • 2011-07-22
    • Dong Ho ChuSang Kyu KangHyung Jin KimGuehyun JungYounsoo Im
    • Dong Ho ChuSang Kyu KangHyung Jin KimGuehyun JungYounsoo Im
    • F02B33/44F02M35/10
    • F02M35/10157F02B33/44F02B33/446F02M35/10144F02M35/10236F02M35/10308Y02T10/144
    • An intake system of an engine may include an intake line supplying an engine with air, an exhaust line that exhaust gas combusted in the cylinder is exhausted, a housing disposed on the intake line and a compressor is disposed therein, the compressor is operated by a turbine disposed on an exhaust line, a recirculation line that recirculates the air from the intake line of a downstream side of the compressor to the intake line of an upstream side of the compressor, and an anti surge valve disposed on the recirculation line to open/close the recirculation line, wherein a length of a first section (l) that is straight from the anti surge valve is longer than two times the outlet diameter (d) of the anti surge valve in the recirculation line that is formed from the anti surge valve to an upstream side of the compressor.
    • 发动机的进气系统可以包括向发动机供应空气的进气管线,排出在气缸中燃烧的排气的排气管线,设置在进气管路上的壳体和设置在其中的压缩机,压缩机由 设置在排气管路上的涡轮机,将空气从压缩机的下游侧的进气管路再循环到压缩机的上游侧的进气管线的再循环管路,以及设置在再循环管路上的防喘振阀,以打开/ 关闭再循环管线,其中从防喘振阀直线的第一部分(1)的长度长于由防喘振形成的再循环管线中的防喘振阀的出口直径(d)的两倍 阀到压缩机的上游侧。
    • 7. 发明授权
    • Blind with looped blind sheet for adjusting opacity
    • 盲圈用于调整不透明度
    • US08646509B2
    • 2014-02-11
    • US13172624
    • 2011-06-29
    • Chen-Ho Chu
    • Chen-Ho Chu
    • A47H23/06
    • E06B9/24E06B2009/2405E06B2009/2458
    • A blind with a looped blind sheet for adjusting opacity is revealed. The blind includes a top rod supporter, a top rod with two ends connected to the top rod supporter, a bottom rod supporter, a bottom rod with two ends connected to the bottom rod supporter, and looped blind sheet. The looped blind sheet with predetermined length and width includes alternate see-through parts and opaque parts and connected to form a loop having a front blind sheet and a rear blind sheet wound between the top rod and the bottom rod. When the front blind sheet or the rear blind sheet is pulled down or up, the opacity is adjusted by overlap degree of the see-through parts and the opaque parts of the front and the rear blind sheets changing without changing the length of the looped blind sheet.
    • 揭示了一个用于调节不透明度的带盲圈的盲人。 盲人包括顶杆支撑件,具有两端连接到顶杆支撑件的顶杆,底杆支撑件,具有连接到底杆支撑件的两端的底杆和环形盲板。 具有预定长度和宽度的环形盲板包括交替的透视部分和不透明部分,并连接以形成缠绕在顶杆和底杆之间的前帘片和后帘片的环。 当前帘或后遮板被拉下或向上拉动时,不透明度通过透视部分的重叠程度和前盲板和后盲板的不透明部分的重叠程度进行调整,而不改变环形盲板的长度 片。
    • 8. 发明授权
    • Address decoding method and semiconductor memory device using the same
    • 地址解码方法及使用其的半导体存储器件
    • US08588013B2
    • 2013-11-19
    • US13336840
    • 2011-12-23
    • Shin Ho Chu
    • Shin Ho Chu
    • G11C7/00
    • G11C8/18G11C29/1201G11C29/12015G11C29/18
    • A semiconductor memory device includes: a strobe clock generator configured to generate a strobe clock signal having a delay time controlled according to a plurality of test mode signals which are selectively enabled in response to a read signal or write signal; an internal address generator configured to latch an address in response to a first level of the strobe clock signal, and generate an internal address by decoding the address in response to a second level of the strobe clock signal; and an output enable signal generator configured to decode the internal address and generate output enable signals which are selectively enabled.
    • 半导体存储器件包括:选通时钟发生器,被配置为产生具有根据多个测试模式信号控制的延迟时间的选通时钟信号,所述测试模式信号响应于读取信号或写入信号被选择性地使能; 内部地址发生器,被配置为响应于所述选通时钟信号的第一电平来锁存地址,并且响应于所述选通时钟信号的第二电平对所述地址进行解码来产生内部地址; 以及输出使能信号发生器,被配置为对内部地址进行解码并产生有选择地使能的输出使能信号。
    • 10. 发明申请
    • ADDRESS DECODING METHOD AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME
    • 使用该方法的地址解码方法和半导体存储器件
    • US20130114358A1
    • 2013-05-09
    • US13336840
    • 2011-12-23
    • Shin Ho CHU
    • Shin Ho CHU
    • G11C8/18
    • G11C8/18G11C29/1201G11C29/12015G11C29/18
    • A semiconductor memory device includes: a strobe clock generator configured to generate a strobe clock signal having a delay time controlled according to a plurality of test mode signals which are selectively enabled in response to a read signal or write signal; an internal address generator configured to latch an address in response to a first level of the strobe clock signal, and generate an internal address by decoding the address in response to a second level of the strobe clock signal; and an output enable signal generator configured to decode the internal address and generate output enable signals which are selectively enabled.
    • 半导体存储器件包括:选通时钟发生器,被配置为产生具有根据多个测试模式信号控制的延迟时间的选通时钟信号,所述测试模式信号响应于读取信号或写入信号被选择性地使能; 内部地址发生器,被配置为响应于所述选通时钟信号的第一电平来锁存地址,并且响应于所述选通时钟信号的第二电平对所述地址进行解码来产生内部地址; 以及输出使能信号发生器,被配置为对内部地址进行解码并产生有选择地使能的输出使能信号。