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1. 发明申请

US20090109754A1 NON-VOLATILE MEMORY ARRAY ARCHITECTURE WITH JOINED WORD LINES 有权
标题翻译：具有连接字线的非易失性存储器阵列架构
公开(公告)号：US20090109754A1
公开(公告)日：2009-04-30
申请号：US11928086
申请日：2007-10-30
申请人： Steve Schumann , Massimiliano Frulio , Simone Bartoli , Lorenzo Bedarida , Edward Shue Ching Hui
发明人： Steve Schumann , Massimiliano Frulio , Simone Bartoli , Lorenzo Bedarida , Edward Shue Ching Hui
IPC分类号： G11C16/04 , H01S4/00
CPC分类号： G11C16/3418 , Y10T29/49002
摘要： In an embodiment, a non-volatile memory array wherein narrow word lines, as small as the minimum feature size width F, in separate strings, are extended outwardly from a non-volatile memory array and joined by wider connector segments. The joined word lines provide new opportunities. First, metal straps that can be formed to overlie the word lines can be joined by metal connector segments to the word lines. The connector segments can serve as an interface between the polysilicon word lines and the metal straps. Two adjacent word lines in the same string share a single metal strap using these segments thereby reducing the overall number of segments and contacts in the array. Increased width of the polysilicon joinder segments joining word lines in different strings, provides the opportunity for widening the connection beyond the minimum feature size so that contact may be readily made between the metal straps and the polysilicon word lines. Second, the joined word lines require fewer row decoder circuits. One row decoder is provided for each joined set of word lines.
摘要翻译：在一个实施例中，非易失性存储器阵列，其中与分离的串中的最小特征尺寸宽度F一样小的窄字线从非易失性存储器阵列向外延伸并由更宽的连接器段连接。加入的词语提供了新的机会。首先，可以形成为覆盖字线的金属带可以通过金属连接器部分连接到字线。连接器部分可以用作多晶硅字线和金属带之间的接口。相同字符串中的两个相邻字线使用这些段共享单个金属带，从而减少阵列中的段和触点的总数。在不同的串中连接字线的多晶硅接合段的增加的宽度提供了将连接扩大超出最小特征尺寸的机会，使得可以容易地在金属带和多晶硅字线之间进行接触。第二，连接的字线需要更少的行解码器电路。为每个连接的字线组提供一行解码器。

2. 发明授权

US07684245B2 Non-volatile memory array architecture with joined word lines 有权
标题翻译：具有连接字线的非易失性存储器阵列架构
公开(公告)号：US07684245B2
公开(公告)日：2010-03-23
申请号：US11928086
申请日：2007-10-30
申请人： Steve Schumann , Massimiliano Frulio , Simone Bartoli , Lorenzo Bedarida , Edward Shue-Ching Hui
发明人： Steve Schumann , Massimiliano Frulio , Simone Bartoli , Lorenzo Bedarida , Edward Shue-Ching Hui
IPC分类号： G11C11/34 , G11C16/04 , G11C5/06
CPC分类号： G11C16/3418 , Y10T29/49002
摘要： In an embodiment, a non-volatile memory array wherein narrow word lines, as small as the minimum feature size width F, in separate strings, are extended outwardly from a non-volatile memory array and joined by wider connector segments. The joined word lines provide new opportunities. First, metal straps that can be formed to overlie the word lines can be joined by metal connector segments to the word lines. The connector segments can serve as an interface between the polysilicon word lines and the metal straps. Two adjacent word lines in the same string share a single metal strap using these segments thereby reducing the overall number of segments and contacts in the array. Increased width of the polysilicon joinder segments joining word lines in different strings, provides the opportunity for widening the connection beyond the minimum feature size so that contact may be readily made between the metal straps and the polysilicon word lines. Second, the joined word lines require fewer row decoder circuits. One row decoder is provided for each joined set of word lines.
摘要翻译：在一个实施例中，非易失性存储器阵列，其中与分离的串中的最小特征尺寸宽度F一样小的窄字线从非易失性存储器阵列向外延伸并由更宽的连接器段连接。加入的词语提供了新的机会。首先，可以形成为覆盖字线的金属带可以通过金属连接器部分连接到字线。连接器部分可以用作多晶硅字线和金属带之间的接口。相同字符串中的两个相邻字线使用这些段共享单个金属带，从而减少阵列中的段和触点的总数。在不同的串中连接字线的多晶硅接合段的增加的宽度提供了将连接扩大超出最小特征尺寸的机会，使得可以容易地在金属带和多晶硅字线之间进行接触。第二，连接的字线需要更少的行解码器电路。为每个连接的字线组提供一行解码器。

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