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    • 1. 发明授权
    • Display controlling system utilizing non-identical transfer pulse signals to control display and controlling method thereof
    • 显示控制系统利用不相同的转移脉冲信号来控制其显示和控制方法
    • US08456407B2
    • 2013-06-04
    • US12418621
    • 2009-04-06
    • Meng-Tse WengChien-Ru Chen
    • Meng-Tse WengChien-Ru Chen
    • G09G3/36
    • G09G3/3688G09G2370/08
    • A display controlling system utilized in a display, such as an LCD, includes a plurality of data lines and a plurality of source drivers. The source drivers receive a plurality of transfer pulse signals, each of which corresponds to one of the source drivers, and drive the corresponding data lines upon receiving the corresponding transfer pulse signal, wherein the transfer pulse signals are not all identical. The transfer pulse signal can be produced by the timing controller of the display, or the transfer pulse information required for generating the transfer pulse signals can be embedded in the source data to be delivered to the source drivers that generate the transfer pulse signals after obtaining the transfer pulse information. The transfer pulse signal lines between the timing controller and the source drivers can therefore be removed.
    • 在诸如LCD的显示器中使用的显示控制系统包括多个数据线和多个源驱动器。 源极驱动器接收多个传输脉冲信号,每个传输脉冲信号对应于一个源极驱动器,并且在接收到相应的传输脉冲信号时驱动相应的数据线,其中传输脉冲信号并不全部相同。 传输脉冲信号可以由显示器的定时控制器产生,或者可以将生成传送脉冲信号所需的传送脉冲信息嵌入到源数据中,以将其传送到在获得传输脉冲信号之后产生传送脉冲信号的源极驱动器 传输脉冲信息。 因此可以消除定时控制器和源极驱动器之间的转移脉冲信号线。
    • 2. 发明授权
    • Display and method thereof for signal transmission
    • 信号传输的显示及其方法
    • US08421779B2
    • 2013-04-16
    • US12129254
    • 2008-05-29
    • Wen-Teng FanChien-Ru Chen
    • Wen-Teng FanChien-Ru Chen
    • G09G5/00
    • G09G3/3611G09G5/006G09G2310/08G09G2370/08
    • A display and a method for signal transmission of the display are provided. The display has a source driver, a panel, and a timing controller having at least one data pin and a clock signal pin. The timing controller sends a clock signal to the source driver via the clock signal pin, and then sends a start pulse pattern to the source driver via the at least one data pin such that the source driver is notified to receive setting signals and display data signals. The source driver drives the panel according to the setting signals and the display data signals received from the timing controller via the at least one data pin. One or more of the setting signals are received by the source driver within every clock of the clock signal.
    • 提供了一种用于显示器的信号传输的显示器和方法。 显示器具有源驱动器,面板和具有至少一个数据引脚和时钟信号引脚的定时控制器。 定时控制器通过时钟信号引脚向源驱动器发送时钟信号,然后经由至少一个数据引脚向源驱动器发送起始脉冲模式,以便通知源驱动器接收设置信号和显示数据信号 。 源驱动器根据设置信号和经由至少一个数据引脚从定时控制器接收到的显示数据信号驱动面板。 源驱动器在时钟信号的每个时钟内接收一个或多个设置信号。
    • 3. 发明授权
    • Driver circuit of display device
    • 显示装置的驱动电路
    • US08169239B2
    • 2012-05-01
    • US12423185
    • 2009-04-14
    • Meng-Tse WengChien-Ru Chen
    • Meng-Tse WengChien-Ru Chen
    • H03B1/00
    • G09G3/3688G09G3/3614G09G3/3648G09G2300/0426G09G2310/0281G09G2310/0286G09G2310/0297G09G2320/0209G09G2330/021
    • A driver circuit includes a mode control unit and a plurality of source drivers to drive a display panel including N pixel cells on each scan line. Each source driver has M driving channels, and a first subset of the driving channels and a second subset of the driving channels are respectively in a first mode and a second mode according to a preset mode sequence, wherein M≧N. The 1st through Nth driving channels of a first source driver and the Mth through (M−N+1)th driving channels of a second source driver respectively drive the 1st through Nth pixel cells during a first scan period and a second scan period. The modes of the Mth through 1st driving channels of the second source driver are respectively altered to match the modes of the 1st through Mth driving channels of the first source driver by the mode control unit.
    • 驱动器电路包括模式控制单元和多个源驱动器,以驱动包括每个扫描线上的N个像素单元的显示面板。 每个源极驱动器具有M个驱动通道,并且根据预设模式序列,驱动通道的第一子集和驱动通道的第二子集分别处于第一模式和第二模式,其中M≥N。 在第一扫描周期和第二扫描周期期间,第一源极驱动器的第一至第N驱动通道和第二源驱动器的第M至第(M-N + 1)个驱动通道分别驱动第1至第N像素单元。 分别改变第二源驱动器的第M至第1驱动通道的模式,以通过模式控制单元来匹配第一源驱动器的第1至第M驱动通道的模式。
    • 9. 发明申请
    • Output Buffer Adapted to a Source Driver and Source Driver
    • 输出缓冲器适应源驱动器和源驱动器
    • US20100283768A1
    • 2010-11-11
    • US12437694
    • 2009-05-08
    • Meng-Tse WengChien-Ru Chen
    • Meng-Tse WengChien-Ru Chen
    • G06F3/038H03K3/00
    • H03K19/018521
    • An output buffer adapted to a source driver and a source driver are provided. The output buffer comprises an input and an output stage. The input stage comprises an input node, a first and a second output terminal. The output stage comprises a PMOS, a NMOS, a first and a second switches. The first and the second switch are connected between the gate of the PMOS, the first output terminal and the gate of the PMOS, the voltage supply respectively to both receive a latch signal. When the latch signal is in a first state, the first and the second switches disable the output stage. When the latch signal is in a second state, the first and the second switches enable the output stage to transfer an analog data from a DAC of the source driver to the output node connected to the drain of the PMOS and NMOS.
    • 提供适用于源驱动器和源驱动器的输出缓冲器。 输出缓冲器包括输入和输出级。 输入级包括输入节点,第一和第二输出端子。 输出级包括PMOS,NMOS,第一和第二开关。 第一和第二开关连接在PMOS的栅极,PMOS的第一输出端和栅极之间,电压源分别接收锁存信号。 当锁存信号处于第一状态时,第一和第二开关禁用输出级。 当锁存信号处于第二状态时,第一和第二开关使得输出级能够将模拟数据从源极驱动器的DAC传送到连接到PMOS和NMOS的漏极的输出节点。