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    • 3. 发明申请
    • LED backlight unit
    • LED背光单元
    • US20070195551A1
    • 2007-08-23
    • US11708037
    • 2007-02-20
    • Chang Ho Shin
    • Chang Ho Shin
    • F21V7/04
    • G02B6/0021G02B6/0068G02B6/0085G02B6/0091
    • An LED backlight unit which can be assembled without a thermosetting adhesive, improved in heat radiation effects to maintain high brightness, and also significantly improved in productivity. A light source has a substrate and a plurality of light emitting diodes disposed on the substrate. A light guide plate is placed adjacent to the light source. A chassis fixes the light source and the light guide plate therein. Fixing means engagingly fit a side of the light guide plate into the light source plate and chassis. Here, the substrate of the light source is fixed in surface contact with the chassis. The light guide plate assemblable without a thermosetting adhesive facilitates assembling and ensures effective radiation of heat generated from the LED, thereby maintaining high brightness and achieving superb light emitting capability.
    • 可以在没有热固性粘合剂的情况下组装的LED背光单元,改善了散热效果以保持高亮度,并且还显着提高了生产率。 光源具有基板和设置在基板上的多个发光二极管。 导光板与光源相邻放置。 底盘将光源和导光板固定在其中。 固定装置将导光板的一侧接合地配合到光源板和底盘中。 这里,光源的基板与底盘表面接触地固定。 不具有热固性粘合剂组装的导光板便于组装,并且确保从LED产生的热量的有效辐射,从而保持高亮度并获得极好的发光能力。
    • 6. 发明授权
    • Voltage booster for semiconductor device and semiconductor memory device using same
    • 用于半导体器件的电压升压器和使用其的半导体存储器件
    • US07521988B2
    • 2009-04-21
    • US11730651
    • 2007-04-03
    • Chang-Ho Shin
    • Chang-Ho Shin
    • G05F1/10G05F3/02
    • G11C5/145G11C7/20G11C11/4072G11C11/4074
    • A semiconductor device has a power-saving mode and a normal mode. A voltage booster within the semiconductor device responds to the normal mode and the power-saving mode by controlling various internal operating voltages of the semiconductor device using a level shifter, an internal voltage booster, and a voltage boosting circuit. The initial voltage booster is configured to transmit an external power supply voltage through an initial boosting node to a voltage boosting terminal in response to the level shifter output signal during the normal mode, and to block transmission of the external power supply voltage to the initial boosting node to decrease a voltage level of the initial boosting node during the power-saving mode.
    • 半导体器件具有省电模式和正常模式。 半导体器件内的升压器通过使用电平转换器,内部升压器和升压电路控制半导体器件的各种内部工作电压来响应正常模式和功率节省模式。 初始升压器被配置为响应于在正常模式期间的电平移位器输出信号而将外部电源电压通过初始升压节点发送到升压端子,并且阻止外部电源电压发送到初始升压 节点,以在节电模式期间降低初始升压节点的电压电平。
    • 7. 发明申请
    • Circuit and method of driving bitlines of integrated circuit memory using improved precharge scheme and sense-amplification scheme
    • 使用改进的预充电方案和感测放大方案驱动集成电路存储器的位线的电路和方法
    • US20060023535A1
    • 2006-02-02
    • US11180832
    • 2005-07-13
    • Ki-chul ChunChang-ho Shin
    • Ki-chul ChunChang-ho Shin
    • G11C7/00
    • G11C11/4094G11C7/12
    • Provided are a bitline driving circuit of an integrated circuit memory that enhances a precharge scheme and a sense amplification scheme and a bitline driving method. In the bitline driving circuit, a new scheme of precharging the bitlines to voltages greater than or smaller than a voltage VCCA/2 using an auxiliary circuit is used to increase a gate-source voltage of transistors included in each sense amplification circuit. Also, when cell data is 1 and 0, a dummy cell can maintain a voltage difference between the bitlines BL and BLB generated after charge sharing. Furthermore, a sense amplification circuit, which is controlled by an offset control circuit, can remove a threshold voltage offset between the transistors included in each sense amplification circuit. At this time, an auxiliary circuit is used to stabilize the voltage difference.
    • 提供了集成电路存储器的位线驱动电路,其增强了预充电方案和感测放大方案和位线驱动方法。 在位线驱动电路中,使用使用辅助电路将位线预充电至大于或小于电压VCCA / 2的电压的新方案用于增加每个读出放大电路中包括的晶体管的栅极 - 源极电压。 此外,当单元数据为1和0时,虚设单元可以维持电荷共享后产生的位线BL和BLB之间的电压差。 此外,由偏移控制电路控制的感测放大电路可以去除每个感测放大电路中包括的晶体管之间的阈值电压偏移。 此时,使用辅助电路来稳定电压差。