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1. 发明授权

US08875003B1 Interleaved data communications via power line 有权
标题翻译：通过电力线进行交织数据通信
公开(公告)号：US08875003B1
公开(公告)日：2014-10-28
申请号：US13334626
申请日：2011-12-22
申请人： Chad Wolter , Damian Bonicatto
发明人： Chad Wolter , Damian Bonicatto
IPC分类号： H03M13/00
CPC分类号： H03M13/2906 , H03M13/09 , H03M13/1515 , H03M13/27
摘要： Aspects of the present disclosure are directed towards communications over current-carrying power distribution lines. In accordance with one or more embodiments, respective sets of utility-based data indicative of a reading of utility usage taken at different times are communicated. First sets of the data corresponding to readings taken during a first time period are communicated and, thereafter, second sets of the data corresponding to readings taken during a second time period are communicated and interleaved with portions of error correction code (ECC) data. Prior to receiving at least some of the ECC data, the first sets of data are interpreted and access is provided to the interpreted data. After all of the ECC data has been received, the ECC data is used to verify the first sets of data, correct the first sets of data, and access to is provided to the verified first sets of data.
摘要翻译：本公开的方面涉及通过载流配电线路的通信。根据一个或多个实施例，传达指示在不同时间拍摄的公用事业用途的相应的基于效用的数据集。第一组数据对应于在第一时间段期间读取的读数，并且此后，与第二时间段期间读取的读数相对应的第二组数据被传送并与纠错码（ECC）数据的部分交错。在接收ECC数据中的至少一些之前，解释第一组数据，并向解释数据提供访问。在接收到所有的ECC数据之后，ECC数据用于验证第一组数据，校正第一组数据，并且访问被提供给经验证的第一组数据。

2. 发明授权

US08625719B2 DSP workload distribution in a power line carrier system 有权
标题翻译： DSP工作负载分布在电力线载波系统中
公开(公告)号：US08625719B2
公开(公告)日：2014-01-07
申请号：US12134858
申请日：2008-06-06
申请人： Stuart Haug , Chad Wolter , Damian Bonicatto , Verne Olson , Robert Zeppetelle
发明人： Stuart Haug , Chad Wolter , Damian Bonicatto , Verne Olson , Robert Zeppetelle
IPC分类号： H04L27/00
CPC分类号： H04B3/542 , G06F13/1657 , H04B2203/5433 , H04B2203/5466
摘要： Disclosed are various embodiments for dividing workload in a digital signal processing system. In one embodiment, the system includes at least one analog-to-digital converter configured to receive a three phase analog waveform and a digital waveform. The system can also include a first DSP configured to interface with an external computer and a second DSP configured to receive the digital waveform and isolate a specified frequency range. The system can also include a plurality of DSP's configured to extract specified channels from the specified frequency range and output the extracted channel data.
摘要翻译：公开了用于分割数字信号处理系统中的工作负载的各种实施例。在一个实施例中，该系统包括被配置为接收三相模拟波形和数字波形的至少一个模拟 - 数字转换器。该系统还可以包括被配置为与外部计算机接口的第一DSP和被配置为接收数字波形并隔离指定频率范围的第二DSP。该系统还可以包括多个DSP，其被配置为从指定的频率范围提取指定的频道并输出提取的频道数据。

3. 发明申请

US20130163644A1 DIGITAL SIGNAL PROCESSING FOR PLC COMMUNICATIONS HAVING COMMUNICATION FREQUENCIES 有权
标题翻译：具有通信频率的PLC通信的数字信号处理
公开(公告)号：US20130163644A1
公开(公告)日：2013-06-27
申请号：US13334522
申请日：2011-12-22
申请人： Stuart L. Haug , Chad Wolter , Bryce D. Johnson
发明人： Stuart L. Haug , Chad Wolter , Bryce D. Johnson
IPC分类号： H04B1/38
CPC分类号： H04B3/542 , H04B1/38 , H04B2203/5408 , H04B2203/5412 , H04B2203/5433 , H04B2203/5466
摘要： Aspects of the present disclosure are directed toward receiver devices and methods of using receiver devices. One such method can include converting, using an analog-to-digital converter (ADC), and an analog input signal from power distribution lines that carry power using alternating current (AC) to a digital form. This input digital signal can be an oversampled digital signal, where the digital signal is oversampled relative to downstream processing (e.g., FFT-based processing). A processing circuit(s) can then be used to decimate the input digital signal according to a decimation rate. A reference signal can be generated by the processing circuit that is responsive to the decimation rate. The processing circuit can also be used to detect a change in a phase difference between the AC and reference signal and to modify, in response to detecting a change in the phase difference, the decimation rate to counteract the detected change in the phase difference.
摘要翻译：本公开的方面针对接收机设备和使用接收机设备的方法。一种这样的方法可以包括使用模数转换器（ADC）和从使用交流电（AC）传送功率到数字形式的功率分配线的模拟输入信号进行转换。该输入数字信号可以是过采样的数字信号，其中数字信号相对于下游处理被过采样（例如，基于FFT的处理）。然后可以使用处理电路来根据抽取率对输入的数字信号进行抽取。可以由响应于抽取率的处理电路产生参考信号。处理电路还可以用于检测AC和参考信号之间的相位差的变化，并且响应于检测到相位差的变化而修改抽取率以抵消检测到的相位差的变化。

4. 发明授权

US07877218B2 Signal outage detection 有权
标题翻译：信号中断检测
公开(公告)号：US07877218B2
公开(公告)日：2011-01-25
申请号：US12041349
申请日：2008-03-03
申请人： Damian Bonicatto , Chad Wolter , Verne Olson
发明人： Damian Bonicatto , Chad Wolter , Verne Olson
IPC分类号： G01R13/00 , G06F19/00
CPC分类号： H04L1/245
摘要： Disclosed are various embodiments for outage detection. In one embodiment, an outage detection system includes a signal sampler configured to sample a signal on a communications link and to determine a noise level and a signal level of the sample. An outage detection system also includes a comparator configured to compare a critical value with a sum of signal and noise of the sample. An outage detection system further includes a binomial probability analyzer configured to calculate a binomial probability of false outage of the sample and the previous N samples.
摘要翻译：公开了用于中断检测的各种实施例。在一个实施例中，中断检测系统包括被配置为对通信链路上的信号进行采样并确定样本的噪声电平和信号电平的信号采样器。中断检测系统还包括比较器，其被配置为将临界值与样本的信号和噪声之和进行比较。中断检测系统还包括二项概率分析器，其被配置为计算样本的虚假中断和先前N个样本的二项概率。

5. 发明申请

US20090147863A1 Input signal combiner system and method 有权
标题翻译：输入信号组合器系统及方法
公开(公告)号：US20090147863A1
公开(公告)日：2009-06-11
申请号：US12315798
申请日：2008-12-05
申请人： Chad Wolter , Damian Bonicatto , James Glende
发明人： Chad Wolter , Damian Bonicatto , James Glende
IPC分类号： H04B3/00 , H04L27/08
CPC分类号： H04B3/54 , H04B2203/5425 , H04B2203/5466
摘要： Disclosed are various embodiments of an input signal combiner. In one embodiment, a receive stage receives a multi-phase waveform and separates the multi-phase waveform into a plurality of waveforms. Analog-to-digital converters convert the plurality of analog waveforms into at least one digital signal. At least one gain stage adjusts an amplitude of each of the digital signals and combines the amplitude adjusted digital signals into at least one gain adjusted combined signal. A signal extraction stage extracts an inbound signal from the at least one gain adjusted combined signal according to a demodulation scheme.
摘要翻译：公开了输入信号组合器的各种实施例。在一个实施例中，接收级接收多相波形并将多相波形分离成多个波形。模数转换器将多个模拟波形转换为至少一个数字信号。至少一个增益级调整每个数字信号的幅度，并将幅度调整的数字信号组合成至少一个增益调整的组合信号。信号提取级根据解调方案从所述至少一个增益调整的组合信号中提取入站信号。

6. 发明申请

US20070229305A1 Data Communication Over Power Lines 审中-公开
标题翻译：电力线上的数据通信
公开(公告)号：US20070229305A1
公开(公告)日：2007-10-04
申请号：US11760041
申请日：2007-06-08
申请人： Damian Bonicatto , Verne Olson , Chad Wolter , Rolf Flen
发明人： Damian Bonicatto , Verne Olson , Chad Wolter , Rolf Flen
IPC分类号： G08C19/00
CPC分类号： H04B3/54 , H04B2203/5416 , H04B2203/5425 , H04B2203/5433 , H04B2203/5466 , H04B2203/5483 , H04B2203/5491
摘要： A system for receiving and processing signals received from a plurality of endpoints. Each endpoint includes an endpoint transmitter in electrical communication with a power distribution line within a power distribution system. The system comprises a power line coupler. A substation receiver is in electrical communication with the power line coupler. A substation circuit is in electrical communication with the substation transceiver. The substation circuit is configured to simultaneously demodulate signals received from the plurality of different endpoints.
摘要翻译：一种用于接收和处理从多个端点接收的信号的系统。每个端点包括与配电系统内的配电线路电连通的端点发射器。该系统包括电力线耦合器。变电站接收器与电力线耦合器电连通。变电站电路与变电站收发器电气通信。变电站电路被配置为同时解调从多个不同端点接收的信号。

7. 发明授权

US09106365B1 Time-keeping between devices using power distribution line communications 有权
标题翻译：使用配电线路通信的设备之间的时间保持
公开(公告)号：US09106365B1
公开(公告)日：2015-08-11
申请号：US13334589
申请日：2011-12-22
申请人： Damian Bonicatto , Rolf Flen , Stuart L. Haug , Chad Wolter , Verne Olson
发明人： Damian Bonicatto , Rolf Flen , Stuart L. Haug , Chad Wolter , Verne Olson
IPC分类号： G08B23/00 , H04L7/00
CPC分类号： H04L7/00 , G04G7/00 , G08B23/00 , H04B3/54 , H04B2203/542 , H04J3/0661
摘要： Particular embodiments are directed towards a method for communicating time-based data in a power line communication system. The communication system utilized in the method includes: a command center; a collector device; and a plurality of endpoint devices. The method includes communicating, from the collector device, downstream data to the plurality of endpoint devices. This downstream communication utilizes a communication protocol that is relative to a collector network time, and is over a set of power distribution lines carrying alternating current (AC). The collector network time uses the local oscillator. The AC zero-crossing event can be used as a time base for other versions of the network time. Conceptually, the AC can be thought of as acting as a reference clock for maintaining these other network times, although the clocking function can be carried out in the digital realm, e.g., using a digital-signal processor (DSP).
摘要翻译：具体实施例涉及用于在电力线通信系统中传送基于时间的数据的方法。该方法中使用的通信系统包括：指挥中心; 收集装置; 和多个端点设备。该方法包括从收集器设备将下游数据传送到多个端点设备。该下行通信利用相对于集线器网络时间的通信协议，并且在一组承载交流电（AC）的配电线上。收集器网络时间使用本地振荡器。 AC过零事件可以用作网络时间的其他版本的时基。在概念上，虽然时钟功能可以在数字领域中实现，例如使用数字信号处理器（DSP），AC可以被认为是用作维持这些其他网络时间的参考时钟。

8. 发明申请

US20080307136A1 Arbitration of Memory Transfers in a DSP System 有权
标题翻译： DSP系统中的存储器传输仲裁
公开(公告)号：US20080307136A1
公开(公告)日：2008-12-11
申请号：US12134821
申请日：2008-06-06
申请人： Stuart Haug , Chad Wolter , Damian Bonicatto , Verne Olson , Robert Zeppetelle , Matt Tilstra
发明人： Stuart Haug , Chad Wolter , Damian Bonicatto , Verne Olson , Robert Zeppetelle , Matt Tilstra
IPC分类号： G06F13/00 , G06F15/76 , G06F9/30
CPC分类号： H04B3/542 , G06F13/1657 , H04B2203/5433 , H04B2203/5466
摘要： Disclosed are various embodiments for arbitration of memory transfers in a digital signal processing system. In one embodiment, a digital signal processing system includes a plurality of DSP's having an external memory. The DSP's are further configurable to act as a master processor and a slave processor relative to another DSP. The system also includes an arbiter configured to maintain DSP status data and arbitrate requests between master processors and slave processors in the system.
摘要翻译：公开了用于在数字信号处理系统中仲裁存储器传输的各种实施例。在一个实施例中，数字信号处理系统包括具有外部存储器的多个DSP。 DSP可进一步配置为相对于另一个DSP充当主处理器和从属处理器。该系统还包括一个仲裁器，用于在系统中的主处理器和从属处理器之间维护DSP状态数据和仲裁请求。

9. 发明申请

US20080304595A1 DSP workload distribution in a power line carrier system 有权
标题翻译： DSP工作负载分布在电力线载波系统中
公开(公告)号：US20080304595A1
公开(公告)日：2008-12-11
申请号：US12134858
申请日：2008-06-06
申请人： Stuart Haug , Chad Wolter , Damian Bonicatto , Verne Olson , Robert Zeppetelle
发明人： Stuart Haug , Chad Wolter , Damian Bonicatto , Verne Olson , Robert Zeppetelle
IPC分类号： H04L27/00
CPC分类号： H04B3/542 , G06F13/1657 , H04B2203/5433 , H04B2203/5466
摘要： Disclosed are various embodiments for dividing workload in a digital signal processing system. In one embodiment, the system includes at least one analog-to-digital converter configured to receive a three phase analog waveform and a digital waveform. The system can also include a first DSP configured to interface with an external computer and a second DSP configured to receive the digital waveform and isolate a specified frequency range. The system can also include a plurality of DSP's configured to extract specified channels from the specified frequency range and output the extracted channel data.
摘要翻译：公开了用于分割数字信号处理系统中的工作负载的各种实施例。在一个实施例中，该系统包括被配置为接收三相模拟波形和数字波形的至少一个模拟 - 数字转换器。该系统还可以包括被配置为与外部计算机接口的第一DSP和被配置为接收数字波形并隔离指定频率范围的第二DSP。该系统还可以包括多个DSP，其被配置为从指定的频率范围提取指定的频道并输出提取的频道数据。

10. 发明申请

US20080215268A1 Signal Outage Detection 有权
标题翻译：信号中断检测
公开(公告)号：US20080215268A1
公开(公告)日：2008-09-04
申请号：US12041349
申请日：2008-03-03
申请人： Damian Bonicatto , Chad Wolter , Verne Olson
发明人： Damian Bonicatto , Chad Wolter , Verne Olson
IPC分类号： G06F17/18 , G01R29/26
CPC分类号： H04L1/245
摘要： Disclosed are various embodiments for outage detection. In one embodiment, an outage detection system includes a signal sampler configured to sample a signal on a communications link and to determine a noise level and a signal level of the sample. An outage detection system also includes a comparator configured to compare a critical value with a sum of signal and noise of the sample. An outage detection system further includes a binomial probability analyzer configured to calculate a binomial probability of false outage of the sample and the previous N samples.
摘要翻译：公开了用于中断检测的各种实施例。在一个实施例中，中断检测系统包括被配置为对通信链路上的信号进行采样并且确定样本的噪声电平和信号电平的信号采样器。中断检测系统还包括比较器，其被配置为将临界值与样本的信号和噪声之和进行比较。中断检测系统还包括二项概率分析器，其被配置为计算样本的虚假中断和先前N个样本的二项概率。

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