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    • 1. 发明申请
    • Distributed processing architecture with scalable processing layers
    • 具有可扩展处理层的分布式处理架构
    • US20030105799A1
    • 2003-06-05
    • US10004753
    • 2001-12-03
    • Avaz Networks, Inc.
    • Shoab Ahmad KhanMuhammad Mohsin Rahmatullah
    • G06F009/00
    • G06F15/7842
    • The present invention is a system on chip architecture having scalable, distributed processing and memory capabilities through a plurality of processing layers. In a preferred embodiment, a distributed processing layer processor comprises a plurality of processing layers, a processing layer controller, and a central direct memory access controller. The processing layer controller manages the scheduling of tasks and distribution of processing tasks to each processing layer. Within each processing layer, a plurality of pipelined processing units (PUs), specially designed for conducting a defined set of processing tasks, are in communication with a plurality of program memories and data memories. One application of the present invention is in a media gateway that is designed to enable the communication of media across circuit switched and packet switched networks. The hardware system architecture of the said novel gateway is comprised of a plurality of DPLPs, referred to as Media Engines that are interconnected with a Host Processor or Packet Engine, which, in turn, is in communication with interfaces to networks. Each of the PUs within the processing layers of the Media Engines are specially designed to perform a class of media processing specific tasks, such as line echo cancellation, encoding or decoding data, or tone signaling.
    • 本发明是通过多个处理层具有可扩展的,分布式处理和存储能力的片上系统体系结构。 在优选实施例中,分布式处理层处理器包括多个处理层,处理层控制器和中央直接存储器访问控制器。 处理层控制器管理任务的调度和处理任务的分发到每个处理层。 在每个处理层内,专门用于进行一组定义的处理任务的多个流水线处理单元(PU)与多个程序存储器和数据存储器通信。 本发明的一个应用是在媒体网关中,该媒体网关被设计为能够跨电路交换和分组交换网络进行媒体的通信。 所述新颖网关的硬件系统架构由多个DPLP组成,称为媒体引擎,其与主机处理器或分组引擎互连,主机处理器或分组引擎又与网络的接口通信。 媒体引擎的处理层内的每个PU被专门设计成执行一类媒体处理特定的任务,例如线回声消除,编码或解码数据或音调信令。
    • 2. 发明申请
    • Method and system for filtering a signal and for providing echo cancellation
    • 用于过滤信号和提供回波消除的方法和系统
    • US20030076950A1
    • 2003-04-24
    • US10038367
    • 2001-10-19
    • Avaz Networks, Inc.
    • Mohammad UsmanJon Laurent PangAmjad LunaImtinan Elahi
    • H04M009/08
    • H04M9/082H04B3/23
    • The present invention provides for adaptive filters that have improved computational and memory bandwidth proprieties. When applied to telecommunication applications, the present invention additionally provides for improved methods and systems of canceling echoes. In one embodiment of the adaptive filter of the present invention, a filter, preferably an adaptive finite impulse response (FIR) filter, of an appropriate length, N, is chosen. Once the filter is chosen, convergence is achieved and the filter is converted to an infinite impulse response (IIR) filter. In the course of operation, data is received from an input source and used to adapt the zeroes of the IIR filter using the least means square (LMS) approach, keeping the poles fixed. The adaptation process generates a set of converged filter coefficients that are then applied to the input signal to create a modified signal used to filter the data. The novel adaptive filter method and system presented herein can be used to improve the calculation of the echo impulse response by, among other things, reducing the computational complexity and memory requirements of the coefficient calculation conducted within the adaptive filter.
    • 本发明提供了具有改进的计算和存储器带宽特性的自适应滤波器。 当应用于电信应用时,本发明另外提供了改进的抵消回波的方法和系统。 在本发明的自适应滤波器的一个实施例中,选择具有适当长度N的滤波器,优选地是自适应有限脉冲响应(FIR)滤波器。 一旦选择了滤波器,就实现了收敛并将滤波器转换为无限脉冲响应(IIR)滤波器。 在操作过程中,从输入源接收数据,并使用最小均方(LMS)方法来适应IIR滤波器的零点,保持极点的固定。 适应过程产生一组会聚滤波器系数,然后将其应用于输入信号,以产生用于过滤数据的修改信号。 本文提出的新型自适应滤波方法和系统可用于通过减少自适应滤波器内进行的系数计算的计算复杂度和存储器要求,来改善回波脉冲响应的计算。