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    • 1. 发明授权
    • Clock data recovery with high speed level shift
    • 具有高速电平转换的时钟数据恢复
    • US07804348B1
    • 2010-09-28
    • US12603231
    • 2009-10-21
    • Ali Atesoglu
    • Ali Atesoglu
    • G06F1/04
    • H03K19/018528
    • Clock data recovery circuitry with a high speed level shifting circuits and methods are disclosed. One embodiment provides clock data recover with a high speed level shifting circuit that uses an input signal to generate two intermediate signals and uses the intermediate signals to generate an output signal such that voltage stress on individual devices within the level shifting circuit is minimized. In one embodiment, the level shifter includes a first driver and second driver coupled in parallel to provide intermediate signals to an output driver. In a particular aspect, individual transistors of the output driver are subject to voltage stresses that are less than the peak-to-peak amplitude of the output signal. In one embodiment, the first driver includes an n-channel metal oxide semiconductor (“NMOS”) cascode circuit, the second driver includes a p-channel metal oxide semiconductor (“PMOS”) cascode circuit, and the output driver includes a complementary metal oxide conductor (“CMOS”) inverter stage. In one embodiment, the level shifter is implemented in an integrated circuit characterized by 45-nanometer technology. In another embodiment, the level shifter is implemented in an integrated circuit characterized by 65-nanometer technology.
    • 公开了具有高速电平移位电路和方法的时钟数据恢复电路。 一个实施例提供使用高速电平移位电路的时钟数据恢复,其使用输入信号来产生两个中间信号,并使用中间信号来产生输出信号,使得电平移位电路内各个器件上的电压应力最小化。 在一个实施例中,电平移位器包括并联耦合的第一驱动器和第二驱动器,以向输出驱动器提供中间信号。 在特定方面,输出驱动器的各个晶体管受到小于输出信号的峰 - 峰幅度的电压应力。 在一个实施例中,第一驱动器包括n沟道金属氧化物半导体(“NMOS”)共源共栅电路,第二驱动器包括p沟道金属氧化物半导体(“PMOS”)共源共栅电路,并且输出驱动器包括互补金属 氧化物导体(“CMOS”)逆变器级。 在一个实施例中,电平移位器在以45纳米技术为特征的集成电路中实现。 在另一个实施例中,电平移位器以65纳米技术为特征的集成电路实现。
    • 3. 发明授权
    • Voltage-controlled-oscillator circuitry with power supply noise rejection
    • 具有电源噪声抑制的压控振荡器电路
    • US08378723B1
    • 2013-02-19
    • US12910054
    • 2010-10-22
    • Ali Atesoglu
    • Ali Atesoglu
    • H03L7/06
    • H03L7/099
    • Integrated circuits with phase-locked loops are provided. A phase-locked loop may include voltage-controlled-oscillator (VCO) circuitry. The VCO circuitry may include multiple VCO circuits that receive power supply signals from a positive power supply terminal and a ground power supply terminal. Low-pass filters may be connected to the positive and ground power supply terminals to suppress high frequency noise that may be injected through the power supply terminals. The VCO circuitry may be operable in multiple modes. In a given mode, a selected one of the multiple VCO circuits is enabled while disabling the remaining VCO circuits. Switch circuits formed from transmission gates with pull-down transistors may be used to select which VCO circuit is active.
    • 提供具有锁相环的集成电路。 锁相环可以包括压控振荡器(VCO)电路。 VCO电路可以包括从正电源端子和接地电源端子接收电源信号的多个VCO电路。 低通滤波器可以连接到正极和地电源端子,以抑制可能通过电源端子注入的高频噪声。 VCO电路可以在多种模式下操作。 在给定模式中,多个VCO电路中选定的一个使能,同时禁用剩余的VCO电路。 由具有下拉晶体管的传输门形成的开关电路可用于选择哪个VCO电路是有效的。
    • 4. 发明授权
    • Integrated circuits with configurable inductors
    • 具有可配置电感器的集成电路
    • US08319564B2
    • 2012-11-27
    • US12748261
    • 2010-03-26
    • Weiqi DingSergey ShumarayevWilson WongAli AtesogluSharat Babu Ippili
    • Weiqi DingSergey ShumarayevWilson WongAli AtesogluSharat Babu Ippili
    • H03B5/12H03L1/00
    • H03B5/1212H01F2021/125H01F2027/2809H01L2924/0002H03B5/1243H03B5/1268H01L2924/00
    • Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.
    • 提供具有锁相环的集成电路。 锁相环可以包括振荡器,相位频率检测器,电荷泵,环路滤波器,压控振荡器和可编程分频器。 压控振荡器可以包括多个电感器,振荡器电路和缓冲电路。 多个电感器中选择的一个可以主动地连接到振荡器电路。 压控振荡器可以具有多个振荡器电路。 每个振荡器电路可以连接到相应的电感器,可以包括变容二极管,并且可以由相应的电压调节器供电。 每个振荡器电路可以通过相关联的耦合电容器耦合到缓冲电路中的相应输入晶体管对。 所选择的一个振荡器电路可以在正常操作期间通过向所选振荡器电路中的一个提供高电压并且向剩余的振荡器电路提供接地电压而导通。
    • 5. 发明申请
    • INTEGRATED CIRCUITS WITH CONFIGURABLE INDUCTORS
    • 集成电路与配置电感器
    • US20110234331A1
    • 2011-09-29
    • US12748261
    • 2010-03-26
    • Weiqi DingSergey ShumarayevWilson WongAli AtesogluSharat Babu Ippili
    • Weiqi DingSergey ShumarayevWilson WongAli AtesogluSharat Babu Ippili
    • H03B5/12H01F5/00
    • H03B5/1212H01F2021/125H01F2027/2809H01L2924/0002H03B5/1243H03B5/1268H01L2924/00
    • Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.
    • 提供具有锁相环的集成电路。 锁相环可以包括振荡器,相位频率检测器,电荷泵,环路滤波器,压控振荡器和可编程分频器。 压控振荡器可以包括多个电感器,振荡器电路和缓冲电路。 多个电感器中选择的一个可以主动地连接到振荡器电路。 压控振荡器可以具有多个振荡器电路。 每个振荡器电路可以连接到相应的电感器,可以包括变容二极管,并且可以由相应的电压调节器供电。 每个振荡器电路可以通过相关联的耦合电容器耦合到缓冲电路中的相应输入晶体管对。 所选择的一个振荡器电路可以在正常操作期间通过向所选振荡器电路中的一个提供高电压并且向剩余的振荡器电路提供接地电压而导通。
    • 6. 发明授权
    • Integrated circuits with configurable inductors
    • 具有可配置电感器的集成电路
    • US08836443B2
    • 2014-09-16
    • US13617347
    • 2012-09-14
    • Weiqi DingSergey ShumarayevWilson WongAli AtesogluSharat Babu Ippili
    • Weiqi DingSergey ShumarayevWilson WongAli AtesogluSharat Babu Ippili
    • H01L23/66H03B5/08H03C3/22H01F27/29H03B5/12H01F27/28H01F21/12
    • H03B5/1212H01F2021/125H01F2027/2809H01L2924/0002H03B5/1243H03B5/1268H01L2924/00
    • Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.
    • 提供具有锁相环的集成电路。 锁相环可以包括振荡器,相位频率检测器,电荷泵,环路滤波器,压控振荡器和可编程分频器。 压控振荡器可以包括多个电感器,振荡器电路和缓冲电路。 多个电感器中选择的一个可以主动地连接到振荡器电路。 压控振荡器可以具有多个振荡器电路。 每个振荡器电路可以连接到相应的电感器,可以包括变容二极管,并且可以由相应的电压调节器供电。 每个振荡器电路可以通过相关联的耦合电容器耦合到缓冲电路中的相应输入晶体管对。 所选择的一个振荡器电路可以在正常操作期间通过向所选振荡器电路中的一个提供高电压并且向剩余的振荡器电路提供接地电压而导通。
    • 8. 发明授权
    • Programmable supply voltage regulator for oscillator
    • 用于振荡器的可编程电源稳压器
    • US07602260B1
    • 2009-10-13
    • US11944386
    • 2007-11-21
    • Ali Atesoglu
    • Ali Atesoglu
    • H03L1/00
    • H03L7/099H03B5/1212H03B5/1221H03B5/1228H03B5/124H03B5/1293H03B27/00H03L7/0995
    • A circuit comprises a programmable voltage regulator and an oscillator. The programmable regulator generates a regulated supply voltage using an input voltage and changes the regulated supply voltage from a first voltage to a second voltage in response to a first control signal. The first and the second voltages are generated using charge from the input voltage. The regulated supply voltage drives the oscillator. The oscillator varies a frequency of a periodic output signal within a frequency range in response to changes in a control voltage. The frequency range of the periodic output signal varies when the first control signal causes the regulated supply voltage to change from the first voltage to the second voltage.
    • 电路包括可编程电压调节器和振荡器。 可编程调节器使用输入电压产生稳定的电源电压,并响应于第一控制信号将调节的电源电压从第一电压改变到第二电压。 使用来自输入电压的电荷产生第一和第二电压。 稳压电源驱动振荡器。 振荡器响应于控制电压的变化而改变频率范围内的周期性输出信号的频率。 当第一控制信号使稳定的电源电压从第一电压变为第二电压时,周期性输出信号的频率范围变化。
    • 9. 发明授权
    • Latched comparator circuitry
    • 锁存比较器电路
    • US08692582B1
    • 2014-04-08
    • US13345384
    • 2012-01-06
    • Ali AtesogluWeiqi Ding
    • Ali AtesogluWeiqi Ding
    • H03K5/22
    • H03K3/037H03K5/249
    • Integrated circuits having analog-to-digital converters are provided. Analog-to-digital converters may contain latched comparators. A latched comparator may include inputs configured to receive a differential input voltage signal, a differential reference voltage signal, and a clock signal. The comparator may include a preamplifier, a latching circuit, a level shifter, and a flip-flop coupled in series. The preamplifier may include large input transistors for minimizing offset, stacked tail transistors, and diode-connected load transistors for minimizing kickback noise. The preamplifier may be used to generate amplified voltage signals. The latching circuit may include a first pair of cross-coupled pull-down transistors, a second pair of cross-coupled pull-up transistors, and precharge transistors. The precharge transistors may serve to precharge the latch output to a predetermined voltage level during a first clock phase, whereas the first and second transistor pairs may serve to perform exponential regeneration on the amplified voltage signals during a second clock phase.
    • 提供了具有模数转换器的集成电路。 模数转换器可能包含锁存的比较器。 锁存的比较器可以包括被配置为接收差分输入电压信号,差分参考电压信号和时钟信号的输入。 比较器可以包括前置放大器,锁存电路,电平移位器和串联耦合的触发器。 前置放大器可以包括用于最小化偏移的堆叠尾部晶体管的大输入晶体管和用于最小化反冲噪声的二极管连接的负载晶体管。 前置放大器可用于产生放大的电压信号。 锁存电路可以包括第一对交叉耦合下拉晶体管,第二对交叉耦合上拉晶体管和预充电晶体管。 预充电晶体管可以用于在第一时钟相位期间将锁存器输出预充电到预定电压电平,而第一和第二晶体管对可用于在第二时钟相位期间对放大的电压信号执行指数再生。
    • 10. 发明申请
    • INTEGRATED CIRCUITS WITH CONFIGURABLE INDUCTORS
    • 集成电路与配置电感器
    • US20130009279A1
    • 2013-01-10
    • US13617347
    • 2012-09-14
    • Weiqi DingSergey ShumarayevWilson WongAli AtesogluSharat Babu Ippili
    • Weiqi DingSergey ShumarayevWilson WongAli AtesogluSharat Babu Ippili
    • H01L27/08H01L21/20
    • H03B5/1212H01F2021/125H01F2027/2809H01L2924/0002H03B5/1243H03B5/1268H01L2924/00
    • Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.
    • 提供具有锁相环的集成电路。 锁相环可以包括振荡器,相位频率检测器,电荷泵,环路滤波器,压控振荡器和可编程分频器。 压控振荡器可以包括多个电感器,振荡器电路和缓冲电路。 多个电感器中选择的一个可以主动地连接到振荡器电路。 压控振荡器可以具有多个振荡器电路。 每个振荡器电路可以连接到相应的电感器,可以包括变容二极管,并且可以由相应的电压调节器供电。 每个振荡器电路可以通过相关联的耦合电容器耦合到缓冲电路中的相应输入晶体管对。 所选择的一个振荡器电路可以在正常操作期间通过向所选振荡器电路中的一个提供高电压并且向剩余的振荡器电路提供接地电压而导通。