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1. 发明授权

US07239669B2 Asynchronous system-on-a-chip interconnect 有权
标题翻译：异步片上系统互连
公开(公告)号：US07239669B2
公开(公告)日：2007-07-03
申请号：US10634597
申请日：2003-08-04
申请人： Uri Cummings , Andrew Lines
发明人： Uri Cummings , Andrew Lines
IPC分类号： H04L27/04
CPC分类号： G06F13/423 , G06F1/12 , G06F2213/0038 , H04L7/005 , H04L7/02 , H04L49/101 , H04L2012/5674 , H04Q3/0004 , H04Q2213/13034 , H04Q2213/13214 , H04Q2213/13322 , H04Q2213/13361 , H04Q2213/13362
摘要： Methods and apparatus are described relating to a system-on-a-chip which includes a plurality of synchronous modules, each synchronous module having an associated clock domain characterized by a data rate, the data rates comprising a plurality of different data rates. The system-on-a-chip also includes a plurality of clock domain converters. Each clock domain converter is coupled to a corresponding one of the synchronous modules, and is operable to convert data between the clock domain of the corresponding synchronous module and an asynchronous domain characterized by transmission of data according to an asynchronous handshake protocol. An asynchronous crossbar is coupled to the plurality of clock domain converters, and is operable in the asynchronous domain to implement a first-in-first-out (FIFO) channel between any two of the clock domain converters, thereby facilitating communication between any two of the synchronous modules.
摘要翻译：描述了涉及包括多个同步模块的片上系统的方法和装置，每个同步模块具有由数据速率表征的相关联的时钟域，数据速率包括多个不同的数据速率。片上系统还包括多个时钟域转换器。每个时钟域转换器被耦合到对应的一个同步模块，并且可操作以在对应的同步模块的时钟域和根据异步握手协议的数据传输特征的异步域之间转换数据。异步交叉开关耦合到多个时钟域转换器，并且可在异步域中操作以实现任何两个时钟域转换器之间的先进先出（FIFO）通道，从而促进任何两个时钟域转换器之间的通信同步模块。

2. 发明授权

US07224566B2 Interfaces between semiconductor circuitry and transpinnor-based circuitry 有权
标题翻译：半导体电路和基于透明元件的电路之间的接口
公开(公告)号：US07224566B2
公开(公告)日：2007-05-29
申请号：US10419282
申请日：2003-04-17
申请人： David Green Baskin, legal representative , Stephen J. Nuspl , Richard Spitzer , E. James Torok , Edward Wuori
发明人： Arpad Barna, deceased
IPC分类号： H01H47/00
CPC分类号： G11C11/15 , G11C11/16 , H03K19/0175
摘要： Electronic systems are described including semiconductor circuitry characterized by first signals and all-metal circuitry characterized by second signals and comprising a plurality of transpinnors. Each transpinnor includes a network of thin-film elements. At least one thin-film element in each transpinnor exhibits giant magnetoresistance. Each transpinnor includes a conductor inductively coupled to the at least one thin-film element for controlling operation of the transpinnor. Interface circuitry connects the semiconductor circuitry to the all-metal circuitry and converts between the first signals and the second signals.
摘要翻译：描述了电子系统，其包括由第一信号和全金属电路表征的半导体电路，其特征在于第二信号并且包括多个透明元件。每个透明元件包括薄膜元件网络。每个透明体中至少有一个薄膜元件表现出巨大的磁阻。每个透明元件包括感应耦合到至少一个薄膜元件的导体，用于控制透明元件的操作。接口电路将半导体电路连接到全金属电路，并在第一信号和第二信号之间进行转换。

4. 发明授权

US07208389B1 Method of porogen removal from porous low-k films using UV radiation 失效
标题翻译：使用紫外线辐射从多孔低k膜去除致孔剂的方法
公开(公告)号：US07208389B1
公开(公告)日：2007-04-24
申请号：US10672311
申请日：2003-09-26
申请人： Adrianne K. Tipton , Brian G. Lu , Patrick A. Van Cleemput , Michelle T. Schulberg , Qingguo Wu , Haiying Fu , Feng Wang
发明人： Adrianne K. Tipton , Brian G. Lu , Patrick A. Van Cleemput , Michelle T. Schulberg , Qingguo Wu , Haiying Fu , Feng Wang
IPC分类号： H01L21/76
CPC分类号： H01L21/31695 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02348
摘要： Methods of preparing a porous low-k dielectric material on a substrate are provided. The methods involve the use of ultraviolet radiation to react with and remove porogen from a porogen containing precursor film, leaving a porous low-k dielectric matrix. Methods using oxidative conditions and non-oxidative conditions are described. The methods described may be used to remove porogen from porogen-containing precursor films. The porogen may be a hydrocarbon such as a terpene (e.g., alpha-terpinene) or a norbornene (e.g., ENB). The resulting porous low-k dielectric matrix can then be annealed to remove water and remaining silanols capped to protect it from degradation by ambient conditions, which methods will also be described.
摘要翻译：提供了在衬底上制备多孔低k电介质材料的方法。这些方法涉及使用紫外线辐射与含致孔剂的前体膜反应并除去致孔剂，留下多孔的低k电介质基质。描述了使用氧化条件和非氧化条件的方法。所描述的方法可用于从含致孔剂的前体膜中除去致孔剂。致孔剂可以是烃，例如萜烯（例如α-萜品烯）或降冰片烯（例如ENB）。然后可以将得到的多孔低k电介质基体退火以除去水和封闭的剩余硅烷醇，以保护其免受环境条件的退化，这些方法也将被描述。

5. 发明授权

US07203799B1 Invalidation of instruction cache line during reset handling 有权
标题翻译：复位处理期间指令高速缓存线无效
公开(公告)号：US07203799B1
公开(公告)日：2007-04-10
申请号：US10815559
申请日：2004-03-31
申请人： James Loran Ball
发明人： James Loran Ball
IPC分类号： G06F12/12
CPC分类号： G06F12/0891
摘要： Methods and apparatus are provided for handling events such as faults and resets. Specialized circuitry or hardware is provided within a processor to invalidate the cache line associated with the processor cache reset address. Based on the invalided state of the cache reset address line, the processor obtains new instructions from data memory. The new instructions can be configured to invalidate the remaining cache lines using software mechanisms.
摘要翻译：提供了用于处理故障和复位等事件的方法和装置。在处理器内提供专用电路或硬件以使与处理器高速缓存复位地址相关联的高速缓存线无效。基于高速缓存复位地址线的无效状态，处理器从数据存储器获取新的指令。新指令可以配置为使用软件机制使剩余的高速缓存行无效。

7. 外观设计

USD537126S1 Informational display assembly for a gaming table 有权
标题翻译：用于游戏桌的信息显示组件
公开(公告)号：USD537126S1
公开(公告)日：2007-02-20
申请号：US29238107
申请日：2005-09-09
申请人： Scott Boyd , Kevan Wilkins , Rick Rowe
设计人： Scott Boyd , Kevan Wilkins , Rick Rowe

8. 发明授权

US07179661B1 Chemical mechanical polishing test structures and methods for inspecting the same 有权
标题翻译：化学机械抛光试验结构及检验方法
公开(公告)号：US07179661B1
公开(公告)日：2007-02-20
申请号：US09648095
申请日：2000-08-25
申请人： Akella V. S. Satya , Lynda C. Mantalas , Gustavo A. Pinto
发明人： Akella V. S. Satya , Lynda C. Mantalas , Gustavo A. Pinto
IPC分类号： H01L21/00
CPC分类号： H01L22/34
摘要： Disclosed is a semiconductor die having a plurality of dummy fillings positioned and sized to minimize defects during chemical mechanical polishing is disclosed. At least one of the dummy fillings is coupled to an underlying test structure. In a preferred embodiment, the semiconductor die also includes a plurality of conductive layers and a substrate. The underlying test structure includes a first layer portion formed from a first one of the plurality of conductive layer and a via coupling the first layer portion to the at least one dummy filling. In another aspect, the underlying test structure also has a via coupling the first layer portion to the substrate, and the underlying test structure comprises a plurality of layer portions and vias to form a multilevel test structure.
摘要翻译：公开了一种具有多个虚拟填料的半导体管芯，其中所述多个虚拟填料的位置和尺寸被设计成使化学机械抛光期间的缺陷最小化。虚拟填充物中的至少一个耦合到底层测试结构。在优选实施例中，半导体管芯还包括多个导电层和衬底。下面的测试结构包括由多个导电层中的第一个形成的第一层部分和将第一层部分连接到至少一个虚拟填充物的通孔。在另一方面，基础测试结构还具有将第一层部分耦合到衬底的通孔，并且底层测试结构包括多个层部分和通孔以形成多层测试结构。

9. 发明授权

US07177404B2 System for computer-based, calendar-controlled message creation and delivery 失效
标题翻译：用于基于计算机，日历控制的消息创建和传递的系统
公开(公告)号：US07177404B2
公开(公告)日：2007-02-13
申请号：US10964175
申请日：2004-10-12
申请人： Lawrence Rosenthal
发明人： Lawrence Rosenthal
IPC分类号： H04M1/64
CPC分类号： H04M11/10 , H04M1/72547 , H04M1/72566
摘要： Methods and apparatus are described for creating, scheduling and delivering messages. A message having a first audio component is generated in response to input from a user. The input includes words entered by the user. The first audio component is operable to facilitate audible playback of the words. Delivery of the message at a future time to a communication device is scheduled in response to specification of the future time by the user. A connection to the communication device is established at the future time via a communications network. The message is transmitted over the connection such that the words associated with the first audio component of the message are audible via the communication device.
摘要翻译：描述了创建，调度和传递消息的方法和设备。响应于来自用户的输入而产生具有第一音频分量的消息。输入包括用户输入的单词。第一音频组件可操作以便于语音的回放。响应于用户对未来时间的规定，安排将消息在未来时间传送到通信设备。通过通信网络在将来建立到通信设备的连接。消息通过连接发送，使得与消息的第一音频分量相关联的词通过通信设备是可听见的。

10. 发明授权

US07176673B2 Direct current detection circuit 有权
标题翻译：直流检测电路
公开(公告)号：US07176673B2
公开(公告)日：2007-02-13
申请号：US10901249
申请日：2004-07-27
申请人： Yasuhiro Tsubota , Nobuyuki Toyoura , Masao Mabuchi
发明人： Yasuhiro Tsubota , Nobuyuki Toyoura , Masao Mabuchi
IPC分类号： G01R15/18
CPC分类号： G01R19/20 , H02H3/33
摘要： A direct current detection circuit has a zero-phase current transformer with source lines inserted therethrough for detecting current differences among them and generates a comparison voltage value based on a divided voltage value obtained between the zero-phase current transformer and a voltage divider resistor according to a change in the self-impedance of the zero-phase current transformer. An offset current is passed through the zero-phase current transformer to make it possible to detect on the basis of the comparison voltage value a direct current value in a range which is otherwise difficult to detect accurately on the basis of the comparison voltage value because of influence of hysteresis characteristic of the zero-phase current transformer. A control circuit detects a present direct current value based on the comparison voltage value and the value of the offset current.
摘要翻译：直流检测电路具有零相电流互感器，其源极线插入其中，用于检测它们之间的电流差异，并根据在零相电流互感器和分压电阻器之间获得的分压值产生比较电压值，根据零相电流互感器的自阻变化。偏移电流通过零相电流互感器，使得有可能在比较电压值的基础上检测在另外难以准确地基于比较电压值精确检测的范围内的直流电流值，这是由于零相电流互感器滞后特性的影响。控制电路基于比较电压值和偏移电流的值来检测当前的直流电流值。

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