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    • 1. 发明授权
    • Method and device for interleaving and method and device for de-interleaving
    • 用于交织的方法和装置以及用于解交织的方法和装置
    • US07428667B2
    • 2008-09-23
    • US11540059
    • 2006-09-29
    • Toshiro KawaharaToshio MikiSanae HotaniTakashi Suzuki
    • Toshiro KawaharaToshio MikiSanae HotaniTakashi Suzuki
    • G06F11/00
    • H04L1/0071H03M13/00H03M13/27H03M13/2703H03M13/2707H03M13/2764H03M13/2792H03M13/35H03M13/356H04L1/0009H04L1/0025H04L1/007H04L1/0072H04L1/0088
    • The writing address supply part 210 supplies writing addresses for writing the bits forming bit sequences corresponding to the header H contained in a frame to be transmitted or stored and bit sequences corresponding to the data D, into the operating memory 220. The reading address supply part 230 alternately supplies to the operating memory 220 a plurality of addresses for reading a plurality of continuous bits corresponding to the header H from the operating memory 220, and an address for reading 1 bit corresponding to the data D from the operating memory 220, and reads the bit sequence such that the bits forming the bit sequence corresponding to the header H are scattered and arranged within the bit sequence forming the data D, from the operating memory. In accordance with such an interleaving device, it is possible to individually randomize frames according to their constituent data, and it is possible to transmit the bits that make up such data in a format which is most suited for said data.
    • 写地址提供部分210将写入地址用于写入与要发送或存储的帧中包含的标题H相对应的位序列的位和与数据D对应的位序列的位写入到操作存储器220中。 读取地址提供部件230从操作存储器220交替地向操作存储器220提供用于读取对应于头部H的多个连续位的多个地址,以及从操作中读取与数据D对应的1位的地址 存储器220,并且读取比特序列,使得形成与头部H相对应的比特序列的比特被分散并布置在从操作存储器形成数据D的比特序列中。 根据这种交织装置,可以根据其构成数据单独地随机化帧,并且可以以最适合于所述数据的格式来发送构成这样的数据的比特。
    • 2. 发明授权
    • Method and apparatus for signal transmission in CDMA mobile
communication system
    • CDMA移动通信系统信号传输方法与装置
    • US6026279A
    • 2000-02-15
    • US873738
    • 1997-06-12
    • Takehiro NakamuraSeizo OnoeKouji Ohno
    • Takehiro NakamuraSeizo OnoeKouji Ohno
    • H04B7/26H04Q7/20
    • H04B7/2628
    • A method and an apparatus for signal transmission in a CDMA mobile communication system which are capable of preventing an unnecessary increase of an amount of interference power due to the signal transmission through a radio channel and thereby preventing an unnecessary decrease of a system capacity. The radio channel transmission signals are transmitted through the radio channel, where the radio channel transmission signals contain the transmission signals which are formed by control signals or user signals and necessary signals which are necessary in maintaining the radio channel, and this radio channel transmission is controlled so that only signal portions for the necessary signals are transmitted without transmitting any other signal portions when there is no transmission signal to be transmitted.
    • 一种在CDMA移动通信系统中进行信号传输的方法和装置,其能够防止由于通过无线电信道传输的干扰功率的不必要的增加,从而防止系统容量的不必要的降低。 通过无线电信道发送无线电信道传输信号,其中无线电信道传输信号包含由控制信号或用户信号形成的传输信号和维持无线电信道所必需的必要信号,并且该无线电信道传输被控制 使得当没有要发送的发送信号时,仅发送用于所需信号的信号部分而不发送任何其他信号部分。
    • 6. 发明授权
    • Method and instrument for measuring receiving SIR and transmission power
controller
    • 测量接收SIR和传输功率控制器的方法和仪器
    • US6034952A
    • 2000-03-07
    • US983412
    • 1997-12-12
    • Tomohiro DohiSyunsuke SeoYukihiko OkumuraMamoru SawahashiFumiyuki Adachi
    • Tomohiro DohiSyunsuke SeoYukihiko OkumuraMamoru SawahashiFumiyuki Adachi
    • H04B7/005H04J13/00
    • H04W52/241H04B17/336
    • An SIR measuring apparatus with a simple configuration capable of improving the accuracy of received SIR measurement in CDMA mobile radio equipment using pilot symbols. A received signal (20) is input to a synchronization detector (21) that regenerates the clock timing of symbols and frame timing equivalent to the repetition period of the pilot signal. An interpolating coherent detector (22) produces information symbols (23) obtained from the received signal (20) through absolute phase coherent detection. A decision signal power calculator (24) obtains desired wave power values. A quasi-interference power calculator (25) obtains differences between the power values of the information symbols and a fading envelope, and adopts the differences as the quasi-interference power. Integrators (26 and 27) integrate received desired wave power and quasi-interference wave power. An SIR measuring portion (28) divides an averaged received desired wave power integral by an averaged quasi-interference power integral to obtain the received SIR (29).
    • PCT No.PCT / JP97 / 01289第 371日期1997年12月12日 102(e)日期1997年12月12日PCT提交1997年4月14日PCT公布。 第WO97 / 39545号公报 日期1997年10月23日具有能够提高使用导频符号的CDMA移动无线电设备中的接收SIR测量精度的简单配置的SIR测量装置。 接收信号(20)被输入到同步检测器(21),该同步检测器重新产生与导频信号的重复周期相当的符号的时钟定时和帧定时。 内插相干检测器(22)通过绝对相位相干检测产生从接收信号(20)获得的信息符号(23)。 决定信号功率计算器(24)获得期望的波功率值。 准干扰功率计算器(25)获得信息符号的功率值和衰落包络之间的差异,并将该差作为准干扰功率。 积分器(26和27)集成了所需的波功率和准干扰波功率。 SIR测量部分(28)将平均的接收期望波功率积分除以平均准干扰功率积分以获得接收SIR(29)。
    • 8. 发明授权
    • Variable length coded data transmission device, transmitter side device,
receiver side device, and method thereof
    • 可变长度编码数据传输设备,发射机侧设备,接收机侧设备及其方法
    • US6115425A
    • 2000-09-05
    • US969318
    • 1997-11-13
    • Satoru AdachiTomoyuki Ohya
    • Satoru AdachiTomoyuki Ohya
    • H04J3/06H04B14/04
    • H04J3/0605
    • In order to transmit variable length coded data blocks while reducing data loses caused by code errors, the control circuit 7 makes a group of a plurality of variable length coded data, a fixing length circuit 9 fixes the code length of each of the variable length coded data thus grouped so that the data blocks each have an average code length and then makes a group of the data blocks in that condition, a header outputting circuit 8 prepares a header including information on the grouped data blocks and a synchronization word, and a control circuit 7 controls a switch SWC so that the prepared header and the group of data blocks are output through an output terminal 2. On the decoding side, the data blocks are synchronized/decoded by obtaining the code length of the group of data blocks and the number of the data blocks with reference to the location of the synchronization word in the header and information on the data blocks.
    • 为了在减少由错误引起的数据丢失的同时发送可变长度编码数据块,控制电路7形成多组可变长度编码数据的组,固定长度电路9将可变长度编码数据中的每一个的码长固定 如此分组的数据使得数据块各具有平均码长,然后在该条件下形成一组数据块,标题输出电路8准备包括关于分组数据块和同步字的信息的报头,以及控制 电路7控制开关SWC,使得准备好的报头和数据块组通过输出端子2输出。在解码侧,通过获得数据块组的代码长度来同步/解码数据块,并且 参考头部中的同步字的位置和关于数据块的信息的数据块的数量。