专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明申请

US20100127361A1 ENCAPSULANT INTERPOSER SYSTEM WITH INTEGRATED PASSIVE DEVICES AND MANUFACTURING METHOD THEREFOR 有权
标题翻译：具有集成无源器件的ENCAPSULANT INTERPOSER系统及其制造方法
公开(公告)号：US20100127361A1
公开(公告)日：2010-05-27
申请号：US12276297
申请日：2008-11-21
申请人： Heap Hoe Kuan , Rui Huang , Yaojian Lin , Seng Guan Chow
发明人： Heap Hoe Kuan , Rui Huang , Yaojian Lin , Seng Guan Chow
IPC分类号： H01L21/50 , H01L23/495
CPC分类号： H01L23/49861 , H01L21/565 , H01L23/3128 , H01L23/495 , H01L23/49506 , H01L23/49816 , H01L23/49833 , H01L24/16 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L2224/04042 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/16 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06572 , H01L2225/06579 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/1088 , H01L2924/00014 , H01L2924/01014 , H01L2924/01027 , H01L2924/01028 , H01L2924/01031 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19107 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A method of manufacturing a semiconductor package system including: forming a leadframe having a passive device; encapsulating the passive device to form an encapsulant interposer; attaching a first die to the encapsulant interposer; forming a substrate interposer having a second die; and stacking the encapsulant interposer over the substrate interposer.
摘要翻译：一种制造半导体封装系统的方法，包括：形成具有无源器件的引线框架; 封装无源器件以形成密封介质; 将第一管芯附接到所述密封剂插入件; 形成具有第二管芯的基板插入件; 并且将所述密封剂插入物堆叠在所述基板插入件上。

82. 发明授权

US07709929B2 Capacitor sheet and electronic circuit board 有权
标题翻译：电容板和电子电路板
公开(公告)号：US07709929B2
公开(公告)日：2010-05-04
申请号：US11501065
申请日：2006-08-09
申请人： Kouichi Kuramitsu , Kazuo Fujita , Noboru Izuhara
发明人： Kouichi Kuramitsu , Kazuo Fujita , Noboru Izuhara
IPC分类号： H01L29/00
CPC分类号： H05K1/0231 , H01L23/66 , H01L2224/16235 , H01L2224/16237 , H01L2924/01078 , H01L2924/01079 , H01L2924/19103 , H01L2924/19106 , H05K1/113 , H05K1/141 , H05K1/162 , H05K3/429 , H05K2201/09309 , H05K2201/096 , H05K2201/10666 , H05K2201/10674 , H05K2201/10734 , H05K2203/0455 , H05K2203/0733
摘要： A disclosed capacitor sheet attached to an electronic apparatus comprises: a laminated body; a first penetration electrode penetrating the laminated body, the first penetration electrode being electrically connected to a terminal electrode of the electronic apparatus; a second penetration electrode disposed at an arrangement position different from that of the first penetration electrode on the laminated body, the second penetration electrode being electrically insulated from the first penetration electrode and penetrating the laminated body; at least one first conductor thin film electrically connected to the first penetration electrode and insulated from the second penetration electrode; and at least one second conductor thin film disposed so as to face the first conductor thin film via a dielectric layer, the second conductor thin film being electrically connected to the second penetration electrode and insulated from the first penetration electrode.
摘要翻译：所公开的电容器片附接到电子设备包括：层叠体; 穿过层叠体的第一穿透电极，第一穿透电极电连接到电子设备的端子电极; 第二穿透电极，其设置在层叠体上与第一穿透电极不同的配置位置，第二穿透电极与第一穿透电极电绝缘并穿透层叠体; 电连接到第一穿透电极并与第二穿透电极绝缘的至少一个第一导体薄膜; 以及至少一个第二导体薄膜，其经由电介质层设置为面对所述第一导体薄膜，所述第二导体薄膜电连接到所述第二穿透电极并与所述第一穿透电极绝缘。

83. 发明申请

US20090278262A1 Multi-chip package including component supporting die overhang and system including same 审中-公开
标题翻译：多芯片封装，其中包括组件支撑裸片及其系统
公开(公告)号：US20090278262A1
公开(公告)日：2009-11-12
申请号：US12151911
申请日：2008-05-09
申请人： Boon Keat Tan , Sze Mai Ooi
发明人： Boon Keat Tan , Sze Mai Ooi
IPC分类号： H01L23/538
CPC分类号： H01L23/49816 , H01L24/16 , H01L24/31 , H01L24/48 , H01L24/73 , H01L25/16 , H01L2224/13111 , H01L2224/16225 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2225/06506 , H01L2225/06517 , H01L2225/06541 , H01L2225/06575 , H01L2924/00014 , H01L2924/01005 , H01L2924/01033 , H01L2924/14 , H01L2924/1433 , H01L2924/15787 , H01L2924/19041 , H01L2924/19103 , H01L2924/19105 , H01L2924/30107 , H01L2924/00 , H01L2924/3512 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A microelectronic package and a system including the package. The package includes: a substrate; a stack of dice electrically and mechanically bonded to the substrate, the stack including a second level die and a first level die between the substrate and the second level die, the second level die defining an overhang; and a component disposed between the substrate and the overhang of the second level die and adapted to support the overhang on the substrate.
摘要翻译：微电子封装和包括封装的系统。该包装包括：基材; 堆叠的电子和机械结合到所述衬底的所述堆叠，所述堆叠包括第二级管芯和所述衬底和所述第二级管芯之间的第一级管芯，所述第二级管芯限定突出端; 以及设置在所述基板和所述第二级管芯的突出部之间的部件，并且适于支撑所述基板上的突出端。

84. 发明申请

US20080308928A1 Image sensor module with a three-dimensional die-stacking structure 有权
标题翻译：具有三维晶片堆叠结构的图像传感器模块
公开(公告)号：US20080308928A1
公开(公告)日：2008-12-18
申请号：US12010617
申请日：2008-01-28
申请人： Shu-Ming Chang , Tzu-Ying Kuo , Chia-Wen Chiang , Hsiang-Hung Chang
发明人： Shu-Ming Chang , Tzu-Ying Kuo , Chia-Wen Chiang , Hsiang-Hung Chang
IPC分类号： H01L23/34
CPC分类号： H01L27/14618 , H01L24/19 , H01L24/24 , H01L24/97 , H01L25/0657 , H01L25/16 , H01L27/14634 , H01L2223/6677 , H01L2224/05001 , H01L2224/05008 , H01L2224/05026 , H01L2224/051 , H01L2224/0557 , H01L2224/05571 , H01L2224/12105 , H01L2224/24145 , H01L2224/32145 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06527 , H01L2225/06541 , H01L2225/06582 , H01L2924/00014 , H01L2924/12041 , H01L2924/15311 , H01L2924/19103 , H01L2924/19104 , H01L2224/83 , H01L2224/82 , H01L2924/00 , H01L2224/05599
摘要： This invention provides an image sensor module with a three-dimensional die-stacking structure. By filling a conductive material into through silicon vias within at least one image sensor die, and into via holes within an insulating layer, vertical electrical connections are formed between the image sensor die and an image processor buried in the insulating layer. A plurality of solder bumps is formed on a backside of the image sensor module so that the module can be directly assembled onto a circuit board. The image sensor module of this invention is characterized by a wafer-level packaging architecture and a three-dimensional die-stacking structure, which reduces electrical connection lengths within the module and thus reduces an area and height of the whole packaged module.
摘要翻译：本发明提供一种具有三维管芯堆叠结构的图像传感器模块。通过将导电材料填充到至少一个图像传感器芯片内的通孔硅中，并且在绝缘层内的通孔中，在图像传感器裸片和埋在绝缘层中的图像处理器之间形成垂直电连接。多个焊料凸块形成在图像传感器模块的背面，使得模块可以直接组装到电路板上。本发明的图像传感器模块的特征在于晶片级封装结构和三维管芯堆叠结构，其减小了模块内的电连接长度，从而减小了整个封装模块的面积和高度。

85. 发明申请

US20080169896A1 MICROMINIATURE POWER CONVERTER 有权
标题翻译：微电源电源转换器
公开(公告)号：US20080169896A1
公开(公告)日：2008-07-17
申请号：US11972609
申请日：2008-01-10
申请人： Masaharu EDO , Takayuki Hirose
发明人： Masaharu EDO , Takayuki Hirose
IPC分类号： H01F5/00
CPC分类号： H01F17/0033 , H01F27/29 , H01F27/40 , H01F2017/0086 , H01L23/49822 , H01L23/645 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H01L2924/19103 , H01L2924/19105 , H02M3/00 , H01L2924/00 , H01L2224/0401
摘要： A microminiature power converter includes a semiconductor substrate on which a semiconductor integrated circuit is formed, and a thin magnetic induction element. The magnetic induction element includes a magnetic insulating substrate having first and second principal planes and a plurality of through-holes. A coil is formed on a central region of the magnetic insulating substrate, and electrodes are formed on the first and second principal planes at peripheral regions of the magnetic insulating substrate, and electrically connected to the magnetic insulating substrate via respective through-holes. Wiring is formed on the first principal plane in the central region of the magnetic insulating substrate and connected to a capacitor. One end of the wiring is connected to one of the electrode electrodes, and an insulator layer is provided between the wiring and the coil.
摘要翻译：微型功率转换器包括形成半导体集成电路的半导体衬底和薄磁感应元件。磁感应元件包括具有第一和第二主平面的磁绝缘基板和多个通孔。在磁绝缘基板的中央部形成有线圈，在磁绝缘基板的周边区域的第一主平面和第二主面上形成电极，经由各个通孔与磁性绝缘基板电连接。在磁绝缘基板的中心区域的第一主面上形成配线，并与电容器连接。布线的一端连接到一个电极电极，并且在布线和线圈之间设置绝缘体层。

86. 发明申请

US20080142961A1 CERAMIC PACKAGE SUBSTRATE WITH RECESSED DEVICE 有权
标题翻译：陶瓷封装基板与被接收的设备
公开(公告)号：US20080142961A1
公开(公告)日：2008-06-19
申请号：US11611063
申请日：2006-12-14
申请人： Christopher C. Jones , David Bach , Timothe Litt , Larry Binder , Kaladhar Radhakrishnan , Cengiz A. Palanduz
发明人： Christopher C. Jones , David Bach , Timothe Litt , Larry Binder , Kaladhar Radhakrishnan , Cengiz A. Palanduz
IPC分类号： H01L23/34
CPC分类号： H05K1/0231 , H01L25/0655 , H01L25/165 , H01L2224/16225 , H01L2224/16227 , H01L2224/16265 , H01L2924/1515 , H01L2924/15153 , H01L2924/15311 , H01L2924/19041 , H01L2924/19103 , H01L2924/19105 , H01L2924/3011 , H05K1/145 , H05K1/183 , H05K2201/10515 , H05K2201/10712 , H05K2201/10734
摘要： A ceramic package substrate has a recess. This allows a device in that recess to be close to a die attached to the substrate's top side, for better performance. The device may be an array capacitor, an in-silicon voltage regulator, or another device or devices.
摘要翻译：陶瓷封装基板具有凹部。这使得该凹部中的器件靠近附接到衬底顶侧的管芯，以获得更好的性能。该器件可以是阵列电容器，硅内电压调节器或其它器件。

87. 发明申请

US20080054428A1 A STACKED-DIE ELECTRONICS PACKAGE WITH PLANAR AND THREE-DIMENSIONAL INDUCTOR ELEMENTS 有权
标题翻译：具有平面和三维电感元件的堆叠式电子封装
公开(公告)号：US20080054428A1
公开(公告)日：2008-03-06
申请号：US11457409
申请日：2006-07-13
申请人： Ken M. Lam
发明人： Ken M. Lam
IPC分类号： H01L23/02
CPC分类号： H01L23/645 , H01F17/0006 , H01L24/48 , H01L25/0657 , H01L2224/16145 , H01L2224/48091 , H01L2224/48145 , H01L2224/73204 , H01L2224/73257 , H01L2225/06506 , H01L2225/0651 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19103 , H01L2924/19104 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An apparatus and a method for producing three-dimensional integrated circuit packages. In one embodiment, an electronics package with at least two dice are stacked one atop another is disclosed. A top die is of smaller size compared with a bottom die such that after a die attach operation, wire-bond pads of the bottom die will be exposed for a subsequent wire bonding operation. The bottom die contains contact pads on the front side that couple with one or more passive components fabricated on the back side of the top die to complete the circuit. In another exemplary embodiment, a method to form one or more three-dimensional passive components in a stacked-die package is disclosed wherein partial inductor elements are fabricated on the front side of the bottom die and the back side of the top die. The top and bottom elements are coupled together completing the passive component.
摘要翻译：一种用于制造三维集成电路封装的装置和方法。在一个实施例中，公开了具有至少两个骰子的电子封装，一个在另一个之上堆叠。与底模相比，顶模的尺寸更小，使得在芯片附接操作之后，底模的引线接合焊盘将被暴露以用于随后的引线接合操作。底部模具包括在前侧上的接触焊盘，其与制造在顶部模具的背面上的一个或多个无源部件耦合以完成电路。在另一个示例性实施例中，公开了一种在堆叠管芯封装中形成一个或多个三维无源部件的方法，其中部分电感器元件制造在底模的前侧和顶模的背面。顶部和底部元件联接在一起，完成无源部件。

88. 发明授权

US07339277B2 Semiconductor device having passive component and support substrate with electrodes and through electrodes passing through support substrate 有权
标题翻译：具有无源元件和支撑衬底的半导体器件具有电极和穿过支撑衬底的电极
公开(公告)号：US07339277B2
公开(公告)日：2008-03-04
申请号：US11059469
申请日：2005-02-16
申请人： Takeshi Shioga , Kazuaki Karasawa , Kazuaki Kurihara
发明人： Takeshi Shioga , Kazuaki Karasawa , Kazuaki Kurihara
IPC分类号： H05K1/16
CPC分类号： H01L27/0805 , H01L21/76885 , H01L21/76898 , H01L23/3114 , H01L23/49822 , H01L23/50 , H01L23/5223 , H01L23/642 , H01L24/05 , H01L24/06 , H01L24/94 , H01L24/97 , H01L25/16 , H01L28/55 , H01L2224/05568 , H01L2224/05573 , H01L2224/06051 , H01L2224/14051 , H01L2224/14181 , H01L2224/16 , H01L2224/16235 , H01L2224/16265 , H01L2224/32265 , H01L2224/73204 , H01L2224/94 , H01L2224/97 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104 , H01L2924/3011 , H01L2224/83 , H01L2224/81 , H01L2924/00 , H01L2224/05599 , H01L2224/1403
摘要： A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
摘要翻译：电容器包括形成在基板10上的第一导电膜12，形成在第一导电膜上的第一电介质膜14，形成在第一电介质膜上的第二导电膜18，形成在第二导电膜上方的第二电介质膜22，覆盖第二导电膜的边缘，形成在第二电介质膜上方的第三导电膜34，覆盖覆盖第二导电膜边缘的第二电介质膜的一部分。电容器还包括覆盖第二导电膜的边缘或第二电介质膜的一部分的绝缘膜28。在第二导电膜的边缘附近的区域中，第二导电膜和第三导电膜之间的绝缘膜的有效厚度可以增加，由此在第二导电膜的边缘附近的区域中的电场浓度。因此，电容器可以具有大的电容而不降低电阻。

89. 发明申请

US20070287227A1 Stacked Chips with Underpinning 审中-公开
标题翻译：堆叠芯片与支撑
公开(公告)号：US20070287227A1
公开(公告)日：2007-12-13
申请号：US11423029
申请日：2006-06-08
申请人： Wyatt Allen Huddleston , Shawn M. O'Connor
发明人： Wyatt Allen Huddleston , Shawn M. O'Connor
IPC分类号： H01L21/00
CPC分类号： H01L24/97 , H01L24/16 , H01L24/33 , H01L24/48 , H01L24/73 , H01L24/83 , H01L25/50 , H01L2224/16 , H01L2224/2919 , H01L2224/32014 , H01L2224/32057 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2224/83136 , H01L2224/83385 , H01L2224/8385 , H01L2224/97 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/01033 , H01L2924/0665 , H01L2924/07802 , H01L2924/15311 , H01L2924/181 , H01L2924/19103 , H01L2224/83 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Methods for assembling multi-chip semiconductor packages, and the resulting assemblies themselves, are disclosed. According to the preferred embodiments of the invention, a first semiconductor chip is affixed to a package substrate and a second semiconductor chip is affixed to at least a portion of a surface of the first semiconductor chip, forming an overhang. Underpinning is interposed for supporting the overhang in resistance to deflection during assembly.
摘要翻译：公开了组装多芯片半导体封装的方法以及所得的组件本身。根据本发明的优选实施例，第一半导体芯片固定到封装基板上，第二半导体芯片固定到第一半导体芯片的表面的至少一部分上，形成突出端。插入支撑件以在组装期间支撑突出部抵抗挠曲。

90. 发明申请

US20070205748A1 Signal transmission device 失效
标题翻译：信号传输装置
公开(公告)号：US20070205748A1
公开(公告)日：2007-09-06
申请号：US11710929
申请日：2007-02-27
申请人： Shouji Abou
发明人： Shouji Abou
IPC分类号： G01R13/04
CPC分类号： H04B5/0043 , H01F17/0033 , H01F19/08 , H01F2027/2814 , H01L23/645 , H01L2224/0401 , H01L2224/04042 , H01L2224/16225 , H01L2224/32225 , H01L2224/48247 , H01L2924/19015 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025
摘要： The invention provides a signal transmission device that transmits a signal applied to a pair of input terminals to a pair of output terminals insulated electrically from the pair of input terminals while reducing the influence of an external noise magnetic field. The signal transmission device has a pair of coils, a pair of magnetic sensors and a signal output section. Each of the coils is connected between the pair of input terminals. Each of the coils generates a magnetic field respectively in response to the input signal applied between the pair of input terminals. A direction of the magnetic field generated by one of the coils is opposite to a direction of the magnetic field generated by the other of the coils. Each of the magnetic sensors corresponds to one of the coils exclusively. Each of the magnetic sensors detects the magnetic field generated by the corresponding coil, and outputs a detection signal in response to the detected magnetic field. The signal output section outputs an output signal to the pair of output terminals. The output signal corresponds to a difference between the pair of detection signals outputted by the pair of magnetic sensors. In the difference, the signal component caused by an external noise magnetic field is canceled. On the other hand, in the difference, the signal component caused by the input signal applied between the pair of input terminals are doubled with respect to the input signal. Thereby, the signal output section outputs the output signal with high S/N ratio.
摘要翻译：本发明提供了一种信号传输装置，其将施加到一对输入端子的信号传输到与该对输入端子电绝缘的一对输出端子，同时减少外部噪声磁场的影响。信号传输装置具有一对线圈，一对磁传感器和信号输出部。每个线圈连接在该对输入端子之间。每个线圈响应于施加在该对输入端子之间的输入信号而分别产生磁场。由一个线圈产生的磁场的方向与由另一个线圈产生的磁场的方向相反。每个磁性传感器仅对应于一个线圈。每个磁传感器检测由相应线圈产生的磁场，并响应于检测到的磁场输出检测信号。信号输出部分输出一对输出端子的输出信号。输出信号对应于由一对磁性传感器输出的一对检测信号之间的差值。不同之处在于，由外部噪声磁场引起的信号分量被取消。另一方面，不同之处在于，由施加在一对输入端子之间的输入信号引起的信号分量相对于输入信号加倍。由此，信号输出部输出高S / N比的输出信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式