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81. 发明授权

US06982557B1 Cable tester 有权
标题翻译：电缆测试仪
公开(公告)号：US06982557B1
公开(公告)日：2006-01-03
申请号：US10979302
申请日：2004-11-02
申请人： William Lo , Yiqing Guo , Tak Tsui , Tsin-Ho Leung , Runsheng He , Eric Janofsky
发明人： William Lo , Yiqing Guo , Tak Tsui , Tsin-Ho Leung , Runsheng He , Eric Janofsky
IPC分类号： G01R31/02
CPC分类号： G01R31/083 , G01R31/088 , G01R31/11
摘要： A physical layer device according to some implementations includes a cable tester that generates a test pulse on a cable and that determines a cable status including an open status, a short status, and a normal status. A cable impedance estimator communicates with the cable tester and estimates an impedance of the cable based on a reflection amplitude of the test pulse.
摘要翻译：根据一些实现的物理层设备包括电缆测试器，其在电缆上产生测试脉冲，并且确定包括打开状态，短状态和正常状态的电缆状态。电缆阻抗估计器与电缆测试器通信，并基于测试脉冲的反射幅度来估计电缆的阻抗。

82. 发明授权

US06979988B2 Duty cycle estimation 有权
标题翻译：占空比估计
公开(公告)号：US06979988B2
公开(公告)日：2005-12-27
申请号：US10827633
申请日：2004-04-19
申请人： Sehat Sutardja , Runsheng He , Jiancheng Zhang
发明人： Sehat Sutardja , Runsheng He , Jiancheng Zhang
IPC分类号： H02M3/155 , G05F1/40 , G05F1/56 , G05F1/575 , H02M1/088 , H02M3/137 , H02M3/158 , H02M3/335
CPC分类号： H02M3/157 , H02M1/088 , H02M1/38 , H02M3/158 , H02M3/1588 , H02M2001/0009 , H02M2001/0012 , H02M2001/0025 , H02M2001/0048 , H03K5/1565 , H03K17/122 , H03K17/167 , H03K17/6871 , Y02B70/1466 , Y02B70/1491
摘要： A duty cycle estimator for determining a nominal duty cycle of an output regulator. The duty cycle estimator having at least two modes and including at least a mode one estimator and a mode two estimator. The mode one estimator to determine the nominal duty cycle as a function of prior duty cycles. The mode two estimator to determine the nominal duty cycle as a function of accumulated error. A mode selector, based on a mode selection criteria, to select a one of the at least two modes to generate the nominal duty cycle.
摘要翻译：用于确定输出调节器的标称占空比的占空比估计器。占空比估计器具有至少两种模式并且至少包括模式一估计器和模式二估计器。模式一估计器，用于确定标称占空比作为先前占空比的函数。模式二估计器确定标称占空比作为累积误差的函数。模式选择器，基于模式选择标准，选择所述至少两种模式之一以产生标称占空比。

83. 发明授权

US06977492B2 Output regulator 有权
标题翻译：输出调节器
公开(公告)号：US06977492B2
公开(公告)日：2005-12-20
申请号：US10460825
申请日：2003-06-12
申请人： Sehat Sutardja , Runsheng He , Jiancheng Zhang
发明人： Sehat Sutardja , Runsheng He , Jiancheng Zhang
IPC分类号： H02M3/155 , G05F1/40 , G05F1/56 , G05F1/575 , H02M1/088 , H02M3/137 , H02M3/158 , H02M3/335
CPC分类号： H02M3/157 , H02M1/088 , H02M1/38 , H02M3/158 , H02M3/1588 , H02M2001/0009 , H02M2001/0012 , H02M2001/0025 , H02M2001/0048 , H03K5/1565 , H03K17/122 , H03K17/167 , H03K17/6871 , Y02B70/1466 , Y02B70/1491
摘要： A control system for controlling an output regulator having a regulated output. The control system including an output sensor to generate a digital sense signal to indicate within which of at least three reference ranges the regulated output is included. Each of the at least three reference ranges including a plurality of possible values of the regulated output. A digital controller, responsive to the digital sense signal, to generate a drive signal to control the regulated output.
摘要翻译：一种用于控制具有调节输出的输出调节器的控制系统。所述控制系统包括输出传感器，用于产生数字感测信号，以指示包括至少三个参考范围内的调节输出。所述至少三个参考范围中的每一个包括调节输出的多个可能值。响应于数字感测信号的数字控制器产生驱动信号以控制调节输出。

84. 发明申请

US20050156581A1 Power array system and method 有权
标题翻译：功率阵列系统及方法
公开(公告)号：US20050156581A1
公开(公告)日：2005-07-21
申请号：US11080829
申请日：2005-03-15
申请人： Sehat Sutardja , Runsheng He , Jiancheng Zhang
发明人： Sehat Sutardja , Runsheng He , Jiancheng Zhang
IPC分类号： H02M3/155 , G05F1/40 , G05F1/56 , G05F1/575 , H02M1/088 , H02M3/137 , H02M3/158 , H02M3/335
CPC分类号： H02M3/157 , H02M1/088 , H02M1/38 , H02M3/158 , H02M3/1588 , H02M2001/0009 , H02M2001/0012 , H02M2001/0025 , H02M2001/0048 , H03K5/1565 , H03K17/122 , H03K17/167 , H03K17/6871 , Y02B70/1466 , Y02B70/1491
摘要： A power array for converting an input voltage to a chopped output used in an output regulator that converts the chopped output to a regulated output. The power array including a switch array, responsive to independent drive signals, to convert the input voltage to the chopped output at a switching frequency. The switch array including at least two power switches. A switch controller to generate the independent drive signals as a function of a duty cycle signal. The switch controller to operate at a sampling frequency, the sampling frequency being greater than the switching frequency. The switch controller to control the independent drive signals at a drive frequency greater than the switching frequency.
摘要翻译：用于将输入电压转换为输出调节器中使用的斩波输出的功率阵列，其将斩波输出转换为调节输出。该功率阵列包括响应独立驱动信号的开关阵列，以将开关频率的输入电压转换成斩波输出。开关阵列至少包括两个电源开关。开关控制器，用于根据占空比信号产生独立的驱动信号。开关控制器以采样频率工作，采样频率大于开关频率。开关控制器以大于开关频率的驱动频率来控制独立的驱动信号。

85. 发明授权

US06597742B1 Implementing reduced-state viterbi detectors 失效
标题翻译：实现降态维特比探测器
公开(公告)号：US06597742B1
公开(公告)日：2003-07-22
申请号：US09603703
申请日：2000-06-27
申请人： Runsheng He , Joao R. Cruz
发明人： Runsheng He , Joao R. Cruz
IPC分类号： H04L512
CPC分类号： H03M13/6343 , H03M13/41 , H03M13/4107 , H03M13/6502 , H04L25/03229
摘要： A method of design and an implementation system for reduced-state Viterbi detectors for intersymbol interference channels are provided. The method uses a complement states grouping technique that comprises the steps of finding the state distances between complement states; forming the reduced-state trellis by grouping the complement states with state distance no less than the minimum free distance; and by keeping the complement states with state distance less than minimum free distance unchanged. The resultant reduced-state Viterbi detector has negligible performance loss compared to the full-state Viterbi detector while the complexity is reduced by a factor of about two.
摘要翻译：提供了一种用于符号间干扰信道的简化状态维特比检测器的设计方法和实现系统。该方法使用补码状态分组技术，其包括找到补码状态之间的状态距离的步骤; 通过将状态距离不小于最小自由距离分组补码状态来形成缩小状态网格; 并保持状态距离小于最小自由距离不变的补码状态。所得到的降维态维特比检测器与全状态维特比检测器相比具有可忽略的性能损失，而复杂度降低了约两倍。

86. 发明授权

US08829917B1 Cable tester 有权
标题翻译：电缆测试仪
公开(公告)号：US08829917B1
公开(公告)日：2014-09-09
申请号：US13470893
申请日：2012-05-14
申请人： William Lo , Yiqing Guo , Tak Tsui , Tsin-Ho Leung , Runsheng He , Eric Janofsky
发明人： William Lo , Yiqing Guo , Tak Tsui , Tsin-Ho Leung , Runsheng He , Eric Janofsky
IPC分类号： G01R31/11
CPC分类号： H04L43/50 , G01R31/11 , H04L12/10
摘要： A physical layer device configured to interface with a plurality of pairs of wires. The physical layer device includes a cable test module configured to transmit a pulse over the plurality of pairs of wires, measure a reflection of the pulse as received from the plurality of pairs of wires, and determine whether a short circuit exists in one of the plurality of pairs of wires based on the measure of the reflection of the pulse. An autonegotiation module is configured to perform autonegotiation to establish a link at a particular speed over the plurality of pairs of wires. The particular speed at which the link is established over the plurality of pairs of wires is based, at least in part, on whether a short circuit exists in one of the plurality of pairs of wires as determined by the cable test module.
摘要翻译：物理层设备，被配置为与多对线对接口。物理层设备包括：电缆测试模块，被配置为在所述多对导线上传输脉冲，测量从所述多对导线接收的所述脉冲的反射，并且确定所述多个导线之一中是否存在短路的基于脉冲反射测量的电线对。自动协商模块被配置为执行自动协商以在多对线路上以特定速度建立链路。至少部分地基于由电缆测试模块确定的多对线中的一条线路是否存在短路，在多对线路上建立链路的特定速度是基于的。

87. 发明授权

US08767813B1 Circuit and method for finding the sampling phase and canceling intersymbol interference in a decision feedback equalized receiver 有权
标题翻译：用于在判决反馈均衡接收机中找到采样相位和消除符号间干扰的电路和方法
公开(公告)号：US08767813B1
公开(公告)日：2014-07-01
申请号：US11656729
申请日：2007-01-23
申请人： Runsheng He
发明人： Runsheng He
IPC分类号： H03H7/30
CPC分类号： H04L25/03057 , H04L7/0062 , H04L7/0334 , H04L25/0307 , H04L25/4917 , H04L2025/0349
摘要： A circuit comprises an analog to digital converter (ADC) that samples a received signal based on a sampling clock. A feed forward filter communicates with the ADC and does not remove first precursor intersymbol interference from the received signal. An adaptive timing loop circuit that adjusts a timing phase of the sampling clock of said ADC to remove the first precursor intersymbol interference from the received signal. The adaptive timing loop circuit adjusts the timing phase based on at least one of an estimate signal and a loop gain control constant.
摘要翻译：电路包括基于采样时钟对接收信号进行采样的模数转换器（ADC）。前馈滤波器与ADC通信，不会从接收到的信号中消除第一个前兆码间干扰。一种自适应定时环路电路，其调整所述ADC的采样时钟的定时相位，以从接收的信号中去除第一前兆符号间干扰。自适应定时环路电路基于估计信号和环路增益控制常数中的至少一个来调整定时相位。

88. 发明授权

US08743939B2 Nonlinear echo compensator for class B transmitter line driver 失效
标题翻译： B类发射机线路驱动器的非线性回波补偿器
公开(公告)号：US08743939B2
公开(公告)日：2014-06-03
申请号：US12215222
申请日：2008-06-26
申请人： Xiaopeng Chen , Runsheng He , Shuran Wei
发明人： Xiaopeng Chen , Runsheng He , Shuran Wei
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H04B3/32 , H04B3/231
摘要： A nonlinear echo compensator comprises a mapping circuit that includes a weighting circuit that generates a weighted signal based on a current symbol and a prior symbol and a function generating circuit that selects one of N functions based on the weighted signal, where N is an integer greater than one. The mapping circuit generates a driving signal based on the selected one of the N functions and the weighted signal. A canceling circuit generates a nonlinear echo compensation signal based on the driving signal.
摘要翻译：非线性回波补偿器包括映射电路，该映射电路包括基于当前符号和先前符号产生加权信号的加权电路，以及基于加权信号选择N个函数之一的函数产生电路，其中N是更大的整数比一个。映射电路根据N个功能和加权信号中选择的一个产生驱动信号。消除电路基于驱动信号产生非线性回波补偿信号。

89. 发明授权

US08327195B1 Non-intrusive eye monitor system 有权
标题翻译：非侵入式眼睛监护仪系统
公开(公告)号：US08327195B1
公开(公告)日：2012-12-04
申请号：US13300354
申请日：2011-11-18
申请人： Haoli Qian , William Lo , Runsheng He , Jeffrey Choun , Ping Zheng , Hui Wang , Yi-Chun Chen , Chee Hoe Chu
发明人： Haoli Qian , William Lo , Runsheng He , Jeffrey Choun , Ping Zheng , Hui Wang , Yi-Chun Chen , Chee Hoe Chu
IPC分类号： G06F11/00 , H03H7/30
CPC分类号： H04L25/03019 , H04L1/203 , H04L25/03057
摘要： A system including a summer, a comparator, a zero-crossing module, and a control module. The summer is configured to (i) receive a data input signal, and (ii) generate an equalized signal in response to the data input signal. The comparator is configured to generate a recovered data signal in response to the equalized signal. The zero-crossing module is configured to generate a zero-crossing signal in response to the equalized signal. The control module is configured to generate eye information in response to i) the recovered data signal and ii) the zero-crossing signal. The eye information includes characteristic data associated with the recovered data signal, and the characteristic data when plotted provides an eye diagram.
摘要翻译：包括加法器，比较器，过零模块和控制模块的系统。夏天被配置为（i）接收数据输入信号，以及（ii）响应于数据输入信号产生均衡的信号。比较器被配置为响应于均衡的信号产生恢复的数据信号。过零模块被配置为响应于均衡信号产生过零信号。控制模块被配置为响应于i）恢复的数据信号和ii）过零信号来生成眼睛信息。眼睛信息包括与恢复的数据信号相关联的特征数据，并且绘制时的特征数据提供眼图。

90. 发明授权

US08270394B1 Method and apparatus for reducing an interference signal in a communication system 有权
标题翻译：用于减少通信系统中的干扰信号的方法和装置
公开(公告)号：US08270394B1
公开(公告)日：2012-09-18
申请号：US12345440
申请日：2008-12-29
申请人： Xiaopeng Chen , Runsheng He
发明人： Xiaopeng Chen , Runsheng He
IPC分类号： H04B1/06
CPC分类号： H04B3/32 , H04B3/23
摘要： Methods and apparatus describe techniques for reducing interference signals in a communication signal. An apparatus includes, in at least one aspect, a transceiver circuit to receive a communication signal that includes one or more interference signals and a compensation circuit to generate a compensation signal to compensate for the one or more interference signals in the communication signal based on one or more cancellation coefficients and one or more data symbols.
摘要翻译：方法和装置描述了用于减少通信信号中的干扰信号的技术。一种装置在至少一个方面包括收发器电路，用于接收包括一个或多个干扰信号的通信信号和补偿电路，以产生补偿信号，以补偿通信信号中的一个或多个干扰信号或更多的取消系数和一个或多个数据符号。

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