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    • 81. 发明申请
    • Electrowetting system comprising electrolyte solution with high reliability
    • 电润湿系统包括电解液,可靠性高
    • US20070091455A1
    • 2007-04-26
    • US11582398
    • 2006-10-18
    • Jae BaeJong KimHa JungJi Shim
    • Jae BaeJong KimHa JungJi Shim
    • G02B3/12
    • G02B3/14G02B26/004
    • Disclosed herein is an electrowetting system based on the electrowetting phenomenon. The electrowetting system comprises an electrolyte solution and optionally an insulating solution wherein the electrolyte solution includes a first salt having a molar mass of 100 or below and a solubility of 27 g or above in 100 g of water, a second salt (a chaotropic salt) containing an ion with a negative Jones-Dole coefficient (B), a third salt containing an ion with a Setschenow constant (ks) of 0.150 or above, and the salts are in the range of 10 to 30% by weight with respect to the total weight of the electrolyte solution. A mixture of the salts having different inherent characteristics is used as the electrolyte solution of the electrowetting system. Taking into consideration all factors, such as solubility, freezing point, changes in viscosity according to temperature variation and separation between the insulating solution and the electrolyte solution, the electrolyte solution satisfies reliability in terms of temperature variation.
    • 本文公开了基于电润湿现象的电润湿系统。 电润湿系统包括电解质溶液和任选的绝缘溶液,其中电解质溶液包括摩尔质量为100或更低的溶解度为27g或更高的第一盐在100g水中,第二盐(离液盐) 含有具有负的琼斯 - 多尔系数(B)的离子,含有Setschenow常数(k S)的离子的第三盐为0.150以上,并且所述盐的范围为10〜 相对于电解质溶液的总重量为30重量%。 使用具有不同固有特性的盐的混合物作为电润湿系统的电解液。 考虑到溶解度,凝固点,粘度随温度变化的变化以及绝缘溶液与电解液之间的分离等因素,电解质溶液在温度变化方面满足可靠性。
    • 85. 发明申请
    • Selective deposition of charged material for display device, apparatus for such deposition and display device
    • 用于显示装置的带电材料的选择性沉积,用于这种沉积和显示装置的装置
    • US20070063644A1
    • 2007-03-22
    • US11524734
    • 2006-09-20
    • Jong Kim
    • Jong Kim
    • H01J1/62
    • H01L51/0005H01L27/3244H01L27/3246H01L27/3276H01L51/0008
    • An apparatus for depositing a thin film capable of controlling separation of ionized organic material vapor by an electric field so that an organic material is deposited on a substrate and a method of depositing a thin film using the same are disclosed. The apparatus for depositing the thin film includes a vacuum chamber whose inside remains vacuous, a substrate holder for supporting a substrate on which a deposition material is to be deposited in the vacuum chamber, and a deposition source provided to face the substrate to accommodate, heat, and evaporate the deposition material. The deposition source includes an ionization device for ionizing the deposition material and electric field generating devices for separating the vapor of the ionized deposition material by an electric field. Therefore, it is possible to reduce the amount of use of the deposition material and to deposit the organic material on the substrate at high speed.
    • 公开了一种用于沉积能够通过电场控制离子化的有机材料蒸气的分离使得有机材料沉积在基板上的薄膜的设备和使用其沉积薄膜的方法。 用于沉积薄膜的装置包括其内部保持真空的真空室,用于支撑沉积材料将沉积在真空室中的基板的基板保持器,以及设置成面对基板以容纳热量的沉积源 并蒸发沉积材料。 沉积源包括用于电离沉积材料的电离装置和用于通过电场分离电离沉积材料的蒸气的电场产生装置。 因此,可以减少沉积材料的使用量并将有机材料高速沉积在基板上。
    • 86. 发明申请
    • Method of forming micro patterns in semiconductor devices
    • 在半导体器件中形成微图案的方法
    • US20070059914A1
    • 2007-03-15
    • US11518351
    • 2006-09-08
    • Woo JungJong Kim
    • Woo JungJong Kim
    • H01L21/44
    • H01L21/0337H01L21/0338H01L27/0207H01L27/11524Y10S257/906Y10S257/907Y10S257/908Y10S438/947
    • A method of forming a micro pattern in a semiconductor device is disclosed. An oxide film mask is divided into a cell oxide film mask and a peri oxide film mask. Therefore, a connection between the cell and the peri region can be facilitated. A portion of a top surface of a first oxide film pattern between a region in which a word line will be formed and a region in which a select source line will be formed is removed. Accordingly, the space can be increased and program disturbance in the region in which the word line will be formed can be prevented. Furthermore, a pattern having a line of 50 nm and a space of 100 nm or a pattern having a line of 100 nm and a space of 50 nm, which exceeds the limitation of the ArF exposure equipment, can be formed using a pattern, which has a line of 100 nm and a space of 200 nm and therefore has a good process margin and a good critical dimension regularity.
    • 公开了一种在半导体器件中形成微图案的方法。 将氧化物膜掩模分为电池氧化膜掩模和氧化膜掩模。 因此,可以促进电池和周边区域之间的连接。 去除在其中将形成字线的区域和将形成选择源极线的区域之间的第一氧化膜图案的顶表面的一部分被去除。 因此,可以增加空间,并且可以防止在其中将形成字线的区域中的程序干扰。 此外,可以使用图案形成具有50nm线和100nm的线的图案或超过ArF曝光设备的限制的具有100nm和50nm的线的图案,其中 具有100nm的线和200nm的空间,因此具有良好的工艺裕度和良好的临界尺寸规律性。
    • 90. 发明申请
    • Method of forming minute pattern of semiconductor device
    • 形成半导体器件的微小图案的方法
    • US20060292497A1
    • 2006-12-28
    • US11475319
    • 2006-06-27
    • Jong Kim
    • Jong Kim
    • G03F7/26
    • H01L21/3086H01L21/3088
    • An embodiment of the invention provides a method of forming minute patterns of a semiconductor device. In one embodiment, after a first oxide film, a lower anti-reflection film, and a first photoresist film patterns are sequentially formed on a semiconductor substrate, the lower anti-reflection film and the first oxide film are etched using the first photoresist film patterns as a mask. After a nitride film is deposited on the entire structure, the nitride film is etched to form spacers on sidewalls of the first oxide film. A second oxide film is deposited on the entire structure and is then polished. A second photoresist film pattern is then formed on the entire structure. The nitride film is removed using the second photoresist film pattern as a mask to form oxide film patterns having a line of 100 nm and a space of 50 nm and a variety of patterns. According to an embodiment of the invention, a line of 50 nm and a space of 100 nm, or a line of 100 nm and a space pattern of 50 nm can be formed exceeding the limit of an ArF exposure apparatus by employing patterns in which the degree of process freedom and CD regularity of the pattern having the line of 100 nm and the space of 200 nm are improved. It is also possible to secure the CD regularity of the pattern.
    • 本发明的实施例提供了形成半导体器件的微小图案的方法。 在一个实施例中,在半导体衬底上依次形成第一氧化物膜,下部抗反射膜和第一光致抗蚀剂膜图案之后,使用第一光致抗蚀剂膜图案蚀刻下部抗反射膜和第一氧化物膜 作为面具。 在整个结构上沉积氮化物膜之后,蚀刻氮化物膜以在第一氧化物膜的侧壁上形成间隔物。 将第二氧化膜沉积在整个结构上,然后抛光。 然后在整个结构上形成第二光致抗蚀剂图案。 使用第二光致抗蚀剂膜图案作为掩模去除氮化物膜,以形成具有100nm线和50nm的空间的各种图案的氧化物膜图案。 根据本发明的实施例,可以通过采用图案来形成超过ArF曝光装置的极限的50nm线和100nm的线,或100nm的线和50nm的空间图, 具有100nm的线和200nm的空间的图案的工艺自由度和CD规则性得到改善。 也可以确保模式的CD规则性。