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81. 发明申请

US20080111995A1 System and method for CD determination using an alignment sensor of a lithographic apparatus 有权
标题翻译：使用光刻设备的对准传感器进行CD确定的系统和方法
公开(公告)号：US20080111995A1
公开(公告)日：2008-05-15
申请号：US11599619
申请日：2006-11-15
申请人： Hyun-Woo Lee , Sami Musa
发明人： Hyun-Woo Lee , Sami Musa
IPC分类号： G01B11/02
CPC分类号： G03F7/70641 , G03F7/70625 , G03F9/7065 , G03F9/7076
摘要： A system and method for determining parameters such as critical dimension of a patterned structure and best focus condition of a lithographic apparatus, based on measurment of the intensity of a non-zero order of light diffracted from an experimental structure. The experimental structure includes a first array of lines and partially filled spaces having a period longer than the wavelength of the diffracted light. The experimental structure also includes a second array of lines and spaces, where the second array of lines and spaces comprise the partially filled spaces.
摘要翻译：基于从实验结构衍射的光的非零级的强度的测量，确定诸如图案化结构的临界尺寸和光刻设备的最佳聚焦条件的参数的系统和方法。实验结构包括具有比衍射光的波长长的周期的第一阵列阵列和部分填充空间。实验结构还包括线和空间的第二阵列，其中第二阵列的线和空间构成部分填充的空间。

82. 发明申请

US20080079470A1 Semiconductor memory apparatus 有权
标题翻译：半导体存储装置
公开(公告)号：US20080079470A1
公开(公告)日：2008-04-03
申请号：US11824428
申请日：2007-06-29
申请人： Won-Joo Yun , Hyun-Woo Lee
发明人： Won-Joo Yun , Hyun-Woo Lee
IPC分类号： H03L7/06
CPC分类号： H03L7/0814 , H03L7/0818 , H03L7/087 , H03L7/095
摘要： A semiconductor memory apparatus includes a delay line configured to delay a reference clock, a first delay block configured to delay a feedback clock, a first phase comparator configured to compare the reference clock with an output of the first delay block, a second delay block configured to delay the reference clock, a second phase comparator configured to compare the feedback clock with an output of the second delay block, a delay controller configured to control a delay amount of the delay line based on comparison results from the first and second phase comparators, a delay model configured to delay an output of the delay line by a modeled delay time to generate the feedback clock, and a locking detector configured to control the delay controller based on comparison results from the first and second phase comparators.
摘要翻译：一种半导体存储装置，包括：延迟线，被配置为延迟参考时钟;第一延迟块，被配置为延迟反馈时钟;第一相位比较器，被配置为将参考时钟与第一延迟块的输出进行比较;第二延迟块，延迟参考时钟;第二相位比较器，被配置为将反馈时钟与第二延迟块的输出进行比较;延迟控制器，被配置为基于来自第一和第二相位比较器的比较结果来控制延迟线的延迟量，延迟模型，被配置为延迟延迟线的输出通过建模的延迟时间以产生反馈时钟;以及锁定检测器，被配置为基于来自第一和第二相位比较器的比较结果来控制延迟控制器。

83. 发明申请

US20070103212A1 Digital delay locked loop capable of correcting duty cycle and its method 有权
标题翻译：数字延迟锁定环能够校正占空比及其方法
公开(公告)号：US20070103212A1
公开(公告)日：2007-05-10
申请号：US11646054
申请日：2006-12-27
申请人： Hyun-Woo Lee , Jong-Tae Kwak
发明人： Hyun-Woo Lee , Jong-Tae Kwak
IPC分类号： H03L7/06
CPC分类号： H03K5/1565
摘要： An apparatus for adjusting a clock signal, including: a clock multiplexing unit for receiving an external clock signal, an external clock bar signal and a feed-backed clock signal in order to select one of the external clock signal and the external clock bar signal as an output signal of the clock multiplexing unit based on a result of comparing a phase of the external clock signal with a phase of the feed-backed clock signal; and a delay locked loop (DLL) for generating a duty corrected clock signal and the feed-backed clock signal in response to the output signal of the clock multiplexing unit.
摘要翻译：一种用于调整时钟信号的装置，包括：时钟复用单元，用于接收外部时钟信号，外部时钟条信号和反馈时钟信号，以便选择外部时钟信号和外部时钟条信号之一作为基于将所述外部时钟信号的相位与所述反馈时钟信号的相位进行比较的结果，所述时钟复用单元的输出信号; 以及用于响应于时钟多路复用单元的输出信号产生占空比校正时钟信号和反馈时钟信号的延迟锁定环（DLL）。

84. 发明授权

US07212578B2 Transmit diversity apparatus and method using two or more antennas 有权
标题翻译：使用两个或多个天线的发射分集装置和方法
公开(公告)号：US07212578B2
公开(公告)日：2007-05-01
申请号：US09935553
申请日：2001-08-22
申请人： Hyun-Woo Lee , Ho Kyu Choi , Yong-Jun Kwak , Sung-Jin Kim
发明人： Hyun-Woo Lee , Ho Kyu Choi , Yong-Jun Kwak , Sung-Jin Kim
IPC分类号： H04B7/02
CPC分类号： H04B7/0669 , H04B7/0678
摘要： A transmit diversity system having at least four antennas. A first adder adds a first spread signal obtained by spreading a first symbol pattern with a first orthogonal code to a second spread signal obtained by spreading the first symbol pattern with a second orthogonal code, and transmits the added signal through a first antenna. A second adder adds the first spread signal to a third spread signal obtained by spreading an inverted symbol pattern of the first symbol pattern with the second orthogonal code, and transmits the added signal through a second antenna. A third adder adds a fourth spread signal obtained by spreading a second symbol pattern with the first orthogonal code to a fifth spread signal obtained by spreading the second symbol pattern with the second orthogonal code, and transmits the added signal through a third antenna. A fourth adder adds the fourth spread signal to a sixth spread signal obtained by spreading an inverted symbol of the second symbol pattern with the second orthogonal code, and transmits the added signal through a fourth antenna.
摘要翻译：一种具有至少四个天线的发射分集系统。第一加法器将通过用第一正交码扩展第一符号模式而获得的第一扩展信号加到通过用第二正交码扩展第一符号模式而获得的第二扩展信号，并通过第一天线发送相加信号。第二加法器将第一扩展信号与通过用第二正交码扩展第一符号图案的反相符号图案而获得的第三扩展信号相加，并通过第二天线发送相加的信号。第三加法器将通过用第一正交码扩展第二符号模式而获得的第四扩展信号加到通过用第二正交码扩展第二符号模式而获得的第五扩展信号，并通过第三天线发送相加的信号。第四加法器将第四扩展信号与通过用第二正交码扩展第二符号模式的反相符号获得的第六扩展信号相加，并通过第四天线发送相加信号。

85. 发明申请

US20060001463A1 Digital delay locked loop capable of correcting duty cycle and its method 有权
标题翻译：数字延迟锁定环能够校正占空比及其方法
公开(公告)号：US20060001463A1
公开(公告)日：2006-01-05
申请号：US11020491
申请日：2004-12-21
申请人： Hyun-Woo Lee , Jong-Tae Kwak
发明人： Hyun-Woo Lee , Jong-Tae Kwak
IPC分类号： H03B19/00
CPC分类号： H03K5/1565
摘要： An apparatus for adjusting a clock signal, including: a clock multiplexing unit for receiving an external clock signal, an external clock bar signal and a feed-backed clock signal in order to select one of the external clock signal and the external clock bar signal as an output signal of the clock multiplexing unit based on a result of comparing a phase of the external clock signal with a phase of the feed-backed clock signal; and a delay locked loop (DLL) for generating a duty corrected clock signal and the feed-backed clock signal in response to the output signal of the clock multiplexing unit.
摘要翻译：一种用于调整时钟信号的装置，包括：时钟复用单元，用于接收外部时钟信号，外部时钟条信号和反馈时钟信号，以便选择外部时钟信号和外部时钟条信号之一作为基于将所述外部时钟信号的相位与所述反馈时钟信号的相位进行比较的结果，所述时钟复用单元的输出信号; 以及用于响应于时钟多路复用单元的输出信号产生占空比校正时钟信号和反馈时钟信号的延迟锁定环（DLL）。

86. 发明申请

US20050152082A1 Electrostatic discharge protection circuit 有权
标题翻译：静电放电保护电路
公开(公告)号：US20050152082A1
公开(公告)日：2005-07-14
申请号：US11015813
申请日：2004-12-20
申请人： Hyun-Woo Lee
发明人： Hyun-Woo Lee
IPC分类号： H01L27/04 , H01L27/02 , H02H9/00
CPC分类号： H01L27/0255 , H01L27/0266
摘要： Disclosed is an ESD protection circuit for use in a semiconductor memory device with enhanced ESD efficiency. The ESD protection circuit includes: an input pad for receiving a data; a data input buffer for transmitting the data inputted from the input pad to an internal circuit; a first discharging means for a HBM/MM ESD connected to the input pad; and a second discharging means provided with at least one diode for a CDM ESD, disposed between the first discharging means and the data input buffer.
摘要翻译：公开了用于具有增强的ESD效率的半导体存储器件中的ESD保护电路。 ESD保护电路包括：用于接收数据的输入板; 数据输入缓冲器，用于将从输入焊盘输入的数据发送到内部电路; 用于连接到输入焊盘的HBM / MM ESD的第一放电装置; 以及设置在所述第一放电装置和所述数据输入缓冲器之间的用于CDM ESD的至少一个二极管的第二放电装置。

87. 发明申请

US20050030922A1 Method for selecting access point based on state information about access point 审中-公开
标题翻译：基于接入点状态信息选择接入点的方法
公开(公告)号：US20050030922A1
公开(公告)日：2005-02-10
申请号：US10830335
申请日：2004-04-21
申请人： Hyun-Woo Lee , Se-Han Kim , Won Ryu , Chong-Ho Yoon
发明人： Hyun-Woo Lee , Se-Han Kim , Won Ryu , Chong-Ho Yoon
IPC分类号： H04L12/28 , H04W48/20 , H04W84/12 , H04W88/08 , H04Q7/00
CPC分类号： H04W48/20 , H04W84/12 , H04W88/08
摘要： A method for selecting an access point by considering state information including the number of mobile stations connected in each access point and a traffic amount at each access point is disclosed. The method includes the steps of a) at access points, inserting a first state information of the access point about the number of connected mobile stations into a Beacon frame/Probe Response message frame; b) at the access points, the Beacon frame/Probe Response message frame of the first state information is transmitted to the mobile station; c) at the access points, inserting a second state information about a traffic amount into the Beacon frame/Probe Response message frame; d) at each the access points, the Beacon frame/Probe Response message frame of the second state information is transmitted to the mobile station; and e) at the mobile station, selecting one of access points based on the first and second state information.
摘要翻译：公开了一种通过考虑包括连接在每个接入点中的移动站的数量和每个接入点的业务量的状态信息来选择接入点的方法。该方法包括以下步骤：a）在接入点，将接入点的关于连接的移动台的数量的第一状态信息插入信标帧/探测响应消息帧; b）在接入点，向移动台发送第一状态信息的信标帧/探测响应消息帧; c）在接入点，将关于业务量的第二状态信息插入到信标帧/探测响应消息帧; d）在每个接入点，第二状态信息的信标帧/探测响应消息帧被发送到移动台; 以及e）在所述移动站处，基于所述第一状态信息和所述第二状态信息来选择一个接入点。

88. 发明授权

US09112934B2 Apparatus and method for configuring on-demand content delivering overlay network 有权
标题翻译：用于配置提供覆盖网络的按需内容的装置和方法
公开(公告)号：US09112934B2
公开(公告)日：2015-08-18
申请号：US13589507
申请日：2012-08-20
申请人： Tai-Won Um , Chang-Woo Yoon , Kang-Woon Hong , Nam-Kyung Lee , Hyun-Woo Lee , Won Ryu
发明人： Tai-Won Um , Chang-Woo Yoon , Kang-Woon Hong , Nam-Kyung Lee , Hyun-Woo Lee , Won Ryu
IPC分类号： H04N7/173 , H04L29/06 , H04N21/2385 , H04N21/24
CPC分类号： H04L65/4084 , H04L65/80 , H04N21/2385 , H04N21/2402
摘要： Provided are a method and apparatus for content delivery networking. There is provided a method of managing a content delivery network to transfer media content to a user, including: receiving a network configuration request and network configuration information, from a service provider that provides the content; receiving resource information including information about available resources required for configuring the network; and configuring a content delivery overlay network, based on the resource information and the network configuration information. Therefore, by configuring a content delivery overlay network for each provider, service and content providers having no unique content delivery method of their own can provide multimedia services based on applications for smart TV and web TV to a plurality of users.
摘要翻译：提供了一种用于内容传送网络的方法和装置。提供了一种管理内容传送网络以将媒体内容传送到用户的方法，包括：从提供内容的服务提供商接收网络配置请求和网络配置信息; 接收包括关于配置网络所需的可用资源的信息的资源信息; 以及基于所述资源信息和所述网络配置信息来配置内容传送覆盖网络。因此，通过为每个提供商配置内容传送覆盖网络，不具有自己的唯一内容传送方法的服务和内容提供商可以向多个用户提供基于智能电视和网络TV的应用的多媒体服务。

89. 发明授权

US08817791B2 Apparatus and method for virtualizing multiple terminals 有权
标题翻译：用于虚拟化多个终端的装置和方法
公开(公告)号：US08817791B2
公开(公告)日：2014-08-26
申请号：US13312351
申请日：2011-12-06
申请人： Kyoung-Hee Lee , Sung-Kuen Lee , Seng-Kyoun Jo , Il-Gu Jung , Hyun-Woo Lee , Won Ryu
发明人： Kyoung-Hee Lee , Sung-Kuen Lee , Seng-Kyoun Jo , Il-Gu Jung , Hyun-Woo Lee , Won Ryu
IPC分类号： G06F15/16
CPC分类号： H04L29/08846 , H04L61/106 , H04L61/605 , H04L61/6054
摘要： An apparatus and method for virtualizing multiple terminals are provided. The apparatus includes a terminal virtualizer configured to virtualize a group of a plurality of transmitter terminals of a first user and a group of receiver terminals of a second user through the change of source and destination addresses of a packet that is transmitted between the transmitter terminal group and the receiver terminal group so that the transmitter terminal group and the receiver terminal group may be recognized as if they were single terminals. Accordingly, it is possible to provide seamless IP connectivity regardless of which terminal is currently being used by a user.
摘要翻译：提供了一种用于虚拟化多个终端的装置和方法。该装置包括终端虚拟器，被配置为通过改变在发射机终端组之间发送的分组的源和目的地址来虚拟化第一用户的多个发射机终端的组和第二用户的一组接收者终端和接收机终端组，使得发射机终端组和接收机终端组可以被识别为如果它们是单个终端。因此，无论用户当前正在使用哪个终端，都可以提供无缝的IP连接。

90. 发明授权

US08228104B2 Duty cycle correcting circuit and method of correcting a duty cycle 有权
标题翻译：占空比校正电路和校正占空比的方法
公开(公告)号：US08228104B2
公开(公告)日：2012-07-24
申请号：US12345480
申请日：2008-12-29
申请人： Won-Joo Yun , Hyun-Woo Lee
发明人： Won-Joo Yun , Hyun-Woo Lee
IPC分类号： H03K3/017 , H03K5/04 , H03K7/08
CPC分类号： H03K5/1565
摘要： A duty cycle correcting circuit includes a duty ratio control unit configured to alternately change logical values of a plurality of bits of a pull-up control signal and a plurality of bits of a pull-down control signal in response to a duty ratio detection signal, a duty ratio correcting unit configured to adjust driving abilities of a first driver and a second driver in response to the plurality of bits of the pull-up control signal and the plurality of bits of the pull-down control signal to output a correction clock signal, and a duty ratio detecting unit configured to detect a duty ratio of the correction clock to generate the duty ratio detection signal.
摘要翻译：占空比校正电路包括占空比控制单元，其被配置为响应于占空比检测信号交替地改变上拉控制信号的多个比特和下拉控制信号的多个比特的逻辑值，占空比校正单元，被配置为响应于所述上拉控制信号的多个比特和所述下拉控制信号的多个比特来调整第一驱动器和第二驱动器的驱动能力，以输出校正时钟信号以及占空比检测单元，被配置为检测校正时钟的占空比以产生占空比检测信号。

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