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81. 发明申请

US20110128777A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110128777A1
公开(公告)日：2011-06-02
申请号：US12952609
申请日：2010-11-23
申请人： Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
发明人： Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
IPC分类号： G11C11/24 , H01L29/12 , G11C7/00
CPC分类号： G11C11/405 , G11C16/0425 , H01L21/8221 , H01L27/0688 , H01L27/105 , H01L27/11521 , H01L27/11551 , H01L27/1156 , H01L27/1203 , H01L27/1225
摘要： The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is formed on or in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
摘要翻译：半导体器件包括第一布线; 第二布线第三线; 第四布线具有第一栅电极，第一源电极和第一漏电极的第一晶体管; 以及具有第二栅电极，第二源电极和第二漏电极的第二晶体管。第一晶体管形成在包括半导体材料的衬底上或衬底中。第二晶体管包括氧化物半导体层。

82. 发明授权

US07952093B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07952093B2
公开(公告)日：2011-05-31
申请号：US11118417
申请日：2005-05-02
申请人： Shunpei Yamazaki , Jun Koyama
发明人： Shunpei Yamazaki , Jun Koyama
IPC分类号： H01L29/04
CPC分类号： H01L29/78696 , H01L27/124 , H01L27/127 , H01L27/3262 , H01L29/4908 , H01L29/78621 , H01L29/78624 , H01L29/78627 , H01L33/0041 , H01L2029/7863
摘要： The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween.
摘要翻译：本发明的目的是提供一种包括具有低布线电阻的大面积集成电路的TFT的可靠的半导体器件。本发明的特征之一是在一个TFT中设置包括与栅电极重叠的区域和不与栅电极重叠的区域的LDD区域。本发明的另一特征在于，栅电极包括第一导电层和第二导电层，并且栅极布线的一部分具有包含第一导电层和第二导电层的包层结构，其间具有低电阻层。

83. 发明申请

US20110121286A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110121286A1
公开(公告)日：2011-05-26
申请号：US12949641
申请日：2010-11-18
申请人： Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
发明人： Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
IPC分类号： H01L27/092
CPC分类号： H01L21/02554 , G11C11/403 , G11C11/405 , G11C16/0425 , H01L21/02565 , H01L21/02631 , H01L21/02664 , H01L27/0688 , H01L27/105 , H01L27/11519 , H01L27/11521 , H01L27/11524 , H01L27/11551 , H01L27/1156 , H01L27/1203 , H01L27/1225
摘要： It is an object to provide a semiconductor device with a novel structure. The semiconductor device includes memory cells connected to each other in series and a capacitor. One of the memory cells includes a first transistor connected to a bit line and a source line, a second transistor connected to a signal line and a word line, and a capacitor connected to the word line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, and one electrode of the capacitor are connected to one another.
摘要翻译：本发明的目的是提供一种具有新颖结构的半导体器件。半导体器件包括彼此串联连接的存储单元和电容器。一个存储单元包括连接到位线和源极线的第一晶体管，连接到信号线和字线的第二晶体管，以及连接到字线的电容器。第二晶体管包括氧化物半导体层。第一晶体管的栅电极，第二晶体管的源电极和漏电极之一以及电容器的一个电极彼此连接。

84. 发明申请

US20110116310A1 SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF 有权
标题翻译：半导体器件及其驱动方法
公开(公告)号：US20110116310A1
公开(公告)日：2011-05-19
申请号：US12945476
申请日：2010-11-12
申请人： Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
发明人： Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
IPC分类号： G11C11/4096
CPC分类号： G11C7/062 , G11C7/067 , G11C11/40 , G11C2207/005 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/0688 , H01L27/105 , H01L27/11519 , H01L27/11521 , H01L27/11524 , H01L27/11551 , H01L27/1156 , H01L27/1203 , H01L27/1225 , H01L29/155 , H01L29/205
摘要： A semiconductor device includes: a source line; a bit line; a word line; a memory cell connected to the bit line and the word line; a driver circuit which drives a plurality of second signal lines and a plurality of word lines so as to select the memory cell specified by an address signal; a potential generating circuit which generates a writing potential and a plurality of reading potentials to supply to a writing circuit and a reading circuit; and a control circuit which selects one of a plurality of voltages for correction on a basis of results of the reading circuit comparing a potential of the bit line with the plurality of reading potentials.
摘要翻译：半导体器件包括：源极线; 有点线字线连接到位线和字线的存储单元; 驱动电路，其驱动多个第二信号线和多个字线，以选择由地址信号指定的存储单元; 产生写入电位和多个读取电位以供应到写入电路和读取电路的电位产生电路; 以及控制电路，其基于将所述位线的电位与所述多个读取电位进行比较的所述读取电路的结果来选择用于校正的多个电压中的一个。

85. 发明申请

US20110114945A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110114945A1
公开(公告)日：2011-05-19
申请号：US12945516
申请日：2010-11-12
申请人： Shunpei Yamazaki , Jun Koyama
发明人： Shunpei Yamazaki , Jun Koyama
IPC分类号： H01L29/786 , H01L21/44
CPC分类号： H01L27/1207 , H01L21/8221 , H01L27/0688 , H01L27/1225 , H01L29/24
摘要： An object is to provide a semiconductor device with a novel structure. A semiconductor device includes a first transistor, which includes a channel formation region provided in a substrate including a semiconductor material, impurity regions, a first gate insulating layer, a first gate electrode, and a first source electrode and a first drain electrode, and a second transistor, which includes an oxide semiconductor layer over the substrate including the semiconductor material, a second source electrode and a second drain electrode, a second gate insulating layer, and a second gate electrode. The second source electrode and the second drain electrode include an oxide region formed by oxidizing a side surface thereof, and at least one of the first gate electrode, the first source electrode, and the first drain electrode is electrically connected to at least one of the second gate electrode, the second source electrode, and the second drain electrode.
摘要翻译：目的是提供具有新颖结构的半导体器件。半导体器件包括第一晶体管，其包括设置在包括半导体材料的衬底中的沟道形成区域，杂质区域，第一栅极绝缘层，第一栅极电极和第一源极电极以及第一漏极电极，第二晶体管，其包括在包括半导体材料的衬底上的氧化物半导体层，第二源电极和第二漏电极，第二栅极绝缘层和第二栅电极。第二源电极和第二漏极包括通过氧化其侧表面而形成的氧化物区域，并且第一栅电极，第一源电极和第一漏极电极中的至少一个电连接到第二栅电极，第二源电极和第二漏电极。

86. 发明申请

US20110090006A1 ANALOG CIRCUIT AND SEMICONDUCTOR DEVICE 有权
标题翻译：模拟电路和半导体器件
公开(公告)号：US20110090006A1
公开(公告)日：2011-04-21
申请号：US12907559
申请日：2010-10-19
申请人： Shunpei Yamazaki , Jun Koyama , Atsushi Hirose
发明人： Shunpei Yamazaki , Jun Koyama , Atsushi Hirose
IPC分类号： H01L27/085
CPC分类号： H01L27/1225 , H01L21/823412 , H01L27/124 , H01L27/1255 , H01L27/156 , H01L27/3213 , H01L29/24 , H01L29/36 , H01L29/7869 , H01L29/78693 , H01L33/025 , H01L2924/0002 , H04M1/0266 , H04R1/02 , H01L2924/00
摘要： An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.
摘要翻译：目的是获得使用其中使用氧化物半导体层的薄膜晶体管，在检测信号和宽动态范围中具有高灵敏度的半导体器件。使用具有作为沟道形成层的功能的氧化物半导体的薄膜晶体管形成模拟电路，其氢浓度为5×1019个原子/ cm3以下，并且在该状态下基本上起绝缘体的作用其中不产生电场。因此，可以获得在检测信号中具有高灵敏度和宽动态范围的半导体器件。

87. 发明申请

US20110084268A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110084268A1
公开(公告)日：2011-04-14
申请号：US12898366
申请日：2010-10-05
申请人： Shunpei Yamazaki , Jun Koyama , Masahiro Takahashi , Hideyuki Kishida , Akiharu Miyanaga , Yasuo Nakamura , Junpei Sugao , Hideki Uochi
发明人： Shunpei Yamazaki , Jun Koyama , Masahiro Takahashi , Hideyuki Kishida , Akiharu Miyanaga , Yasuo Nakamura , Junpei Sugao , Hideki Uochi
IPC分类号： H01L29/12 , H01L21/16
CPC分类号： H01L29/78669 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L27/1288 , H01L29/45 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/78678 , H01L29/7869
摘要： It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.
摘要翻译：本发明的目的是提供一种由具有良好的显示质量的显示装置代表的半导体器件，其中在半导体层和电极之间的连接部分中产生的寄生电阻被抑制，并且具有诸如电压降等的不利影响防止由于布线电阻而导致像素的信号布线，灰度级的缺陷等。为了实现上述目的，根据本发明的半导体器件可以具有这样的结构，其中具有低电阻的布线连接到薄膜晶体管，其中包括具有高氧亲和力的金属的源电极和漏电极是连接到具有抑制的杂质浓度的氧化物半导体层。另外，包含氧化物半导体的薄膜晶体管也可以被要被密封的绝缘膜包围。

88. 发明申请

US20110069047A1 DISPLAY DEVICE 有权
标题翻译：显示设备
公开(公告)号：US20110069047A1
公开(公告)日：2011-03-24
申请号：US12887179
申请日：2010-09-21
申请人： Jun Koyama , Shunpei Yamazaki
发明人： Jun Koyama , Shunpei Yamazaki
IPC分类号： G09G5/00
CPC分类号： H01L27/1225 , G02F1/1345 , G02F1/1368 , G09G3/20 , G09G2310/0275 , H01L27/124 , H01L27/3262 , H01L27/3276 , H01L29/7869
摘要： A display device includes a driver circuit including a logic circuit including a first transistor which is a depletion type transistor and a second transistor which is an enhancement type transistor; a signal line which is electrically connected to the driver circuit; a pixel portion including a pixel whose display state is controlled by input of a signal including image data from the driver circuit through the signal line; a reference voltage line to which reference voltage is applied; and a third transistor which is a depletion type transistor and controls electrical connection between the signal line and the reference voltage line. The first to the third transistors each include an oxide semiconductor layer including a channel formation region.
摘要翻译：显示装置包括驱动电路，该驱动电路包括逻辑电路，该逻辑电路包括作为耗尽型晶体管的第一晶体管和作为增强型晶体管的第二晶体管; 电连接到驱动电路的信号线; 包括像素的像素，所述像素的显示状态通过输入来自所述驱动电路的通过所述信号线的图像数据的信号进行控制; 施加参考电压的参考电压线; 以及第三晶体管，其是耗尽型晶体管，并控制信号线与参考电压线之间的电连接。第一至第三晶体管各自包括包括沟道形成区的氧化物半导体层。

89. 发明授权

US07909260B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07909260B2
公开(公告)日：2011-03-22
申请号：US12638090
申请日：2009-12-15
申请人： Jun Koyama , Shunpei Yamazaki
发明人： Jun Koyama , Shunpei Yamazaki
IPC分类号： G06K19/06 , G06K7/08
CPC分类号： G06K19/07345 , Y10S257/91
摘要： A semiconductor device used as an ID chip is provided, of which operation is terminated when its role is finished or expires. According to the invention, an antenna circuit, a voltage detecting circuit, a current amplifier circuit, a signal processing circuit, and a fuse are provided over an insulating substrate. When large power is applied to the antenna circuit, a voltage is detected by voltage detecting circuit and a corresponding current is amplified by the current amplifier circuit, thereby the fuse is melted down. Also, when an anti-fuse is used, the anti-fuse can short an insulating film by applying an excessive voltage. In this manner, the semiconductor device has a function for making it invalid by stopping operation of the signal processing circuit when the role of the device is finished or expires.
摘要翻译：提供了用作ID芯片的半导体器件，当其作用完成或到期时，其操作终止。根据本发明，在绝缘基板上设置天线电路，电压检测电路，电流放大电路，信号处理电路和保险丝。当对天线电路施加大功率时，由电压检测电路检测电压，并且由电流放大器电路对相应的电流进行放大，从而熔断熔断器。此外，当使用抗熔丝时，抗熔丝可能通过施加过大的电压而使绝缘膜短路。以这种方式，当装置的作用完成或到期时，半导体装置具有通过停止信号处理电路的操作使其无效的功能。

90. 发明申请

US20110062432A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110062432A1
公开(公告)日：2011-03-17
申请号：US12879635
申请日：2010-09-10
申请人： Shunpei Yamazaki , Masayuki Sakakura , Jun Koyama , Yoshiaki Oikawa , Hotaka Maruyama , Masami Jintyou , Kenichi Okazaki
发明人： Shunpei Yamazaki , Masayuki Sakakura , Jun Koyama , Yoshiaki Oikawa , Hotaka Maruyama , Masami Jintyou , Kenichi Okazaki
IPC分类号： H01L29/786 , H01L21/44
CPC分类号： H01L29/7869 , H01L27/1225
摘要： An object is to realize low power consumption while manufacturing a semiconductor device including a thin film transistor whose parasitic capacitance is reduced. Part of an insulating layer covering the periphery of a gate electrode layer is formed to be thick. Specifically, a stack including a spacer insulating layer and a gate insulating layer is formed. The thick part of the insulating layer covering the periphery of the gate electrode layer reduces parasitic capacitance formed between the gate electrode layer of the thin film transistor and another electrode layer (another wiring layer) overlapping with the gate electrode layer.
摘要翻译：目的是在制造包括其寄生电容减小的薄膜晶体管的半导体器件的同时实现低功耗。覆盖栅电极层周围的绝缘层的一部分形成为较厚。具体地，形成包括间隔绝缘层和栅极绝缘层的堆叠。覆盖栅电极层周围的绝缘层的厚部减小了在薄膜晶体管的栅电极层与与栅电极层重叠的另一电极层（另一布线层）之间形成的寄生电容。

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