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    • 81. 发明授权
    • Method and system for recording events of an interrupt using pre-interrupt handler and post-interrupt handler
    • 使用预中断处理程序和后中断处理程序来记录中断事件的方法和系统
    • US07197586B2
    • 2007-03-27
    • US10757192
    • 2004-01-14
    • Jimmie Earl DeWitt, Jr.Frank Eliot LevineChristopher Michael RichardsonRobert John Urquhart
    • Jimmie Earl DeWitt, Jr.Frank Eliot LevineChristopher Michael RichardsonRobert John Urquhart
    • G06F13/24
    • G06F13/24
    • A method, apparatus, and computer instructions for providing pre and post handlers to log trace records before entering or after exiting the interrupt handler. A trace record includes a ‘from’ address where the interrupt occurs or where the branch instruction is executed or a ‘to’ address for the branch to case and counts of selected performance monitoring events. A timestamp may be associated with each event. In one embodiment, the pre and post handler is used with trap on branch to log trace records prior to and immediate after taking a branch. In another embodiment, a pre handler is enabled to log trace records that occur prior to executing interrupt service routines. A post handler is enabled to log trace records that occur after the interrupt service routines is executed and prior to returning to normal execution. Resulting low-level performance trace data may be collected by the user at a later time for more structured performance analysis.
    • 一种方法,装置和计算机指令,用于在进入或退出中断处理程序之后提供前处理程序和后处理程序来记录跟踪记录。 跟踪记录包括发生中断的“从”地址或执行分支指令的位置,或者分支的“到”地址到所选择的性能监视事件的大小写和计数。 时间戳可能与每个事件相关联。 在一个实施例中,前处理程序和后处理程序与分支上的陷阱一起使用,以在分支之前和之后记录跟踪记录。 在另一个实施例中,预处理程序能够记录在执行中断服务程序之前发生的跟踪记录。 启用后台处理程序来记录在执行中断服务程序之后并在返回到正常执行之前发生的跟踪记录。 所得到的低级别性能跟踪数据可以由用户以后收集以进行更结构化的性能分析。
    • 84. 发明授权
    • Method and apparatus for benchmarking byte code sequences
    • 用于基准字节码序列的方法和装置
    • US6118940A
    • 2000-09-12
    • US978513
    • 1997-11-25
    • William Preston Alexander, IIIRobert Francis BerryRiaz HussainPaul Jerome KilpatrickRobert John Urquhart
    • William Preston Alexander, IIIRobert Francis BerryRiaz HussainPaul Jerome KilpatrickRobert John Urquhart
    • G06F11/34G06F9/45
    • G06F11/3428G06F11/3476
    • Method and apparatus for creating benchmark programs for the analysis of java virtual machine implementations are implemented. Java applications and applets are compiled into an intermediate code referred to as byte code. The Java byte code forms the machine code for the Java Virtual Machine. The Java Virtual Machine running on top of a hardware platform translates the byte code into native machine code for execution on the hardware platform on which the Java Virtual Machine is running. The performance of a Java Virtual Machine is improved by the use of a so-called "just in time" (JIT) compiler that translates commonly occurring sequences of bytes codes in the native instruction sequences which are then stored for later execution. Critical to the performance of the JIT is the ability of the JIT to optimally compile for the most commonly occurring sequences of byte codes. The method and apparatus for creating benchmark programs provides a means for performance measurements with respect to such sequences.
    • 实现用于创建用于分析java虚拟机实现的基准程序的方法和装置。 Java应用程序和小程序被编译成称为字节码的中间代码。 Java字节代码形成Java虚拟机的机器代码。 运行在硬件平台上的Java虚拟机将字节码转换为本地机器代码,以便在运行Java虚拟机的硬件平台上执行。 通过使用所谓的“即时”(JIT)编译器来改进Java虚拟机的性能,该编译器将本地指令序列中常见的字节码序列翻译成随后的存储以备以后执行。 对JIT的性能至关重要的是JIT对最常发生的字节码序列进行最佳编译的能力。 用于创建基准程序的方法和装置提供了相对于这种序列的性能测量的手段。
    • 87. 发明授权
    • Z buffer initialize and update method for pixel block
    • Z缓冲区初始化和像素块更新方法
    • US5870095A
    • 1999-02-09
    • US109572
    • 1993-08-19
    • Virgil Anthony AlbaughRobert John Urquhart
    • Virgil Anthony AlbaughRobert John Urquhart
    • G06F3/153G06T15/40G06F15/00
    • G06T15/405
    • A method is provided for initializing and updating a group of pixels contained on a display in blocks. A group of pixels is considered as a block and has a status word associated therewith. This status word maintains a running total of the maximum z value of any pixel contained within a group, or block of pixels. In this manner, once a block of pixels is rendered on to the display screen a comparison can be made between the current pixels being displayed and a group of pixels which are to be displayed. The minimum z value of the group of pixels to be displayed is compared with the maximum z value for the group of pixels currently being displayed. If the current maximum z value, as stored in the status word, is less than the minimum z value for the pixels to be displayed, then the group of pixels currently being displayed will all "win" when compared to the pixels in the group to be displayed. Thus, a full block bypass of the group of pixels to be displayed is implemented, thereby saving considerable time and overhead when compared to conventional z buffer systems that compare z values for each individual pixel.
    • 提供了一种用于初始化和更新包含在块中的显示器上的一组像素的方法。 一组像素被认为是块并且具有与其相关联的状态字。 该状态字维持包含在组或像素块内的任何像素的最大z值的运行总和。 以这种方式,一旦将像素块呈现在显示屏幕上,就可以在正在显示的当前像素和要显示的一组像素之间进行比较。 将要显示的像素组的最小z值与当前正在显示的像素组的最大z值进行比较。 如果存储在状态字中的当前最大z值小于要显示的像素的最小z值,则与当前组中的像素相比,当前正在显示的像素组将全部“赢” 被显示。 因此,与要比较每个像素的z值的常规z缓冲系统相比,实现了要显示的像素组的完全块旁路,从而节省了相当多的时间和开销。
    • 90. 发明授权
    • System and method for multi-phased performance profiling of
single-processor and multi-processor systems
    • 单处理器和多处理器系统的多阶段性能分析的系统和方法
    • US5896538A
    • 1999-04-20
    • US753570
    • 1996-11-26
    • Geoffrey Owen BlandyMaher Afif SabaRobert John Urquhart
    • Geoffrey Owen BlandyMaher Afif SabaRobert John Urquhart
    • G06F11/34G06F9/45
    • G06F11/3409G06F11/3466G06F2201/81G06F2201/865G06F2201/88
    • The present invention is directed to a system and method for monitoring system performance by using a multi-phase approach. The first phase, referred to as the burst counting phase, utilizes a set of counters to identify calls and returns which are heavily used. In the second phase, referred to as the instrumentation phase, the performance characteristics of the "hot spots" are monitored through the use of hardware counters. In a symmetrical multi-processor embodiment, the performance profiler is active on all processors at the same time. Frequently executed code paths are identified in a manner that is minimally-intrusive to the system as a whole, and uses relatively little storage. The user may specify a threshold count, after which hardware monitoring begins, and the user may specify the type of hardware performance data collected. After both phases of the performance monitor are run, the data can be presented to the user in a variety of ways.
    • 本发明涉及一种通过使用多相方法监视系统性能的系统和方法。 被称为突发计数阶段的第一阶段利用一组计数器来识别大量使用的呼叫和返回。 在第二阶段,称为仪器仪表阶段,通过使用硬件计数器监控“热点”的性能特征。 在对称的多处理器实施例中,性能分析器在所有处理器上同时处于活动状态。 经常执行的代码路径以对整个系统进行最小侵入的方式进行标识,并且使用相对较少的存储。 用户可以指定阈值计数,之后硬件监视开始,用户可以指定收集的硬件性能数据的类型。 在执行性能监视器的两个阶段之后,数据可以以各种方式呈现给用户。