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81. 外观设计

USD598401S1 Light emitting diode module 有权
公开(公告)号：USD598401S1
公开(公告)日：2009-08-18
申请号：US29323550
申请日：2008-08-27
申请人： Tadashi Takada , Hajime Ohno , Kiyoshi Nishimura , Hirokazu Otake
设计人： Tadashi Takada , Hajime Ohno , Kiyoshi Nishimura , Hirokazu Otake

82. 发明授权

US06626549B2 Pointer instrument 有权
标题翻译：指针仪器
公开(公告)号：US06626549B2
公开(公告)日：2003-09-30
申请号：US10069066
申请日：2002-02-21
申请人： Atsushi Fujita , Tsuyoshi Sakai , Kiyoshi Nishimura
发明人： Atsushi Fujita , Tsuyoshi Sakai , Kiyoshi Nishimura
IPC分类号： G01D1128
CPC分类号： G01D13/265 , G01D11/28
摘要： There is provided a pointer type instrument which can reduce a light leakage to a side of a display board, and has a pointer 6 which includes an indication member 61 brightened by illumination light introduced from a back side of a rotation center region R and made of a translucent resin material, and a cover member 62 covering its outer periphery except for the back side of the rotation center region R and made of a light shielding resin material, and is driven to be rotated through a driving unit 2; a display board 3 which is disposed behind the pointer 6, is apart from the cover member 62 with a predetermined gap part S intervening, and includes a light passing part 33 corresponding to the rotation center region R; and a light source 5 disposed behind the display board 3, for generating the illumination light, wherein a leakage light prevention part 634 for suppressing a light leakage from the gap part S is provided on the back side (back side of a pedestal part 632) of the rotation center region R except for an introduction part (a light receiving part 611, a reflection part 612) of the illumination light.
摘要翻译：提供了一种能够减少对显示板侧的漏光的指针式仪器，具有指示器6，该指示器6包括通过从旋转中心区域R的后侧引入的照明光而增亮的指示部件61，半透明树脂材料和覆盖其旋转中心区域R的后侧外侧的遮光性树脂材料构成的盖构件62，被驱动以通过驱动单元2旋转; 布置在指针6后面的显示板3与预定间隙部分S间隔开，并且包括对应于旋转中心区域R的光通过部分33; 以及设置在显示板3后面的用于产生照明光的光源5，其中，在背面（基座部632的背面）设置有用于抑制从间隙部S发出的光泄漏的防漏光部634，除了照明光的导入部（光接收部611，反射部612）之外的旋转中心区域R。

83. 发明授权

US06608416B2 Motor and method of manufacturing the same 有权
公开(公告)号：US06608416B2
公开(公告)日：2003-08-19
申请号：US10166630
申请日：2002-06-12
申请人： Kiyoshi Nishimura
发明人： Kiyoshi Nishimura
IPC分类号： H02K708
CPC分类号： G11B7/08582 , H02K15/16 , Y10T29/49009 , Y10T29/49012
摘要： A motor includes a cylindrical rotor having a magnet, a stator having a cylindrical inner peripheral surface opposing to an outer periphery of the rotor, an output shaft projecting from one axial end side of the stator, and a frame fixed to the one axial end side of the stator to pivotally support the output shaft at a distal end thereof. Holes having diameters identical to the inner diameter of the stator are formed in the frame for pivotally supporting the distal end of the output shaft and for fixing the stator. A positioning jig of a diameter slightly smaller than those of the holes are simultaneously inserted into a hole defining the inner peripheral surface of the stator and into the two holes in the frame, and the positioning jig are caused to abut against the inner peripheral surfaces of the holes to effect positioning.

84. 发明授权

US06246602B1 Ferroelectric storage device 失效
标题翻译：铁电存储设备
公开(公告)号：US06246602B1
公开(公告)日：2001-06-12
申请号：US08995025
申请日：1997-12-19
申请人： Kiyoshi Nishimura
发明人： Kiyoshi Nishimura
IPC分类号： G11C1122
CPC分类号： G11C11/22
摘要： An object of the present invention is to provide a ferroelectric storage device which has long life in use. A switch-signal generating portion 40 automatically generates switch signals in predetermined timing. A reversal-of-polarity controlling portion 36 changes, on the switch signal, the polarity states of ferroelectric storage cells composing an information storage portion 30. After that the reversal-of-polarity controlling portion 36 further performs a certain number of write operations or read-out operations on said ferroelectric storage cell so as to further move the polarity state in the direction of the changed polarity. A gate controlling portion 38 gives a control-of-input-gate signal and a control-of-output-gate signal to an input gate portion 32 and an output gate portion 34, thereby changing states of their operations. Therefore, the polarity state can be changed if required with the same data being stored in the ferroelectric storage cell. That prevent the ferroelectric storage cell from getting the bad electric property (imprint effect).
摘要翻译：本发明的目的是提供一种使用寿命长的铁电存储装置。开关信号产生部分40在预定的定时自动产生开关信号。极性反转控制部分36在开关信号上改变构成信息存储部分30的铁电存储单元的极性状态。之后，反转极性控制部分36进一步执行一定数量的写操作或对所述强电介质存储单元的读出动作进一步使极性状态向极性变化方向移动。门控制部分38给输入门控信号和控制输出门信号提供给输入门部分32和输出门部分34，从而改变其操作状态。因此，如果需要，则极性状态可以被改变，相同的数据被存储在铁电存储单元中。这样可以防止铁电存储单元得到不良的电性能（印记效果）。

85. 发明授权

US6069816A High-speed responding data storing device for maintaining stored data without power supply 有权
标题翻译：用于在没有电源的情况下维护存储数据的高速响应数据存储装置
公开(公告)号：US6069816A
公开(公告)日：2000-05-30
申请号：US198841
申请日：1998-11-24
申请人： Kiyoshi Nishimura
发明人： Kiyoshi Nishimura
IPC分类号： G11C11/41 , G11C11/22 , G11C14/00 , G11C11/00
CPC分类号： G11C14/0072 , G11C14/00 , Y10S257/903
摘要： It is an object of the present invention to provide a data storing device capable of responding in high speed without providing a power supply just for maintaining the stored data. A memory cell MC11 is made so as to replace only a memory transistor MT1 out of a pair of memory transistors MT1 and MT2 used for the prior art SRAM with a transistor with "MFMIS structure" having a ferroelectric layer 32. The ferroelectric layer 32 keep storing a polarization state in response to ON state stored in the memory transistor MT1 even when a power supply of the device is turned off. The memory transistor MT1 is turned into ON state in accordance with the polarization state stored in the ferroelectric layer 32 when the power supply is turned on again. In response to the change in state at the memory transistor MT1, the memory transistor MT2 is turned into OFF state. That is, the memory cell MC11 is defined as a ferroelectric memory. In addition, the reversal of the polarity in the ferroelectric layer 32 is carried out in high-speed.
摘要翻译：本发明的一个目的是提供一种数据存储装置，其能够高速响应，而不用提供用于维护所存储的数据的电源。存储单元MC11被制成仅用具有铁电层32的具有“MFMIS”结构的晶体管替换现有技术SRAM中使用的一对存储晶体管MT1和MT2中的存储晶体管MT1。铁电层32保持即使当设备的电源关闭时，也存储响应于存储在存储晶体管MT1中的ON状态的极化状态。当再次接通电源时，存储晶体管MT1根据存储在铁电体层32中的极化状态变为导通状态。响应于存储晶体管MT1处的状态变化，存储晶体管MT2变为截止状态。也就是说，存储单元MC11被定义为铁电存储器。此外，强电介质层32的极性反转也是高速进行的。

86. 发明授权

US06016266A Semiconductor device with a ferroelectric capacitor 失效
标题翻译：具有铁电电容器的半导体器件
公开(公告)号：US06016266A
公开(公告)日：2000-01-18
申请号：US986536
申请日：1997-12-08
申请人： Kiyoshi Nishimura
发明人： Kiyoshi Nishimura
IPC分类号： G11C14/00 , G11C11/22 , H01L21/8242 , H01L21/8246 , H01L21/8247 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/788 , H01L29/792
CPC分类号： G11C11/22
摘要： An object of the present invention is to provide a semiconductor device having a ferroelectric capacitor wherein the ferroelectric capacitor is difficult to get bad electric property. In a capacitor unit CbU for load, a bridge circuit is made including a ferroelectric capacitor Cb for load, transistors Q1, Q2, Q3 and Q4. The both ends of the bridge circuit is connected with a bit line /BL1 and the ground G, respectively. A line SWS is connected with the gates of both transistors Q1 and Q3 and further is connected with the gate of both transistors Q2 and Q4 via an inverter 104. A switch-signal generating circuit 102 shifts the level of switch signal for the line SWS whenever the number of leading edges of the line GCP reaches a predetermined number. According the shifted switch signal, the direction of the capacitor Cb for load in its bridge circuit is changed. That can prevent the capacitor Cb for load from getting a bad electric property.
摘要翻译：本发明的目的是提供一种具有铁电电容器的半导体器件，其中铁电电容器难以获得不良的电性能。在用于负载的电容器单元CbU中，形成有用于负载的铁电电容器Cb，晶体管Q1，Q2，Q3和Q4的桥式电路。桥接电路的两端分别与位线/ BL1和地G连接。线SWS与晶体管Q1和Q3的栅极连接，并且还经由反相器104与晶体管Q2和Q4的栅极连接。开关信号发生电路102每当移动线SWS的开关信号电平时线路GCP的前缘数量达到预定数量。根据移位的开关信号，桥式电路中负载电容器Cb的方向改变。这可以防止电容器Cb的负载变得不良的电性能。

87. 发明授权

US5901077A Semiconductor memory device comprising ferroelectric capacitors 失效
标题翻译：包括铁电电容器的半导体存储器件
公开(公告)号：US5901077A
公开(公告)日：1999-05-04
申请号：US918538
申请日：1997-08-22
申请人： Kiyoshi Nishimura
发明人： Kiyoshi Nishimura
IPC分类号： G11C14/00 , G11C11/22
CPC分类号： G11C11/22
摘要： A semiconductor memory device has a plurality of memory cells, each having a ferroelectric memory capacitor, arranged in a matrix formation in rows and columns. A read-out device is associated with each row for reading out data stored in a selected one of the memory cells in the row based on voltages generated by the ferroelectric capacitor belonging to that selected memory cell and a plurality of divided ferroelectric capacitors which are distributed in the direction of the rows such that piezoelectric effects on the ferroelectric capacitors will be diminished.
摘要翻译：半导体存储器件具有多个存储单元，每个存储单元具有布置成行和列的矩阵形式的铁电存储电容器。读出装置与每行相关联，用于基于属于该选择的存储单元的铁电电容器产生的电压和分布的多个分开的铁电电容器读出存储在该行中所选择的一个存储单元中的数据在行的方向上，使得对铁电电容器的压电效应将被降低。

88. 发明授权

US5896042A Programmable functional device having ferroelectric material 失效
标题翻译：具有铁电材料的可编程功能器件
公开(公告)号：US5896042A
公开(公告)日：1999-04-20
申请号：US700107
申请日：1996-08-20
申请人： Kiyoshi Nishimura , Takaaki Fuchikami
发明人： Kiyoshi Nishimura , Takaaki Fuchikami
IPC分类号： H03K19/173 , H03K19/177
CPC分类号： H03K19/17772 , H03K19/17736 , H03K19/1776 , H03K19/1778
摘要： A switch SW 11 comprises a ferroelectric memory 26 and an AND gate 28. A data input line L11 and an output terminal of the ferroelectric memory 26 are connected to an input terminal of the AND gate 28. Also, the output terminal of the AND gate 28 is connected to an AND input line L21. In order to write the switching data which switches the state of the switch SW11 either to an open state or a closed state into the ferroelectric capacitor 26, ferroelectric capacitors C11 and C12 are polarized in opposite directions with each other. The polarization is carried out in a short period, and the polarization state can be maintained even when the power is turned off. So that, the switching data can be written repeatedly by changing direction of the voltage applied to the ferroelectric capacitors C11 and C12.
摘要翻译：开关SW11包括铁电存储器26和“与”门28.与“门”28的输入端连接有数据输入线L11和强电介质存储器26的输出端。此外，“与”门的输出端 28连接到AND输入线L21。为了将开关SW11的状态切换到开放状态或闭合状态的切换数据写入强电介质电容器26，铁电电容器C11和C12在相反的方向上彼此极化。极化在短时间内进行，即使断电，也能够保持极化状态。因此，可以通过改变施加到铁电电容器C11和C12的电压的方向来重复写入开关数据。

89. 发明授权

US5721159A Method for manufacturing and testing a nonvolatile memory device 失效
标题翻译：用于制造和测试非易失性存储器件的方法
公开(公告)号：US5721159A
公开(公告)日：1998-02-24
申请号：US711341
申请日：1996-09-05
申请人： Kiyoshi Nishimura , Takaaki Fuchikami
发明人： Kiyoshi Nishimura , Takaaki Fuchikami
IPC分类号： G01R31/28 , G11C11/22 , G11C29/00 , G11C29/06 , G11C29/50 , H01L21/66 , H01L21/8246 , H01L21/8247 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792 , G01R31/26
CPC分类号： G11C29/50 , G11C11/22
摘要： On completion of a test for data storing characteristics under a condition of the wafer (step S4), the test data are rewritten to the data having inverted data pattern (step S6). Thereafter, package-sealing process is carried out (step S8). Then, the conditions of the test for data storing characteristics after packaging the memory are set (step S10). Set of the conditions is carried out by calculating the data pattern of a step for heating under data storing condition, heating duration and heating temperature, all of which will be carried out in the next process in accordance with the stress calculated in every data pattern as to the step S4 and the step S8 which have been completed. The "habit of data storing" of the ferroelectric memory device can be decreased throughout all the steps for heating under data storing condition by setting the conditions of step for heating under data storing condition which will be carried out in next process so as sum total of the stress for each data pattern to make close with one another as much as possible.
摘要翻译：在晶片的条件下完成对数据存储特性的测试（步骤S4），将测试数据重写为具有反转数据模式的数据（步骤S6）。此后，进行封装密封处理（步骤S8）。然后，设定包装存储器后的数据存储特性的测试条件（步骤S10）。通过计算数据存储条件，加热持续时间和加热温度下的加热步骤的数据模式来进行条件的设定，所有这些都将根据在每个数据模式中计算的应力在下一个处理中执行，如到已经完成的步骤S4和步骤S8。在数据存储条件下的所有加热步骤中，可以通过在下一个处理中进行的数据存储条件下的加热步骤的设定条件来降低铁电存储装置的“数据存储的习惯” 每个数据模式的压力尽可能地彼此靠近。

90. 发明授权

US5633821A Nonvolatile memory device 失效
标题翻译：非易失性存储器件
公开(公告)号：US5633821A
公开(公告)日：1997-05-27
申请号：US374221
申请日：1995-01-18
申请人： Kiyoshi Nishimura , Hideki Hayashi , Jun Muramoto , Takaaki Fuchikami , Hiromi Uenoyama
发明人： Kiyoshi Nishimura , Hideki Hayashi , Jun Muramoto , Takaaki Fuchikami , Hiromi Uenoyama
IPC分类号： G11C14/00 , G11C11/22 , G11C16/04 , G11C17/00 , H01L21/8247 , H01L27/10 , H01L29/788 , H01L29/792 , H01L29/78
CPC分类号： G11C11/22 , G11C11/223
摘要： A nonvolatile memory with a simple structure where recorded information can be read without destruction. A voltage is impressed between a control gate and a memory gate for writing. A ferroelectric layer is polarized in accordance with the direction of the impressed voltage. A control gate voltage to make channel is small when the ferroelectric layer is polarized with the control gate side being positive. Control gate voltage to make channel is large when the ferroelectric layer is polarized with the control gate side being negative. The reference voltage is impressed on the control gate for reading. A large drain current flows when the ferroelectric layer is polarized with a second polarization and a small drain current flows when the ferroelectric layer is polarized with a first polarization. Record information can be read by detecting the drain current. Polarization status of the ferroelectric is not destroyed in the reading operation.
摘要翻译：具有简单结构的非易失性存储器，可以无损地读取记录信息。在控制门和用于写入的存储器门之间施加电压。铁电层根据外加电压的方向极化。当铁电层在控制栅极侧为正极极化时，使沟道的控制栅极电压较小。当铁电层在控制栅极侧为负极极化时，控制栅极电压使沟道大。参考电压施加在控制门上用于读取。当铁电层以第二偏振极化时，大的漏极电流流动，而当铁电层以第一偏振极化时，小的漏极电流流过。通过检测漏极电流可以读取记录信息。在阅读操作中铁电的极化状态不会被破坏。

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