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81. 发明授权

US06898720B2 Scalable extensible network test architecture 有权
标题翻译：可扩展的可扩展网络测试架构
公开(公告)号：US06898720B2
公开(公告)日：2005-05-24
申请号：US10328469
申请日：2002-12-24
申请人： Jeong Eun Joo , Fred King , Patrick Riley , Aart Konynenberg , Paul Chang
发明人： Jeong Eun Joo , Fred King , Patrick Riley , Aart Konynenberg , Paul Chang
IPC分类号： G06F1/26
CPC分类号： G06F1/189 , G06F1/181 , H04L43/50
摘要： A network test architecture includes a plurality of modules for performing a plurality of functions, each of the plurality of modules having a unique identifier. An additional module for performing an additional function has an additional unique identifier. A control bus is connected among the plurality of modules; a data bus is connected among the plurality of modules; and a power bus is connected among the plurality of modules. A controller controls operation, data transmission, and powering of the plurality of modules and the additional module, respectively, through the control bus, the data bus, and the power bus, the controller using the unique identifier and the additional unique identifier of the plurality of modules upon simultaneous connection of the control bus, the data bus, and the power bus to the additional module.
摘要翻译：网络测试架构包括用于执行多个功能的多个模块，所述多个模块中的每个模块具有唯一的标识符。用于执行附加功能的附加模块具有附加的唯一标识符。控制总线连接在多个模块之间; 数据总线连接在多个模块之间; 并且多个模块之间连接有电力总线。控制器通过控制总线，数据总线和电源总线分别控制多个模块和附加模块的操作，数据传输和供电，控制器使用唯一标识符和多个的附加唯一标识符的模块，同时将控制总线，数据总线和电源总线连接到附加模块。

82. 发明授权

US06787087B1 Method of fabricating a PVC ornamental article having effects of imitated materials 失效
标题翻译：制造具有模仿材料效果的PVC装饰品的方法
公开(公告)号：US06787087B1
公开(公告)日：2004-09-07
申请号：US10388520
申请日：2003-03-17
申请人： Paul Chang
发明人： Paul Chang
IPC分类号： B29C3338
CPC分类号： B29C41/04 , B29C33/3878 , B29K2105/04 , C25D7/04
摘要： A method of fabricating a PVC ornamental article having effects of imitated materials includes steps of: (a) mold casting: making a prototype of a desired ornamental article, exploding said prototype into a plurality of blank elements, coating said blank elements with silicone to form hollow silicone molds, injecting a wax material into said hollow silicone molds to obtain a wax object, taking out said wax object for trimming and electroplating said wax object, and melting said wax object to obtain a mold; (b) blank formation: adding colorants into said PVC plastic material and mixing said colorants to obtain desired colors, injecting said PVC plastic material into said mold, utilizing centrifugal force to affix said PVC plastic material onto an inner wall of said mold, and removing molded PVC from said mold to form a blank by force before said molded PVC dries, filling a filler into said blank to increase hardness; and (c) assembly: assembling blanks together and joining the blanks with other decorations to obtain a PVC ornamental article having effects of animated materials such as stone, wood, glass, ceramic, paper, fabric and/or iron, etc.
摘要翻译：一种制造具有模仿材料效果的PVC装饰制品的方法包括以下步骤：（a）模铸：将期望的装饰物品的原型制成，将所述原型件爆炸成多个坯件，用硅胶涂覆所述坯件元件以形成中空硅胶模具，将蜡材料注入所述中空硅胶模具中以获得蜡物体，取出所述蜡物体以修整和电镀所述蜡物体，并熔化所述蜡物体以获得模具; （b）空白形成：向所述PVC塑料材料中加入着色剂并混合所述着色剂以获得所需的颜色，将所述PVC塑料材料注入所述模具中，利用离心力将所述PVC塑料材料固定在所述模具的内壁上，在所述模制的PVC干燥之前，从所述模具中模制的PVC形成坯料，将填料填充到所述坯料中以增加硬度; 和（c）组装：将坯料组装在一起并将坯料与其他装饰物接合，以获得具有诸如石材，木材，玻璃，陶瓷，纸，织物和/或铁等的动画材料的效果的PVC装饰品。

83. 发明授权

US06743703B2 Power diode having improved on resistance and breakdown voltage 有权
标题翻译：功率二极管具有改善的导通电阻和击穿电压
公开(公告)号：US06743703B2
公开(公告)日：2004-06-01
申请号：US10238104
申请日：2002-09-09
申请人： Vladimir Rodov , Paul Chang , Jianren Bao , Wayne Y. W. Hsueh , Arthur Ching-Lang Chiang , Geeng-Chuan Chern
发明人： Vladimir Rodov , Paul Chang , Jianren Bao , Wayne Y. W. Hsueh , Arthur Ching-Lang Chiang , Geeng-Chuan Chern
IPC分类号： H01L2974
CPC分类号： H01L29/7802 , H01L21/2815 , H01L27/0727 , H01L27/0814 , H01L27/095 , H01L29/0619 , H01L29/0634 , H01L29/1095 , H01L29/66712 , H01L29/781 , H01L29/861 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A two-terminal power diode has improved reverse bias breakdown voltage and on resistance includes a semiconductor body having two opposing surfaces and a superjunction structure therebetween, the superjunction structure including a plurality of alternating P and N doped regions aligned generally perpendicular to the two surfaces. The P and N doped regions can be parallel stripes or a mesh with each region being surrounded by doped material of opposite conductivity type. A diode junction associated with one surface can be an anode region with a gate controlled channel region connecting the anode region to the superjunction structure. Alternatively, the diode junction can comprise a metal forming a Schottky junction with the one surface. The superjunction structure is within the cathode and spaced from the anode. The spacing can be varied during device fabrication.
摘要翻译：双端功率二极管具有改进的反向偏压击穿电压，并且导通电阻包括具有两个相对表面的半导体本体和它们之间的超结结构，所述超结结构包括多个交替的P和N掺杂区域，其大致垂直于两个表面排列。 P和N掺杂区域可以是平行条纹或网状物，每个区域被相反导电类型的掺杂材料包围。与一个表面相关联的二极管结可以是具有将阳极区域连接到超结构结构的栅极控制沟道区域的阳极区域。或者，二极管结可以包括与该表面形成肖特基结的金属。超结构在阴极内并与阳极间隔开。间隔可以在器件制造过程中变化。

84. 发明授权

US06537860B2 Method of fabricating power VLSI diode devices 有权
公开(公告)号：US06537860B2
公开(公告)日：2003-03-25
申请号：US09739732
申请日：2000-12-18
申请人： Hidenori Akiyama , Paul Chang , Geeng-Chuan Chern , Wayne Y. W. Hsueh , Haru Ohkawa , Yasuo Ohtsuki , Vladimir Rodov
发明人： Hidenori Akiyama , Paul Chang , Geeng-Chuan Chern , Wayne Y. W. Hsueh , Haru Ohkawa , Yasuo Ohtsuki , Vladimir Rodov
IPC分类号： H01L21332
CPC分类号： H01L29/6609 , H01L29/0619 , H01L29/7391 , H01L29/861
摘要： A method for manufacturing a discrete power rectifier device having a VLSI multi-cell design employs a two spacer approach to defining a P/N junction profile having good breakdown voltage characteristics. The method provides highly repeatable device characteristics at reduced cost. The active channel regions of the device are also defined using the same two spacers. The method is a self-aligned process and channel dimensions and doping characteristics may be precisely controlled despite inevitable process variations in spacer formation. Only two masking steps are required, and additional spacers for defining the body region profile can be avoided, reducing processing costs.

85. 发明授权

US06498367B1 Discrete integrated circuit rectifier device 有权
标题翻译：分立集成电路整流器件
公开(公告)号：US06498367B1
公开(公告)日：2002-12-24
申请号：US09520546
申请日：2000-03-08
申请人： Paul Chang , Geeng-Chuan (aka Michael) Chern , Wayne Y. W. Hsueh , Vladimir Rodov
发明人： Paul Chang , Geeng-Chuan (aka Michael) Chern , Wayne Y. W. Hsueh , Vladimir Rodov
IPC分类号： H01L2976
CPC分类号： H01L29/7806 , H01L21/2815 , H01L27/0814 , H01L27/095 , H01L29/0634 , H01L29/1095 , H01L29/66712 , H01L29/7802 , H01L29/781 , H01L29/7811 , H01L29/861 , H01L29/872
摘要： A power rectifier having low on resistance, fast recovery time and low forward voltage drop. In a preferred embodiment, the present invention provides a power rectifier device employing a vertical device structure, i.e., with current flow between the major surfaces of the discrete device. The device employs a large number of parallel connected cells, each comprising a MOSFET structure with a gate to drain short via a common conductive layer. This provides a low Vf path through the channel regions of the MOSFET cells to the contact metallization on the other side of the integrated circuit. A thin gate structure is formed annularly around pedestal regions on the upper surface of the device and a precisely controlled body implant defines the channel region and allows controllable device characteristics, including gate threshold voltage and Vf.
摘要翻译：具有导通电阻低，恢复时间快，正向压降低的电力整流器。在优选实施例中，本发明提供一种采用垂直装置结构的电力整流装置，即在分立装置主要表面之间的电流流动。该器件采用大量并联连接的单元，每个单元包括具有栅极的MOSFET结构，以通过公共导电层短路地漏极。这提供了通过MOSFET单元的沟道区域到集成电路另一侧上的接触金属化的低Vf路径。薄栅结构环形地围绕器件的上表面上的基座区域形成，并且精确控制的体植入物限定沟道区域并且允许可控制的器件特性，包括栅极阈值电压和Vf。

86. 发明授权

US5903918A Program counter age bits 失效
标题翻译：程序计数器时钟位
公开(公告)号：US5903918A
公开(公告)日：1999-05-11
申请号：US518562
申请日：1995-08-23
申请人： James A. Bauman , Paul Chang , Govind Kizhepat
发明人： James A. Bauman , Paul Chang , Govind Kizhepat
IPC分类号： G06F9/38 , G06F9/32
CPC分类号： G06F9/3855 , G06F9/3836 , G06F9/3857 , G06F9/3861 , G06F9/3885
摘要： An apparatus and method of efficiently and dynamically generating the addresses associated with a set of instructions in a microprocessor pipeline is disclosed. Program counter age bits associated with the offsets of an address of a predetermined instruction within a set of instructions are used to indicate the chronological age of each instruction within the set of instructions. The age bits are generated by a logic circuit which also dispatches instructions to various execution units. The age bits are used to maintain and track the addresses of an instruction stream within a processing system so that there is no need to store the addresses of each and every instruction.
摘要翻译：公开了一种在微处理器流水线中有效和动态地产生与一组指令相关联的地址的装置和方法。与一组指令中的预定指令的地址的偏移相关联的程序计数器时间位用于指示该组指令内的每条指令的按时间顺序的年龄。年龄比特由逻辑电路产生，逻辑电路也将指令分派到各种执行单元。年龄位用于维护和跟踪处理系统内的指令流的地址，使得不需要存储每个指令的地址。

87. 发明授权

US5481230A Phase modulator having individually placed edges 失效
标题翻译：相位调制器具有单独放置的边缘
公开(公告)号：US5481230A
公开(公告)日：1996-01-02
申请号：US339420
申请日：1994-11-14
申请人： Paul Chang , Dan H. Wolaver , J. Howell Mitchell, Jr.
发明人： Paul Chang , Dan H. Wolaver , J. Howell Mitchell, Jr.
IPC分类号： G06F1/025 , H03C3/00 , H03K7/04
CPC分类号： H03C3/00 , G06F1/025 , H03K7/04
摘要： A phase modulator circuit and method for generating an output signal having individually positionable edges is described. The phase modulator includes a programmable pulse generator, such as an interval counter, or a delay for producing the output signal, and a control value source, such as a memory, for delivering a sequence of control values to the generator. The control values determine the time between successive output pulses.
摘要翻译：描述了一种用于产生具有可单独定位的边缘的输出信号的相位调制器电路和方法。相位调制器包括诸如间隔计数器的可编程脉冲发生器或用于产生输出信号的延迟，以及用于将一系列控制值传递给发生器的控制值源（例如存储器）。控制值确定连续输出脉冲之间的时间。

88. 发明授权

US4577391A Method of manufacturing CMOS devices 失效
标题翻译：制造CMOS器件的方法
公开(公告)号：US4577391A
公开(公告)日：1986-03-25
申请号：US635371
申请日：1984-07-27
申请人： Steve Hsia , Paul Chang
发明人： Steve Hsia , Paul Chang
IPC分类号： H01L27/092 , H01L21/265 , H01L21/8238 , H01L29/78 , H01L21/32
CPC分类号： H01L21/823864
摘要： A CMOS semiconductor structure having insulation sidewall spacers whose width is selected independently for NMOS and PMOS devices. The width of the spacer is selected to reduce hot electron injection in the N channel device and to insure that the gate and source regions are aligned with or underlap the gate in the P channel device. A narrower spacer is used for the P channel device than for the N channel device which permits the formation of a P channel device having a threshold voltage less than 1 volt.
摘要翻译：具有绝缘侧壁间隔物的CMOS半导体结构，其宽度针对NMOS和PMOS器件独立选择。选择间隔物的宽度以减少N沟道器件中的热电子注入，并确保栅极和源极区域与P沟道器件中的栅极对准或下划线。对于P沟道器件使用较窄的间隔物，而不是N沟道器件，其允许形成阈值电压小于1伏特的P沟道器件。

89. 发明授权

US11595232B1 Switch fabric for a data center network having virtual machines 有权
公开(公告)号：US11595232B1
公开(公告)日：2023-02-28
申请号：US17373774
申请日：2021-07-13
申请人： Paul Chang
发明人： Paul Chang
IPC分类号： H04L12/46
摘要： A fabric for container virtual machines (CM) has cross fabric spine switches coupled to spine switches, each spine switch coupled to has a leaf switches, each leaf switch coupled to servers hosting CVM processes. Each of the leaf switches has an uplink port coupled to a spine switch leaf port configured in a mesh. The spine switches have a plurality of uplink ports for coupling to a plurality of cross fabric spine (CFS) ports into a mesh. The cross fabric spine switches keep a CF-NHCIB table of entries containing capabilities, and also a CF-FIB slice table which maintains entries for assignment of CVMs to new spine switches, such as GTID range, MAC Range, IP range associated with a spine port and spine address (MAC and/or IP) for transferring packets through the fabric.

90. 发明授权

US09257858B2 Apparatus and method for controlling a charging circuit in a power over ethernet device 有权
标题翻译：用于控制以太网供电装置中的充电电路的装置和方法
公开(公告)号：US09257858B2
公开(公告)日：2016-02-09
申请号：US13371668
申请日：2012-02-13
申请人： Chio Fai Aglaia Kong , Guangmin He , Paul Chang
发明人： Chio Fai Aglaia Kong , Guangmin He , Paul Chang
IPC分类号： H02J7/06 , H02J7/24 , H02J7/00 , H02J1/08 , H04L12/413
CPC分类号： H02J7/0047 , H02J1/08 , H02J7/0021 , H04L12/413
摘要： A charging circuit and method for charging a power storage device in a power over Ethernet environment are necessary to prevent unnecessary power consumption. Power sourcing equipment continuously supplies power to a connected device after determining that the device is compatible. In order to prevent supply of power after a power storage device attains full charge, a charging circuit may include an interface for supplying electric power; a sensing circuit including a switch in series with a resistor; and a voltage detection circuit. The voltage detection circuit may communicate with the sensing circuit and may output a first signal that turns the switch OFF when the voltage of the power storage device is greater than or equal to a first voltage and may output a second signal that turns the switch ON when the voltage of the power storage device is less than or equal to a second voltage.
摘要翻译：为了防止不必要的电力消耗，需要在以太网供电环境中对蓄电装置进行充电的充电电路和方法。电源设备在确定设备兼容后，会连续向连接的设备供电。为了防止蓄电装置充满电后的电力供给，充电电路可以包括用于供电的接口，感测电路，包括与电阻器串联的开关; 和电压检测电路。电压检测电路可以与感测电路通信，并且可以输出当蓄电装置的电压大于或等于第一电压时使开关断开的第一信号，并且可以输出第二信号，其在第蓄电装置的电压小于或等于第二电压。

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