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81. 发明授权

US07888922B2 Power factor correction controller with switch node feedback 有权
标题翻译：功率因数校正控制器，具有开关节点反馈
公开(公告)号：US07888922B2
公开(公告)日：2011-02-15
申请号：US11967272
申请日：2007-12-31
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： G05F1/10 , G05F1/652
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A power control system includes a switching power converter and a power factor correction (PFC) and output voltage controller. The PFC and output voltage controller provides a control signal to a switch to control power factor correction and regulate output voltage of the switching power converter. During a single period of the control signal, the PFC and output voltage controller determines the line input voltage, the output voltage, or both using a single feedback signal received from the switching power converter. The feedback signal is received from a switch node located between an inductor and the switch. The PFC and output voltage controller determines either the line input voltage or the output voltage, whichever was not determined from the feedback signal, using a second feedback signal received from either a PFC stage or a driver stage of the switching power converter.
摘要翻译：功率控制系统包括开关功率转换器和功率因数校正（PFC）和输出电压控制器。 PFC和输出电压控制器为开关提供控制信号，以控制功率因数校正并调节开关电源转换器的输出电压。在控制信号的单个周期期间，PFC和输出电压控制器使用从开关功率转换器接收的单个反馈信号来确定线路输入电压，输出电压或两者。反馈信号从位于电感器和开关之间的开关节点接收。使用从PFC级或开关功率转换器的驱动级接收的第二反馈信号，PFC和输出电压控制器确定线路输入电压或输出电压（取决于未从反馈信号确定）。

82. 发明授权

US07755525B2 Delta sigma modulator with unavailable output values 有权
标题翻译：具有不可用输出值的ΔΣ调制器
公开(公告)号：US07755525B2
公开(公告)日：2010-07-13
申请号：US12241940
申请日：2008-09-30
申请人： Kartik Nanda , John L. Melanson
发明人： Kartik Nanda , John L. Melanson
IPC分类号： H03M3/00
CPC分类号： H02M3/157
摘要： A power control system includes a delta sigma modulator to generate output values for use in controlling a switching power converter. In at least one embodiment, the delta sigma modulator includes two ranges of available output values and a range of one or more unavailable intermediate output values, wherein the range of one or more unavailable intermediate output values represent a gap in available output values. Each unavailable intermediate output value represents an output value that is not generated by the delta sigma modulator. In at least one embodiment, the delta sigma modulator includes a quantizer output remapping module that remaps quantizer output values within the range of one or more unavailable intermediate output values of the delta sigma modulator to new output values within one of the ranges of available output values.
摘要翻译：功率控制系统包括Δ-Σ调制器以产生用于控制开关功率转换器的输出值。在至少一个实施例中，ΔΣ调制器包括两个可用输出值范围和一个或多个不可用中间输出值的范围，其中一个或多个不可用中间输出值的范围表示可用输出值中的间隙。每个不可用的中间输出值表示不由delta-Σ调制器产生的输出值。在至少一个实施例中，ΔΣ调制器包括量化器输出重映射模块，该量化器输出重映射模块将ΔΣ调制器的一个或多个不可用中间输出值的范围内的量化器输出值重新映射到可用输出值范围内的新输出值。

83. 发明授权

US07746972B1 Numerically-controlled phase-lock loop with input timing reference-dependent ratio adjustment 有权
标题翻译：具有输入定时参考相关比例调节的数控锁相环
公开(公告)号：US07746972B1
公开(公告)日：2010-06-29
申请号：US11689729
申请日：2007-03-22
申请人： John L. Melanson , Zhong You , Scott Allan Woodford , Steven Randall Green
发明人： John L. Melanson , Zhong You , Scott Allan Woodford , Steven Randall Green
IPC分类号： H03D3/24
CPC分类号： H03L7/148 , H03L7/0994 , H03L7/10 , H03L7/1976 , H03L2207/50
摘要： A numerically-controlled phase-lock loop with input clock dependent ratio adjustment provides for narrower-bandwidth loops that lock to a wide range of frequencies and/or operation with an absent or degraded input timing reference. A timing reference characteristic detector determines an input frequency range of the input timing reference signal, the data type of the timing reference, and/or whether a timing reference signal of sufficient quality is present. A numerically controlled oscillator is controlled by a numeric ratio that is adjusted to provide the desired clock frequency output in conformity with the detected frequency range and/or data type. If the timing reference signal is absent or degraded, then the numeric ratio can be set to a fixed value or a local timing reference can be applied in order to generate the desired clock output frequency.
摘要翻译：具有输入时钟相关比率调整的数字控制锁相环路提供锁定到宽范围频率和/或在缺少或降级的输入定时参考的情况下的较窄带宽环路。定时参考特征检测器确定输入定时参考信号的输入频率范围，定时参考的数据类型和/或是否存在足够质量的定时参考信号。数字振荡器由数值比例控制，数值比被调节以提供符合检测到的频率范围和/或数据类型的所需时钟频率输出。如果定时参考信号不存在或劣化，则可以将数值比设置为固定值，或者可以应用本地定时参考以产生所需的时钟输出频率。

84. 发明申请

US20100060202A1 Lighting System with Lighting Dimmer Output Mapping 有权
标题翻译：照明系统具有照明调光输出映射
公开(公告)号：US20100060202A1
公开(公告)日：2010-03-11
申请号：US12474714
申请日：2009-05-29
申请人： John L. Melanson , John J. Paulos
发明人： John L. Melanson , John J. Paulos
IPC分类号： H05B37/02
CPC分类号： H05B37/0209 , H05B33/0809 , H05B33/0848 , H05B37/02
摘要： A system and method map dimming levels of a lighting dimmer to light source control signals using a predetermined lighting output function. The dimmer generates a dimmer output signal value. At any particular period of time, the dimmer output signal value represents one of multiple dimming levels. In at least one embodiment, the lighting output function maps the dimmer output signal value to a dimming value different than the dimming level represented by the dimmer output signal value. The lighting output function converts a dimmer output signal values corresponding to measured light levels to perception based light levels. A light source driver operates a light source in accordance with the predetermined lighting output function. The system and method can include a filter to modify at least a set of the dimmer output signal values prior to mapping the dimmer output signal values to a new dimming level.
摘要翻译：系统和方法使用预定的照明输出功能将照明调光器的调光水平映射到光源控制信号。调光器产生调光输出信号值。在任何特定时间段，调光器输出信号值表示多个调光电平之一。在至少一个实施例中，照明输出功能将调光器输出信号值映射到与由调光器输出信号值表示的调光电平不同的调光值。照明输出功能将对应于测量光级的调光输出信号值转换为基于感知的光级。光源驱动器根据预定的照明输出功能操作光源。该系统和方法可以包括滤波器，以在将调光器输出信号值映射到新的调光电平之前修改至少一组调光输出信号值。

85. 发明申请

US20100020573A1 AUDIBLE NOISE SUPPRESSION IN A RESONANT SWITCHING POWER CONVERTER 有权
标题翻译：谐振开关电源转换器中的可听噪声抑制
公开(公告)号：US20100020573A1
公开(公告)日：2010-01-28
申请号：US12241969
申请日：2008-09-30
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： H02M1/00
CPC分类号： H01F38/02 , H01F3/10 , H01F3/14 , H01F38/08 , H01F2038/026 , H02M1/42 , H02M2001/0032 , Y02B70/12 , Y02B70/16
摘要： Audible noise in resonant switching power converter during low-power burst mode operation is reduced by spreading the spectrum generated by the bursts, thereby reducing the amplitude of audio spectrum peaks in the current supplied through the resonant tank from a switching circuit. The spreading can be accomplished by varying the intervals between the bursts and/or by varying a pulse pattern within the bursts. The pulse pattern within the bursts can be varied by varying the number of pulses in the bursts, the polarity of the initial pulse of the bursts, and/or the duration of pulses within the bursts either uniformly or randomly. The burst pulse pattern may also be selected in alternation from a set of pulse patterns stored in a memory and the selection may be made randomly or systematically.
摘要翻译：在低功率突发模式操作期间，谐振开关功率转换器中的声音噪声通过扩展由脉冲串产生的频谱而减小，从而降低了从开关电路通过谐振储能器提供的电流中的音频频谱峰值的幅度。可以通过改变突发之间的间隔和/或通过改变突发内的脉冲模式来实现扩展。可以通过在脉冲串中的脉冲数，脉冲串的初始脉冲的极性和/或脉冲串中的脉冲持续时间均匀地或随机地改变脉冲串内的脉冲模式。突发脉冲图案也可以从存储在存储器中的一组脉冲图案交替地选择，并且可以随机或系统地进行选择。

86. 发明申请

US20100020570A1 RESONANT SWITCHING POWER CONVERTER WITH BURST MODE TRANSITION SHAPING 有权
标题翻译：谐振切换功率转换器，具有脉冲模式转换形状
公开(公告)号：US20100020570A1
公开(公告)日：2010-01-28
申请号：US12242199
申请日：2008-09-30
申请人： John L. Melanson , Mauro L. Gaetano
发明人： John L. Melanson , Mauro L. Gaetano
IPC分类号： H02M3/337
CPC分类号： H01F38/02 , H01F3/10 , H01F3/14 , H01F38/08 , H01F2038/026 , H02M1/42 , H02M2001/0032 , Y02B70/12 , Y02B70/16
摘要： A resonant switching power converter having burst mode transitioning operates during low or zero load conditions with reduced audible noise and component stresses, while improving efficiency. Pulse bursts are generated with a beginning and/or ending pulse duration that differs from mid-burst pulse durations, in order to reduce an amplitude of transients otherwise generated at the beginning and/or end of the bursts. Alternatively, the spacing between the pulses at the beginning and/or end of the bursts may differ from the spacing between the pulses in the middle of the bursts to reduce the transient(s). A number of pulses at the beginning and/or end of the burst can also be set with gradually varying durations, to further reduce component stress and audible vibration in a transformer that couples the resonant tank to the output of the converter.
摘要翻译：具有突发模式转换的谐振开关功率转换器在低或零负载条件下操作，同时提高效率，同时具有降低的可听噪声和分量应力。产生具有不同于脉冲串脉冲持续时间的开始和/或结束脉冲持续时间的脉冲脉冲串，以便减少在脉冲串的开始和/或结束时另外产生的瞬变幅度。或者，脉冲串的开始和/或结束处的脉冲之间的间隔可能与脉冲串中间的脉冲之间的间隔不同，以减少瞬态。在脉冲串的开始和/或结束处的脉冲数也可以设定为具有逐渐变化的持续时间，以进一步降低将谐振回路耦合到转换器的输出端的变压器中的分量应力和可听振动。

87. 发明授权

US07606380B2 Method and system for sound beam-forming using internal device speakers in conjunction with external speakers 有权
标题翻译：使用内置扬声器与外部扬声器结合的声束形成方法和系统
公开(公告)号：US07606380B2
公开(公告)日：2009-10-20
申请号：US11380840
申请日：2006-04-28
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： H04R5/02
CPC分类号： H04S7/301 , H04R3/12 , H04R3/14 , H04R2201/403 , H04R2430/20
摘要： A method and system for sound beam-forming using internal device speakers in conjunction with external speakers provides a low cost alternative to present external surround array systems. A processing circuit within an audio device or audio/visual (AV) device such as a digital television (DTV) generates signals for internal and external speakers that phase-align the internal speakers with the external speakers for beam-forming. The beam may be a surround beam directed away from a listening position so that surround channel information is only heard as reflections. Alternatively, the beam may be a “night mode” beam that concentrates sound at a particular location or multiple beams may be formed for picture-in-picture or other applications where it is desirable to provide multiple isolated listening locations.
摘要翻译：使用内部设备扬声器结合外部扬声器进行声束形成的方法和系统提供了低成本的替代方式来呈现外部环绕声阵列系统。诸如数字电视（DTV）之类的音频设备或音频/视频（AV）设备内的处理电路产生用于内部和外部扬声器的信号，该内部和外部扬声器使内部扬声器与用于波束形成的外部扬声器相对准。光束可以是远离聆听位置的环绕光束，使得环绕声道信息仅被听到作为反射。或者，光束可以是将声音集中在特定位置处的“夜间模式”光束，或者可以为需要提供多个隔离的收听位置的画中画或其它应用而形成多个光束。

88. 发明授权

US07587131B1 Audio clocking in video applications 有权
标题翻译：视频应用中的音频时钟
公开(公告)号：US07587131B1
公开(公告)日：2009-09-08
申请号：US10856436
申请日：2004-05-28
申请人： John L. Melanson , Mark P. Rygh
发明人： John L. Melanson , Mark P. Rygh
IPC分类号： H04N5/91
CPC分类号： H04N5/76 , G11B20/10037 , G11B20/10222 , G11B20/10425 , G11B20/10527 , G11B20/14 , G11B20/225 , G11B2020/00065 , G11B2220/2562 , H04N9/8211
摘要： A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from the jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream. For example, the system clock rate might be 27 MHz while the sample rate of the audio data stream is 44.1 kHz. More generally, the system clock signal preferably has a rate of 108/N MHz, where N is an integer. A sample rate conversion unit in the audio DAC is used to convert the sample rate of the audio data stream to the rate of the system clock signal.
摘要翻译：一种操作诸如DVD播放器的电子视频设备的方法，其中使用两个锁相环从系统时钟信号导出视频时钟信号和音频时钟信号，并且这些视频和音频时钟信号用于处理编码视频数据和编码音频数据，但音频数据流的数模转换由系统时钟信号而不是音频时钟信号控制。通过使用系统时钟信号来控制音频数/模转换器（DAC），DAC避免了由PLL引入到音频时钟信号中的抖动可能导致的性能问题。系统时钟信号可以被除以整数以产生用于音频DAC的采样时钟。在说明性实施例中，系统时钟信号具有不是音频数据流的采样率的整数倍的速率。例如，系统时钟频率可能是27 MHz，而音频数据流的采样率是44.1 kHz。更一般地，系统时钟信号优选地具有108 / NMHz的速率，其中N是整数。音频DAC中的采样率转换单元用于将音频数据流的采样率转换为系统时钟信号的速率。

89. 发明申请

US20090085657A1 COMPENSATION OF FIELD EFFECT ON POLYCRYSTALLINE RESISTORS 有权
标题翻译：对多晶电阻器的场效应的补偿
公开(公告)号：US20090085657A1
公开(公告)日：2009-04-02
申请号：US11864480
申请日：2007-09-28
申请人： HUA YANG , Ammisetti Prasad , John L. Melanson
发明人： HUA YANG , Ammisetti Prasad , John L. Melanson
IPC分类号： H03F1/36 , H01L29/00
CPC分类号： H03F3/45475 , H03F1/3211 , H03F2203/45136 , H03F2203/45528
摘要： A resistive circuit includes a first terminal and a second terminal and polycrystalline first and second resistive segments coupled between the first and second terminals. A third terminal A is coupled to the first resistive segment, and a third terminal B is coupled to the second resistive segment. The third terminal A has a first voltage with respect to the first terminal, and the third terminal B has a second voltage with respect to the second terminal. With this arrangement, the non-linearity of resistance of the first resistive segment at least partially compensates for non-linearity of resistance of the second resistive segment.
摘要翻译：电阻电路包括耦合在第一和第二端子之间的第一端子和第二端子以及多晶的第一和第二电阻段。第三端子A耦合到第一电阻段，并且第三端子B耦合到第二电阻段。第三端子A相对于第一端子具有第一电压，并且第三端子B相对于第二端子具有第二电压。利用这种布置，第一电阻段的电阻的非线性至少部分地补偿第二电阻段的电阻的非线性。

90. 发明申请

US20080272746A1 POWER FACTOR CORRECTION CONTROLLER WITH SWITCH NODE FEEDBACK 有权
标题翻译：功率因数校正控制器，带开关节点反馈
公开(公告)号：US20080272746A1
公开(公告)日：2008-11-06
申请号：US11967272
申请日：2007-12-31
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： G05F1/70 , G05F1/10
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A power control system includes a switching power converter and a power factor correction (PFC) and output voltage controller. The PFC and output voltage controller provides a control signal to a switch to control power factor correction and regulate output voltage of the switching power converter. During a single period of the control signal, the PFC and output voltage controller determines the line input voltage, the output voltage, or both using a single feedback signal received from the switching power converter. The feedback signal is received from a switch node located between an inductor and the switch. The PFC and output voltage controller determines either the line input voltage or the output voltage, whichever was not determined from the feedback signal, using a second feedback signal received from either a PFC stage or a driver stage of the switching power converter.
摘要翻译：功率控制系统包括开关功率转换器和功率因数校正（PFC）和输出电压控制器。 PFC和输出电压控制器为开关提供控制信号，以控制功率因数校正并调节开关电源转换器的输出电压。在控制信号的单个周期期间，PFC和输出电压控制器使用从开关功率转换器接收的单个反馈信号来确定线路输入电压，输出电压或两者。反馈信号从位于电感器和开关之间的开关节点接收。使用从PFC级或开关功率转换器的驱动级接收的第二反馈信号，PFC和输出电压控制器确定线路输入电压或输出电压（取决于未从反馈信号确定）。

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