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    • 81. 发明授权
    • Silicon-on-insulator semiconductor device
    • 绝缘体上半导体器件
    • US07514747B2
    • 2009-04-07
    • US11798988
    • 2007-05-18
    • Koichi Fukuda
    • Koichi Fukuda
    • H01L23/62
    • H01L29/78612H01L29/66772H01L2924/0002H01L2924/00
    • A semiconductor device formed in a silicon-on-insulator substrate includes a silicon channel region located between silicon source and drain regions, and a low-carrier-concentration layer that underlies the channel region. The low-carrier-concentration layer makes contact with both the channel region and the source region. The channel region and the low-carrier-concentration layer are of the same conductive type, but the low-carrier-concentration layer is doped to have a lower carrier concentration than the channel region. The low-carrier-concentration layer eliminates the floating substrate effect, because carriers that would otherwise accumulate in the channel region can escape through the low-carrier-concentration layer into the source region.
    • 形成在绝缘体上硅衬底中的半导体器件包括位于硅源极和漏极区之间的硅沟道区,以及位于沟道区之下的低载流子浓度层。 低载流子浓度层与沟道区域和源极区域接触。 沟道区域和低载流子浓度层具有相同的导电类型,但是低载流子浓度层被掺杂以具有比沟道区域更低的载流子浓度。 低载流子浓度层消除浮置衬底效应,因为否则在沟道区积聚的载流子可以通过低载流子浓度层逸出到源区。
    • 82. 发明申请
    • Liquid Crystal Display Device
    • 液晶显示装置
    • US20090033852A1
    • 2009-02-05
    • US12184270
    • 2008-08-01
    • Koichi FukudaTetsuya OshimaSatoru KawasakiTsutomu SatoKouji Hayakawa
    • Koichi FukudaTetsuya OshimaSatoru KawasakiTsutomu SatoKouji Hayakawa
    • G02F1/1333
    • G02F1/133528G02F2202/28
    • A liquid crystal display device includes: a first substrate; a second substrate which is placed nearer to a viewer than the first substrate, and which faces a viewer side of the first substrate; a liquid crystal sandwiched between the first substrate and the second substrate; an upper polarization plate which is placed nearer to the viewer than the second substrate, and which faces a viewer side of the second substrate; and a transparent resin plate which is placed nearer to the viewer than the upper polarization plate, and which is attached to a viewer side of the upper polarization plate with one of an adhesive material and a bonding material, the transparent resin plate includes a transparent oxide film on a face that faces the upper polarization plate, and the transparent resin plate is in close contact with the adhesive material or the bonding material through the transparent oxide film.
    • 液晶显示装置包括:第一基板; 第二基板,其放置得比第一基板更靠近观察者,并且面向第一基板的观察者侧; 夹在第一基板和第二基板之间的液晶; 位于与第二基板相比更靠近观察者并且面向第二基板的观察者侧的上偏振板; 以及透明树脂板,其被放置成比上偏振板更靠近观察者,并且用粘合材料和接合材料之一附着到上偏振板的观察者侧,透明树脂板包括透明树脂板 面对上偏振板的面上的薄膜,透明树脂板通过透明氧化膜与粘合剂材料或接合材料紧密接触。
    • 83. 发明授权
    • Semiconductor storage device and semiconductor storage device driving method
    • 半导体存储装置及半导体存储装置的驱动方法
    • US07420853B2
    • 2008-09-02
    • US11836907
    • 2007-08-10
    • Koichi Fukuda
    • Koichi Fukuda
    • G11C11/34
    • G11C16/30G11C16/16
    • A semiconductor storage device comprises a semiconductor layer; a plurality of memory cells formed on the semiconductor layer, data writing, erasing or reading with respect to each of the memory cells being possible based on a voltage applied to a control electrode and a voltage applied to the semiconductor layer; a first booster circuit supplying a voltage to control electrodes of selected memory cells into which data is to be written; and a second booster circuit supplying a voltage to control electrodes of inhibited memory cells into which data is not to be written, wherein when erasing data in the memory cells, a potential at the semiconductor layer is boosted in a first boosting mode in which a boosting capability of the first booster circuit is low and a boosting capability of the second booster circuit is high, and then the potential at the semiconductor layer is boosted in a second boosting mode in which the boosting capability of the second booster circuit is low and the boosting capability of the first booster circuit is high.
    • 半导体存储装置包括半导体层; 基于施加到控制电极的电压和施加到半导体层的电压,形成在半导体层上的多个存储单元,相对于每个存储单元的数据写入,擦除或读取是可能的; 向要写入数据的所选存储单元的控制电极提供电压的第一升压电路; 以及第二升压电路,向要写入数据的禁止存储单元的控制电极提供电压,其中当擦除存储单元中的数据时,在第一升压模式中升压半导体层的电位,其中升压 第一升压电路的能力低,第二升压电路的升压能力高,然后在第二升压电路的升压能力低的升压模式下升压半导体层的电位,并且升压 第一升压电路的能力很高。
    • 84. 发明授权
    • Semiconductor storage device and semiconductor storage device driving method
    • 半导体存储装置及半导体存储装置的驱动方法
    • US07269074B2
    • 2007-09-11
    • US11368484
    • 2006-03-07
    • Koichi Fukuda
    • Koichi Fukuda
    • G11C11/34
    • G11C16/30G11C16/16
    • A semiconductor storage device comprises a semiconductor layer; a plurality of memory cells formed on the semiconductor layer, data writing, erasing or reading with respect to each of the memory cells being possible based on a voltage applied to a control electrode and a voltage applied to the semiconductor layer; a first booster circuit supplying a voltage to control electrodes of selected memory cells into which data is to be written; and a second booster circuit supplying a voltage to control electrodes of inhibited memory cells into which data is not to be written, wherein when erasing data in the memory cells, a potential at the semiconductor layer is boosted in a first boosting mode in which a boosting capability of the first booster circuit is low and a boosting capability of the second booster circuit is high, and then the potential at the semiconductor layer is boosted in a second boosting mode in which the boosting capability of the second booster circuit is low and the boosting capability of the first booster circuit is high.
    • 半导体存储装置包括半导体层; 基于施加到控制电极的电压和施加到半导体层的电压,形成在半导体层上的多个存储单元,相对于每个存储单元的数据写入,擦除或读取是可能的; 向要写入数据的所选存储单元的控制电极提供电压的第一升压电路; 以及第二升压电路,向要写入数据的禁止存储单元的控制电极提供电压,其中当擦除存储单元中的数据时,在第一升压模式中升压半导体层的电位,其中升压 第一升压电路的能力低,第二升压电路的升压能力高,然后在第二升压电路的升压能力低的升压模式下升压半导体层的电位,并且升压 第一升压电路的能力很高。
    • 85. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07224608B2
    • 2007-05-29
    • US11246164
    • 2005-10-11
    • Koichi Fukuda
    • Koichi Fukuda
    • G11C16/04
    • G11C16/0491G11C16/0483
    • A semiconductor device includes an electrical circuit formed on a substrate; a level detector outputting a first level signal which has a signal level based on power supply voltage and which determines an operation of the electrical circuit; a command decoder decoding a command that is inputted from the outside, and outputting a command signal; a control circuit to which the command signal is inputted, the control circuit outputting a state signal expressing whether the electrical circuit is in an operation state; and a first latch circuit to which the first level signal and the state signal are inputted, the first latch circuit latching the first level signal at a time based on the state signal.
    • 半导体器件包括形成在衬底上的电路; 电平检测器输出基于电源电压具有信号电平的第一电平信号,并且确定电路的操作; 解码从外部输入的命令并输出命令信号的命令解码器; 输入指令信号的控制电路,所述控制电路输出表示所述电路是否处于工作状态的状态信号; 以及第一锁存电路,第一电平信号和状态信号被输入到其中,第一锁存电路基于状态信号一次锁存第一电平信号。
    • 88. 发明申请
    • Silicon-on-sapphire semiconductor device with shallow lightly-doped drain
    • 具有浅掺杂漏极的蓝宝石半导体器件
    • US20060138543A1
    • 2006-06-29
    • US11288273
    • 2005-11-29
    • Koichi Fukuda
    • Koichi Fukuda
    • H01L27/12
    • H01L29/78657H01L29/78612H01L29/78621
    • A semiconductor device is created in a doped silicon layer at most one-tenth of a micrometer thick formed on and having an interface with a sapphire substrate. An oppositely doped source region is formed in the silicon layer. A gate electrode is formed above part of the silicon layer. A diffusion layer doped with the same type of impurity as the source region but at a lower concentration is formed in the silicon layer, extending into a first area beneath the gate electrode, functioning as a drain region or as a lightly-doped extension of a more heavily doped drain region. The depth of this diffusion layer is less than the thickness of the silicon layer. This comparatively shallow diffusion depth reduces current leakage by inhibiting the formation of a back channel.
    • 半导体器件产生在形成于蓝宝石衬底上并具有与蓝宝石衬底的界面的至多十分之一微米厚的掺杂硅层中。 在硅层中形成相反掺杂的源极区。 栅电极形成在硅层的一部分的上方。 在硅层中形成掺杂有与源极区相同类型杂质但浓度较低的扩散层,延伸到栅电极下方的第一区域中,用作漏极区域或作为漏极区域的轻掺杂延伸层 更重掺杂的漏极区。 该扩散层的深度小于硅层的厚度。 这种比较浅的扩散深度通过抑制反向通道的形成来减少电流泄漏。