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81. 发明授权

US07511319B2 Methods and apparatus for a stepped-drift MOSFET 有权
标题翻译：梯形漂移MOSFET的方法和装置
公开(公告)号：US07511319B2
公开(公告)日：2009-03-31
申请号：US11361624
申请日：2006-02-24
申请人： Ronghua Zhu , Amitava Bose , Vishnu K. Khemka , Todd C. Roggenbauer
发明人： Ronghua Zhu , Amitava Bose , Vishnu K. Khemka , Todd C. Roggenbauer
IPC分类号： H01L21/76
CPC分类号： H01L29/7835 , H01L29/0653 , H01L29/1083 , H01L29/456 , H01L29/66659 , H01L29/66681 , H01L29/7816
摘要： A power metal-oxide-semiconductor field effect transistor (MOSFET)(100) incorporates a stepped drift region including a shallow trench insulator (STI)(112) partially overlapped by the gate (114) and which extends a portion of the distance to a drain region (122). A silicide block extends from and partially overlaps STI (112) and drain region (122). The STI (112) has a width that is approximately 50% to 75% of the drift region.
摘要翻译：功率金属氧化物半导体场效应晶体管（MOSFET）（100）包括阶梯状漂移区域，其包括与栅极（114）部分重叠的浅沟槽绝缘体（112），并将距离的一部分延伸到漏区（122）。硅化物块从STI（112）和漏极区（122）延伸并部分重叠。 STI（112）的宽度为漂移区域的大约50％至75％。

82. 发明授权

US07466006B2 Structure and method for RESURF diodes with a current diverter 有权
标题翻译：具有电流分流器的RESURF二极管的结构和方法
公开(公告)号：US07466006B2
公开(公告)日：2008-12-16
申请号：US11134792
申请日：2005-05-19
申请人： Vishnu K. Khemka , Ronghua Zhu , Amitava Bose
发明人： Vishnu K. Khemka , Ronghua Zhu , Amitava Bose
IPC分类号： H01L23/62
CPC分类号： H01L29/8611 , H01L29/063 , H01L2924/0002 , H01L2924/00
摘要： Methods and apparatus are provided for reducing substrate leakage current of lateral RESURF diode devices. The diode device (60, 60′, 100) comprises first (39) and second (63) surface terminals overlying a semiconductor substrate (22) coupled to P (38, 32, 26) and N (24, 30, 46) type regions providing the diode action. An unavoidable parasitic vertical device (54, 92) permits leakage current to flow from the first terminal (39) to the substrate (22). This leakage current is reduced by having the diode device second terminal (63) comprise both N (46) and P (62) type regions coupled together by the second terminal (63). This forms a shorted base-collector lateral transistor (72) between the first (39) and second (63) terminals to provide the diode function. The gain of this lateral transistor (72) increases the proportion of first terminal (39) current that flows to the second terminal (63) rather than the substrate (22). In preferred embodiments, the first (39) or second (63) terminal is also ohmically coupled to a buried layer (24) that overlies the substrate (22) beneath the shorted base-collector lateral transistor (72).
摘要翻译：提供了减少侧面RESURF二极管器件的衬底漏电流的方法和装置。二极管器件（60,60'，100）包括覆盖耦合到P（38,32,26）和N（24,30,46）型的半导体衬底（22）上的第一（39）和第二（63）提供二极管动作的区域。不可避免的寄生垂直装置（54,92）允许泄漏电流从第一端子（39）流到衬底（22）。通过使二极管器件的第二端子（63）包括由第二端子（63）耦合在一起的N（46）和P（62）型区域来减小漏电流。这形成了在第一（39）和第二（63）端子之间的短路基极集电极横向晶体管（72），以提供二极管功能。该横向晶体管（72）的增益增加流到第二端子（63）而不是衬底（22）的第一端子（39）电流的比例。在优选实施例中，第一（39）或第二（63）端子也被欧姆耦合到覆盖短路基极 - 集电极横向晶体管（72）下面的衬底（22）的掩埋层（24）。

83. 发明申请

US20080293211A1 High voltage deep trench capacitor 失效
标题翻译：高压深沟槽电容器
公开(公告)号：US20080293211A1
公开(公告)日：2008-11-27
申请号：US11752608
申请日：2007-05-23
申请人： Ronghua Zhu , Vishnu Khemka , Amitava Bose , Todd C. Roggenbauer
发明人： Ronghua Zhu , Vishnu Khemka , Amitava Bose , Todd C. Roggenbauer
IPC分类号： H01L21/20
CPC分类号： H01L29/94 , H01L27/13 , H01L28/91 , H01L29/66181
摘要： A semiconductor process and apparatus provide a high voltage deep trench capacitor structure (10) that is integrated in an integrated circuit, alone or in alignment with a fringe capacitor (5). The deep trench capacitor structure is constructed from a first capacitor plate (4) that is formed from a doped n-type SOI semiconductor layer (e.g., 4a-c). The second capacitor plate (3) is formed from a doped p-type polysilicon layer (3a) that is tied to the underlying substrate (1).
摘要翻译：半导体工艺和装置提供集成在集成电路中的单独或与边缘电容器（5）对准的高电压深沟槽电容器结构（10）。深沟槽电容器结构由由掺杂的n型SOI半导体层（例如4a-c）形成的第一电容器板（4）构成。第二电容器板（3）由连接到下面的衬底（1）的掺杂p型多晶硅层（3a）形成。

84. 发明申请

US20080191305A1 BIPOLAR SCHOTTKY DIODE AND METHOD 有权
标题翻译：双极肖特基二极管和方法
公开(公告)号：US20080191305A1
公开(公告)日：2008-08-14
申请号：US11674886
申请日：2007-02-14
申请人： Vishnu K. Khemka , Amitava Bose , Todd C. Roggenbauer , Ronghua Zhu
发明人： Vishnu K. Khemka , Amitava Bose , Todd C. Roggenbauer , Ronghua Zhu
IPC分类号： H01L29/861 , H01L21/283
CPC分类号： H01L29/872 , H01L29/0634 , H01L29/402 , H01L29/456 , H01L29/47 , H01L29/66143
摘要： A low leakage bipolar Schottky diode (20, 40, 87) is formed by parallel lightly doped N (32, 52, 103) and P (22, 42, 100) regions adapted to form superjunction regions. First ends of the P regions (22, 42, 100) are terminated by P+ layers (21, 41, 121) and second, opposed ends of the N regions (32, 52, 103) are terminated by N+ layers (31, 51, 131). Silicide layers (24, 34, 44, 54, 134, 124) are provided in contact with both ends of the parallel N and P regions (22, 32, 42, 52, 100, 103), thereby forming at the first end ohmic contacts (28, 48) with the P+ regions (21, 41, 121) and Schottky contacts (37, 57) with the N regions 32, 52, 103) and at the second, opposite end, ohmic contacts (38, 58) with the N+ regions (31, 51, 131) and Schottky contacts (27, 47) with the P regions (22, 42, 100). When forward biased current flows in both N (32, 52) and P (22, 42) regions thereby reducing the forward drop. When reverse biased, a substantial portion of the voltage is dropped across the lightly doped N (32, 52) and P (22, 42) superjunction regions, thereby significantly reducing the reverse leakage.
摘要翻译：通过平行轻掺杂N（32,52,103）和适于形成超结区的P（22,42,100）区域形成低漏极双极肖特基二极管（20,40,87）。 P区域（22,42,100）的第一端由P +层（21,41,121）端接，并且N区域（32,52,103）的相对端由N +层（31,51 ，131）。提供与平行N和P区（22,32,42,52,100,103）的两端接触的硅化物层（24,34,44,54,134,124），从而在第一端形成欧姆具有P +区域（21,41,121）的触点（28,48）和具有N个区域32,52,103的肖特基触头（37,57）），并且在第二相对端，欧姆接触件（38,58）与P区（22,42,100）的N +区（31,51,131）和肖特基接触（27,47）。当正向偏置电流在N（32,52）和P（22,42）区域中流动时，从而减少向下的下降。当反向偏置时，电压的大部分在轻掺杂的N（32,52）和P（22,42）超结区域下降，从而显着减少反向泄漏。

85. 发明申请

US20080191275A1 DOTTED CHANNEL MOSFET AND METHOD 有权
标题翻译： DOTTED CHANNEL MOSFET和方法
公开(公告)号：US20080191275A1
公开(公告)日：2008-08-14
申请号：US11674888
申请日：2007-02-14
申请人： Vishnu K. Khemka , Amitava Bose , Todd C. Roggenbauer , Ronghua Zhu
发明人： Vishnu K. Khemka , Amitava Bose , Todd C. Roggenbauer , Ronghua Zhu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7835 , H01L29/0692 , H01L29/1045 , H01L29/1087 , H01L29/4238 , H01L29/66659 , H01L29/78
摘要： A improved MOSFET (50, 51, 75, 215) has a source (60) and drain (62) in a semiconductor body (56), surmounted by an insulated control gate (66) located over the body (56) between the source (60) and drain (62) and adapted to control a conductive channel (55) extending between the source (60) and drain (62). The insulated gate (66) is perforated by a series of openings (61) through which highly doped regions (69) in the form of a series of (e.g., square) dots (69) of the same conductivity type as the body (56) are provided, located in the channel (55), spaced apart from each other and from the source (60) and drain (62). These channel dots (69) are desirably electrically coupled to a highly doped contact (64) to the body (56). The resulting device (50, 51, 75, 215) has a greater SOA, higher breakdown voltage and higher HBM stress resistance than equivalent prior art devices (20) without the dotted channel. Threshold voltage is not affected.
摘要翻译：改进的MOSFET（50,51,75,215）在半导体本体（56）中具有源极（60）和漏极（62），其被位于源极（56）之间的绝缘控制栅极（66）所覆盖，（60）和漏极（62），并且适于控制在源极（60）和漏极（62）之间延伸的导电通道（55）。绝缘栅极（66）由一系列开口（61）穿孔，通过该开口（61），与体（56）相同导电类型的一系列（例如，正方形）点（69）形式的高度掺杂区域（69）穿过该开口）设置在通道（55）中，彼此间隔开并且与源（60）和排水口（62）间隔开。这些通道点（69）期望地电耦合到主体（56）的高度掺杂的触点（64）。所得到的器件（50,51,75,215）具有比没有点通道的等效现有技术器件（20）更大的SOA，更高的击穿电压和更高的HBM应力电阻。阈值电压不受影响。

86. 发明授权

US07141860B2 LDMOS transistor 有权
标题翻译： LDMOS晶体管
公开(公告)号：US07141860B2
公开(公告)日：2006-11-28
申请号：US10875105
申请日：2004-06-23
申请人： Vishnu K. Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose
发明人： Vishnu K. Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose
IPC分类号： H01L27/95 , H01L29/47
CPC分类号： H01L29/782 , H01L27/0727 , H01L29/0619 , H01L29/0653 , H01L29/47 , H01L29/66659 , H01L29/66681 , H01L29/7835
摘要： An LDMOS transistor has a Schottky diode inserted at the center of a doped region of the LDMOS transistor. A Typical LDMOS transistor has a drift region in the center. In this case a Schottky diode is inserted at the center of this drift region which has the effect of providing a Schottky diode connected from source to drain in the forward direction so that the drain voltage is clamped to a voltage that is lower than the PN junction threshold, thereby avoiding forward biasing the PN junction. An alternative is to insert the Schottky diode at the well in which the source is formed, which is on the periphery of the LDMOS transistor. In such case the Schottky diode is formed differently but still is connected from source to drain in the forward direction to achieve the desired voltage clamping at the drain.
摘要翻译： LDMOS晶体管具有插入在LDMOS晶体管的掺杂区域的中心处的肖特基二极管。典型的LDMOS晶体管在中心具有漂移区域。在这种情况下，肖特基二极管被插入该漂移区的中心，其具有在正向上提供从源极到漏极连接的肖特基二极管的作用，使得漏极电压被钳位到低于PN结的电压阈值，从而避免正向偏置PN结。一种替代方案是将肖特基二极管插入其中形成源的阱，其位于LDMOS晶体管的外围。在这种情况下，肖特基二极管的形成方式不同，但仍然在正向方向上从源极到漏极连接，以在漏极处实现所需的电压钳位。

87. 发明授权

US07071518B2 Schottky device 失效
标题翻译：肖特基装置
公开(公告)号：US07071518B2
公开(公告)日：2006-07-04
申请号：US10856602
申请日：2004-05-28
申请人： Vijay Parthasarathy , Vishnu K. Khemka , Ronghua Zhu , Amitava Bose
发明人： Vijay Parthasarathy , Vishnu K. Khemka , Ronghua Zhu , Amitava Bose
IPC分类号： H01L27/772
CPC分类号： H01L27/0727 , H01L27/0629
摘要： A regular Schottky diode or a device that has a Schottky diode characteristic and an MOS transistor are coupled in series to provide a significant improvement in leakage current and breakdown voltage with only a small degradation in forward current. In the reverse bias case, there is a small reverse bias current but the voltage across the Schottky diode remains small due the MOS transistor. Nearly all of the reverse bias voltage is across the MOS transistor until the MOS transistor breaks down. This transistor breakdown, however, is not initially destructive because the Schottky diode limits the current. As the reverse bias voltage continues to increase the Schottky diodes begins to absorb more of the voltage. This increases the leakage current but the breakdown voltage is a somewhat additive between the transistor and the Schottky diode.
摘要翻译：正交肖特基二极管或具有肖特基二极管特性和MOS晶体管的器件串联耦合以提供泄漏电流和击穿电压的显着改进，只有正向电流的降低很小。在反向偏置情况下，存在小的反向偏置电流，但由于MOS晶体管，肖特基二极管两端的电压保持较小。几乎所有的反向偏置电压都跨越MOS晶体管，直到MOS晶体管故障。然而，该晶体管击穿不是最初的破坏性，因为肖特基二极管限制了电流。随着反向偏压持续增加，肖特基二极管开始吸收更多的电压。这增加了漏电流，但是在晶体管和肖特基二极管之间的击穿电压稍微相加。

88. 发明申请

US20050285188A1 LDMOS transistor 有权
标题翻译： LDMOS晶体管
公开(公告)号：US20050285188A1
公开(公告)日：2005-12-29
申请号：US10875105
申请日：2004-06-23
申请人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose
发明人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose
IPC分类号： H01L29/06 , H01L29/47 , H01L29/76 , H01L29/78
CPC分类号： H01L29/782 , H01L27/0727 , H01L29/0619 , H01L29/0653 , H01L29/47 , H01L29/66659 , H01L29/66681 , H01L29/7835
摘要： An LDMOS transistor has a Schottky diode inserted at the center of a doped region of the LDMOS transistor. A Typical LDMOS transistor has a drift region in the center. In this case a Schottky diode is inserted at the center of this drift region which has the effect of providing a Schottky diode connected from source to drain in the forward direction so that the drain voltage is clamped to a voltage that is lower than the PN junction threshold, thereby avoiding forward biasing the PN junction. An alternative is to insert the Schottky diode at the well in which the source is formed, which is on the periphery of the LDMOS transistor. In such case the Schottky diode is formed differently but still is connected from source to drain in the forward direction to achieve the desired voltage clamping at the drain.
摘要翻译： LDMOS晶体管具有插入在LDMOS晶体管的掺杂区域的中心处的肖特基二极管。典型的LDMOS晶体管在中心具有漂移区域。在这种情况下，肖特基二极管插在该漂移区的中心，其具有提供从正向连接到源极到漏极的肖特基二极管的作用，使得漏极电压被钳位到低于PN结的电压阈值，从而避免正向偏置PN结。一种替代方案是将肖特基二极管插入其中形成源的阱，其位于LDMOS晶体管的外围。在这种情况下，肖特基二极管的形成方式不同，但仍然在正向方向上从源极到漏极连接，以在漏极处实现所需的电压钳位。

89. 发明申请

US20050275055A1 Schottky device 失效
标题翻译：肖特基装置
公开(公告)号：US20050275055A1
公开(公告)日：2005-12-15
申请号：US10856602
申请日：2004-05-28
申请人： Vijay Parthasarathy , Vishnu Khemka , Ronghua Zhu , Amitava Bose
发明人： Vijay Parthasarathy , Vishnu Khemka , Ronghua Zhu , Amitava Bose
IPC分类号： H01L27/06 , H01L27/07 , H03K19/00
CPC分类号： H01L27/0727 , H01L27/0629
摘要： A regular Schottky diode or a device that has a Schottky diode characteristic and an MOS transistor are coupled in series to provide a significant improvement in leakage current and breakdown voltage with only a small degradation in forward current. In the reverse bias case, there is a small reverse bias current but the voltage across the Schottky diode remains small due the MOS transistor. Nearly all of the reverse bias voltage is across the MOS transistor until the MOS transistor breaks down. This transistor breakdown, however, is not initially destructive because the Schottky diode limits the current. As the reverse bias voltage continues to increase the Schottky diodes begins to absorb more of the voltage. This increases the leakage current but the breakdown voltage is a somewhat additive between the transistor and the Schottky diode.
摘要翻译：正交肖特基二极管或具有肖特基二极管特性和MOS晶体管的器件串联耦合以提供泄漏电流和击穿电压的显着改进，只有正向电流的降低很小。在反向偏置情况下，存在小的反向偏置电流，但由于MOS晶体管，肖特基二极管两端的电压保持较小。几乎所有的反向偏置电压都跨越MOS晶体管，直到MOS晶体管故障。然而，该晶体管击穿不是最初的破坏性，因为肖特基二极管限制了电流。随着反向偏压持续增加，肖特基二极管开始吸收更多的电压。这增加了漏电流，但是在晶体管和肖特基二极管之间的击穿电压稍微相加。

90. 发明授权

US06815780B1 Semiconductor component with substrate injection protection structure 有权
标题翻译：半导体元件具有基板注入保护结构
公开(公告)号：US06815780B1
公开(公告)日：2004-11-09
申请号：US10417972
申请日：2003-04-15
申请人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose , Todd C. Roggenbauer
发明人： Vishnu Khemka , Vijay Parthasarathy , Ronghua Zhu , Amitava Bose , Todd C. Roggenbauer
IPC分类号： H01L2976
CPC分类号： H01L21/76224 , H01L21/763
摘要： A semiconductor component includes a semiconductor substrate (210) having a first conductivity type, a semiconductor epitaxial layer (220) having the first conductivity type located over the semiconductor substrate, a first semiconductor device (110) and a second semiconductor device (130) located in the semiconductor epitaxial layer and including, respectively, a first semiconductor region (120) and a second semiconductor region (140), both having the second conductivity type, an ohmic contact region (150) in the semiconductor epitaxial layer having the first conductivity type and located between the first and second semiconductor devices, and at least one electrically insulating trench (160, 360) located in the semiconductor epitaxial layer and circumscribing at least the first semiconductor device. The semiconductor epitaxial layer has a doping concentration lower than a doping concentration of the semiconductor substrate.

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