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81. 发明授权

US07029595B1 Selective etch for uniform metal trace exposure and milling using focused ion beam system 失效
标题翻译：使用聚焦离子束系统进行均匀金属痕迹曝光和研磨的选择性蚀刻
公开(公告)号：US07029595B1
公开(公告)日：2006-04-18
申请号：US10226802
申请日：2002-08-21
申请人： Xia (Susan) Li , Eugene A. Delenia , Rosalinda M. Ring
发明人： Xia (Susan) Li , Eugene A. Delenia , Rosalinda M. Ring
IPC分类号： H01L21/00
CPC分类号： H01L21/31138 , H01L21/31116 , H01L21/67075
摘要： A system and method for exposing and/or milling a copper metallization layer disposed in dielectric that may have an overlying polyimide layer preferably by use of a FIB machine system used for exposing/milling aluminum metallization layers is disclosed. The method includes using a gas assisted (GAS) system for exposing a portion of a copper metal trace disposed in a dielectric and includes the step of removing a portion of the dielectric overlying the portion of the metal trace using the GAS system activated with a dielectric selective chemical that does not have a significant spontaneous (non ion-beam induced) reaction with the metal trace. The system includes a focused ion beam (FIB) machine for exposing/milling a portion of a metal trace disposed in a dielectric substrate wherein the metal trace is copper.
摘要翻译：公开了一种用于暴露和/或研磨设置在电介质中的铜金属层的系统和方法，其优选地可以通过使用用于暴露/研磨铝金属化层的FIB机器系统而具有上覆的聚酰亚胺层。该方法包括使用气体辅助（GAS）系统来暴露设置在电介质中的铜金属迹线的一部分，并且包括使用由电介质激活的GAS系统去除部分金属迹线的部分的电介质的步骤选择性化学物质不会与金属痕迹发生显着的自发（非离子束诱导）反应。该系统包括聚焦离子束（FIB）机器，用于暴露/研磨设置在电介质基底中的金属迹线的一部分，其中金属迹线是铜。

82. 发明授权

US07020678B1 Machine generated sweepstakes entry model and associated distributed processing system 有权
标题翻译：机器生成抽奖入门模型及相关分布式处理系统
公开(公告)号：US07020678B1
公开(公告)日：2006-03-28
申请号：US09602789
申请日：2000-06-23
申请人： Edward A. Hubbard
发明人： Edward A. Hubbard
IPC分类号： G06F13/00
CPC分类号： G07F17/32 , G07F17/3237
摘要： A method for providing machine generated sweepstakes entries is disclosed for a distributed parallel processing system. The distributed processing system identifies and utilizes capabilities of distributed devices connected together through a wide variety of communication systems and networks and utilizes those capabilities to organize, manage and distribute project workloads to the distributed devices.
摘要翻译：公开了一种用于提供机器生成的抽奖条目的方法，用于分布式并行处理系统。分布式处理系统通过各种通信系统和网络来识别和利用连接在一起的分布式设备的能力，并利用这些功能组织，管理和分发项目工作量到分布式设备。

83. 发明授权

US07013400B2 Method for managing power in a simultaneous multithread processor by loading instructions into pipeline circuit during select times based on clock signal frequency and selected power mode 有权
标题翻译：基于时钟信号频率和选择的功率模式，在选择时间内通过将指令加载到流水线电路中来管理同时多线程处理器中的电力的方法
公开(公告)号：US07013400B2
公开(公告)日：2006-03-14
申请号：US10422674
申请日：2003-04-24
申请人： Ronald N. Kalla , Minh Michelle Q. Pham , John W. Ward, III
发明人： Ronald N. Kalla , Minh Michelle Q. Pham , John W. Ward, III
IPC分类号： G06F1/32
CPC分类号： G06F9/3836 , G06F9/30189 , G06F9/3851 , G06F9/3869
摘要： A register in the control unit of the CPU that is used to keep track of the address of the current or next instruction is called a program counter. In an SMT system having two threads, the CPU has program counters for both threads and means for alternately selecting between program counters to determine which thread supplies an instruction to the instruction fetch unit (IFU). The software for the SMT assigns a priority to threads entering the code stream. Instructions from the threads are read from the instruction queues pseudo-randomly and proportional to their execution priorities in the normal power mode. If both threads have a lowest priority, a low power mode is set generating a gated select time every N clock cycles of a clock when valid instructions are loaded. N may be adjusted to vary the amount of power savings and the gated select time.
摘要翻译：用于跟踪当前或下一条指令的地址的CPU的控制单元中的寄存器称为程序计数器。在具有两个线程的SMT系统中，CPU具有用于两个线程的程序计数器和用于在程序计数器之间交替选择以确定哪个线程向指令获取单元（IFU）提供指令的装置。用于SMT的软件为输入代码流的线程分配优先级。来自线程的指令从指令队列中伪随机地读取，并与其在正常功率模式下的执行优先级成比例。如果两个线程具有最低优先级，则设置低功率模式，当加载有效指令时，每N个时钟周期产生门控选择时间。可以调节N以改变功率节省量和选通时间。

84. 发明授权

US07012214B2 Nanopowder synthesis using pulsed arc discharge and applied magnetic field 有权
标题翻译：使用脉冲电弧放电和施加磁场的纳米粉末合成
公开(公告)号：US07012214B2
公开(公告)日：2006-03-14
申请号：US10669858
申请日：2003-09-24
申请人： Kurt A. Schroder , Doug K. Jackson
发明人： Kurt A. Schroder , Doug K. Jackson
IPC分类号： B23K9/00
CPC分类号： B01J19/088 , B01J2219/0809 , B01J2219/0822 , B01J2219/083 , B01J2219/0839 , B01J2219/0854 , B01J2219/0862 , B01J2219/0886 , B01J2219/0898 , B22F9/14 , B22F2999/00 , B22F3/003
摘要： Nanopowder synthesis systems in which a pulsed magnetic field is applied to electrodes of precursor material, in close proximity to an electrical discharge arc that is formed between the electrodes, to attain increased yields of nanopowder. A magnet insert of a coating precursor material is used to coat the nanopowder and thereby reduce nanoparticle agglomeration.
摘要翻译：纳米粉末合成系统，其中将脉冲磁场施加到前体材料的电极，靠近形成在电极之间的放电电弧，以获得增加的纳米粉末产量。使用涂覆前体材料的磁体插入物涂覆纳米粉末，从而减少纳米颗粒聚集。

85. 发明授权

US07010710B2 Proximity sensor enhanced power management 有权
公开(公告)号：US07010710B2
公开(公告)日：2006-03-07
申请号：US10063008
申请日：2002-03-12
申请人： William Joseph Piazza
发明人： William Joseph Piazza
IPC分类号： G06F1/30
CPC分类号： G06F1/3231 , Y02D10/173
摘要： A computing device incorporates a user sensor to signal when a user is moving or within a specified proximity of the computing device. If the user is not present, the computing device will go into a low-power mode. A real-time clock is programmed to interrupt at user indicted event times and dates. If a queued event occurs, the computing device samples the user sensor and begins notification procedures if the user is present. If a queued event time occurs while the user is not present, then the computing device enters or stays in the low-power mode. If the user sensor indicates that the user is present, the computing device notifies the user of the pending event and any missed events. The computing device may require a user code before normal operation is activated following a transition to an indication that the user is present.

86. 发明授权

US07007273B2 Object oriented model of preloading software 有权
公开(公告)号：US07007273B2
公开(公告)日：2006-02-28
申请号：US10020697
申请日：2001-10-29
申请人： Mary Lynn Cashin , Timothy Alan Jones , Joshua Neil Novak , Rod David Waltermann , Arnold S. Weksler
发明人： Mary Lynn Cashin , Timothy Alan Jones , Joshua Neil Novak , Rod David Waltermann , Arnold S. Weksler
IPC分类号： G06F9/445
CPC分类号： G06F8/60
摘要： A method, system and computer program product for creating a preload. A preload may be stored onto a computer system prior to the computer system being manufactured. One or more attributes of an object of a preload may be defined. Each preload object may be an aggregation of one or more software element objects. A comparison may be made between the attributes in each software element object with the one or more attributes in the defined preload object. Upon identifying one or more software element objects whose attributes comprise the one or more attributes of the defined preload object, one or more part numbers associated with the one or more identified software element objects may be transmitted to a manufacturing system. Software associated with the identified one or more software element objects may be retrieved and installed onto a preload associated with the defined preload object.

87. 发明授权

US07002420B2 Interleaved VCO with body voltage frequency range control 失效
标题翻译：交错VCO与车身电压频率范围控制
公开(公告)号：US07002420B2
公开(公告)日：2006-02-21
申请号：US10763093
申请日：2004-01-22
申请人： Hung C. Ngo
发明人： Hung C. Ngo
IPC分类号： H03B27/00
CPC分类号： H03K3/0315
摘要： An interleaved VCO is configured using a ring oscillator with voltage controlled feedforward inverting stages coupled around the inverting stages making up the basic ring oscillator to enable the frequency of the ring oscillator to be voltage controlled. The feedforward inverting stages comprise a complementary inverter stage and a voltage controlled transfer gate. Complementary control voltages are coupled to the gates of the complementary transfer gate FET devices. Likewise, the complementary control voltages are coupled to the corresponding body of the FET devices in the transfer gate and in the inverting stage. The complementary control voltages may also be connected to the body of the complementary FET devices in the inverting stages making up the basic ring oscillator. This allows the frequency range of the VCO to be extended without having to switch the feedforward paths into an out of the circuit.
摘要翻译：使用环形振荡器配置交错VCO，该环形振荡器具有耦合在构成基本环形振荡器的反相级周围的压控前馈反相级，以使环形振荡器的频率能够被电压控制。前馈反相级包括互补反相器级和压控传输门。互补控制电压耦合到互补转移栅极FET器件的栅极。同样，互补控制电压耦合到传输门和反相级中的FET器件的相应体。互补控制电压也可以连接到构成基本环形振荡器的反相级中的互补FET器件的主体。这允许VCO的频率范围扩展，而不必将前馈路径切换到电路外。

88. 发明授权

US07000047B2 Mechanism for effectively handling livelocks in a simultaneous multithreading processor 失效
标题翻译：在同时多线程处理器中有效处理活动锁的机制
公开(公告)号：US07000047B2
公开(公告)日：2006-02-14
申请号：US10422036
申请日：2003-04-23
申请人： Dung Quoc Nguyen , Raymond Cheung Yeung
发明人： Dung Quoc Nguyen , Raymond Cheung Yeung
IPC分类号： G06F12/00 , G06F12/14 , G06F15/16 , G06F9/46
CPC分类号： G06F9/3017 , G06F9/3836 , G06F9/384 , G06F9/3851 , G06F9/3857 , G06F9/3859 , G06F9/3861
摘要： A method and multithreaded processor for handling livelocks in a simultaneous multithreaded processor. A number of instructions for a thread in a queue may be counted. A counter in the queue may be incremented if the number of instructions for the thread in the queue in a previous clock cycle is equal to the number of instructions for the thread in the queue in a current clock cycle. If the value of the counter equals a threshold value, then a livelock condition may be detected. Further, if the value of the counter equals a threshold value, a recovery action may be activated to handle the livelock condition detected. The recovery action may include blocking the instructions associated with a thread causing the livelock condition from being executed thereby ensuring that the locked thread makes forward progress.
摘要翻译：一种用于处理同时多线程处理器中的活动锁的方法和多线程处理器。可以对队列中的线程的许多指令进行计数。如果先前时钟周期中队列中的线程的指令数目等于当前时钟周期中队列中线程的指令数，队列中的计数器可能会增加。如果计数器的值等于阈值，则可以检测到活动锁定状态。此外，如果计数器的值等于阈值，则可以激活恢复动作来处理检测到的活动锁定状态。恢复动作可以包括阻止与线程相关联的指令，导致活动锁定条件被执行，从而确保锁定的线程前进进行。

89. 发明授权

US06996124B1 Mechanism to strip LARQ header and regenerate FCS to support sleep mode wake up 失效
标题翻译：剥离LARQ标题并再生FCS以支持睡眠模式唤醒的机制
公开(公告)号：US06996124B1
公开(公告)日：2006-02-07
申请号：US09816706
申请日：2001-03-23
申请人： Peter Ka-Fai Chow
发明人： Peter Ka-Fai Chow
IPC分类号： H04J3/16
CPC分类号： H04L1/0063 , H04L29/06 , H04L69/22 , H04L69/324
摘要： The present invention provides a method for supporting sleep mode wake up in a home phone line network. The method includes: detecting a limited automatic repeat request (LARQ) header in a frame; stripping the LARQ header and a frame check sequence (FCS) in the frame; recalculating the FCS for the stripped frame; and adding the recalculated FCS to the stripped frame. The method strips the LARQ header from a HPNA frame before it is sent to an Ethernet controller. By stripping the LARQ header, the Ethernet controller will correctly find the set byte location for the wake pattern and attempts to match the bit pattern with the wake pattern. In this manner, sleep mode wake up is supported.
摘要翻译：本发明提供一种用于在家用电话线路网络中支持睡眠模式唤醒的方法。该方法包括：检测帧中的有限自动重复请求（LARQ）报头; 剥离帧中的LARQ头和帧校验序列（FCS）; 重新计算剥离框架的FCS; 并将重新计算的FCS添加到剥离的框架中。该方法在发送到以太网控制器之前，从HPNA帧中剥离LARQ报头。通过剥离LARQ标头，以太网控制器将正确找到唤醒模式的设置字节位置，并尝试将位模式与唤醒模式相匹配。以这种方式，支持睡眠模式唤醒。

90. 发明授权

US06995564B1 Method and system for locating chip-level defects through emission imaging of a semiconductor device 失效
标题翻译：通过半导体器件的发射成像来定位芯片级缺陷的方法和系统
公开(公告)号：US06995564B1
公开(公告)日：2006-02-07
申请号：US10346463
申请日：2003-01-15
申请人： Boon Y. Ang , Mehrdad Mahanpour , Mohammed Massoodi
发明人： Boon Y. Ang , Mehrdad Mahanpour , Mohammed Massoodi
IPC分类号： G01R31/00 , G01R31/28 , G06K9/20
CPC分类号： G01R31/311 , G01R31/31728
摘要： Aspects for locating chip-level defects through emission imaging of a semiconductor device are described. The aspects include providing a semiconductor device for inspection within an emission imaging system. Emission detection from a frontside and backside of the semiconductor device substantially simultaneously is then performed in the emission imaging system, wherein the emissions detected indicate potential defects within the semiconductor device.
摘要翻译：描述通过半导体器件的发射成像定位芯片级缺陷的方面。这些方面包括在发射成像系统内提供用于检查的半导体器件。然后在发射成像系统中执行从半导体器件的正面和背面基本上同时进行的发射检测，其中检测到的发射表示半导体器件内的潜在缺陷。

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