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    • 71. 发明授权
    • Amplifier bias techniques
    • 放大器偏置技术
    • US07872531B1
    • 2011-01-18
    • US12580979
    • 2009-10-16
    • Vijayakumar Dhanasekaran
    • Vijayakumar Dhanasekaran
    • H03F3/26
    • H03F1/308H03F3/3027H03F2200/447
    • Techniques for generating a bias voltage for a class AB amplifier having first and second active transistors. In an exemplary embodiment, a diode-coupled first transistor supports a first current, and the gate voltage of the first transistor is coupled to the gate voltage of the first active transistor. The first current is split into a second current and a first auxiliary current supported by a second transistor, which is biased at a desired common-mode output voltage of the class AB amplifier. The first auxiliary current is further combined with a third current to be supported by a third transistor, with the third transistor configured to replicate the characteristic of the second active transistor. Further techniques are provided for setting the drain voltage of the third transistor to be close to the common-mode output voltage. The techniques described herein may be used to provide a bias voltage for the NMOS and/or PMOS active transistors in a class AB amplifier.
    • 用于产生具有第一和第二有源晶体管的AB类放大器的偏置电压的技术。 在示例性实施例中,二极管耦合的第一晶体管支持第一电流,并且第一晶体管的栅极电压耦合到第一有源晶体管的栅极电压。 第一电流被分为第二电流和由第二晶体管支持的第一辅助电流,第二电流被偏置在AB类放大器的期望的共模输出电压上。 第一辅助电流进一步与由第三晶体管支持的第三电流组合,其中第三晶体管被配置为复制第二有源晶体管的特性。 提供了进一步的技术来将第三晶体管的漏极电压设置为接近共模输​​出电压。 本文描述的技术可以用于为AB类放大器中的NMOS和/或PMOS有源晶体管提供偏置电压。
    • 73. 发明授权
    • Driving amplifier circuit with digital control and DC offset equalization
    • 具有数字控制和直流偏移均衡的驱动放大器电路
    • US07786804B2
    • 2010-08-31
    • US12606194
    • 2009-10-27
    • Uday Dasgupta
    • Uday Dasgupta
    • H03F3/26
    • H03F3/45475H03F3/45901H03F2203/45212H03F2203/45216H03F2203/45222H03F2203/45512H03F2203/45644H03F2203/45646H03F2203/45724
    • A driving amplifier circuit includes: a first driver for sourcing a load current to a load; a second driver for sinking the load current from the load; a first operational amplifier (op-amp) for driving the first driver; a second operational amplifier for driving the second driver; a first bias circuit for biasing the first driver; a second bias circuit for biasing the second driver; an enabling circuit for enabling either the first bias circuit or the second bias circuit according to a control signal; a digital control circuit for monitoring currents of the first driver and the second driver to generate the control signal; and an offset equalization circuit, coupled between an internal node of the first operational amplifier and an internal node of the second operational amplifier, for adjusting DC offset of at least one of the first operational amplifier and the second operational amplifier.
    • 驱动放大器电路包括:用于向负载提供负载电流的第一驱动器; 用于从负载中吸收负载电流的第二个驱动器; 用于驱动第一驱动器的第一运算放大器(运算放大器); 用于驱动第二驱动器的第二运算放大器; 用于偏置第一驱动器的第一偏置电路; 用于偏置所述第二驱动器的第二偏置电路; 使能电路,用于根据控制信号启动第一偏置电路或第二偏置电路; 数字控制电路,用于监视第一驱动器和第二驱动器的电流以产生控制信号; 以及偏移均衡电路,耦合在所述第一运算放大器的内部节点和所述第二运算放大器的内部节点之间,用于调整所述第一运算放大器和所述第二运算放大器中的至少一个的DC偏移。
    • 75. 发明申请
    • DRIVING AMPLIFIER CIRCUIT WITH DIGITAL CONTROL
    • 驱动放大器电路与数字控制
    • US20090295482A1
    • 2009-12-03
    • US12131138
    • 2008-06-02
    • Uday DasguptaAlexander Tanzil
    • Uday DasguptaAlexander Tanzil
    • H03F3/26
    • H03F3/303H03F3/45475H03F3/72H03F2203/45648H03F2203/45674H03F2203/45711H03F2203/45724H03F2203/7206
    • A driving amplifier circuit includes: a first driver for souring a load current to a load; a second driver for sinking the load current from the load; a first operational amplifier (op-amp) coupled to a differential input signal for driving the first driver; a second operational amplifier coupled to the differential input signal for driving the second driver; a first bias circuit for biasing the first driver; a second bias circuit for biasing the second driver; an enabling circuit, coupled to the first bias circuit and the second bias circuit, for enabling either the first bias circuit or the second bias circuit according to a control signal; and a digital control circuit, coupled to the enabling circuit, for monitoring currents of the first driver and the second driver to generate the control signal.
    • 驱动放大器电路包括:第一驱动器,用于向负载提供负载电流; 用于从负载中吸收负载电流的第二个驱动器; 耦合到用于驱动第一驱动器的差分输入信号的第一运算放大器(运算放大器); 耦合到用于驱动第二驱动器的差分输入信号的第二运算放大器; 用于偏置第一驱动器的第一偏置电路; 用于偏置所述第二驱动器的第二偏置电路; 耦合到第一偏置电路和第二偏置电路的使能电路,用于根据控制信号实现第一偏置电路或第二偏置电路; 以及耦合到使能电路的数字控制电路,用于监视第一驱动器和第二驱动器的电流以产生控制信号。
    • 77. 发明授权
    • Bypassable low noise amplifier topology with multi-tap transformer
    • 具有多抽头变压器的旁路低噪声放大器拓扑结构
    • US07508260B2
    • 2009-03-24
    • US11941473
    • 2007-11-16
    • Amitava Das
    • Amitava Das
    • H03F1/14H03F3/26
    • H03F1/14H03F1/26H03F1/30H03F1/56H03F1/565H03F3/45179H03F3/72H03F2200/222H03F2200/294H03F2200/372H03F2200/537H03F2203/45731H03G1/0088
    • An amplifier is disclosed that contains a transistor (BJT), a switch (MOSFET), and a transformer. The collector of the BJT is connected to an end of the transformer while the base of the BJT is connected to a point between the ends of the transformer through the MOSFET. When the amplifier is in an active mode in which the amplifier has gain, signals supplied to the amplifier are provided to the transformer through the BJT. When the amplifier is in a bypass mode in which the amplifier does not have gain, signals supplied to the amplifier are provided to the transformer through the MOSFET and the BJT is turned off. The amplifier is designed such that the amplifier characteristics are optimized and then the MOSFET is connected to the transformer such that the input impedance of the amplifier is independent of the mode.
    • 公开了一种包含晶体管(BJT),开关(MOSFET)和变压器的放大器。 BJT的集电极连接到变压器的一端,而BJT的基极通过MOSFET连接到变压器两端之间的点。 当放大器处于放大器有增益的有效模式时,通过BJT将提供给放大器的信号提供给变压器。 当放大器处于放大器不具有增益的旁路模式时,通过MOSFET将提供给放大器的信号提供给变压器,并关闭BJT。 放大器的设计使得放大器特性得以优化,然后MOSFET连接到变压器,使得放大器的输入阻抗与模式无关。
    • 78. 发明申请
    • HIGH-SWING OPERATIONAL AMPLIFIER OUTPUT STAGE USING ADAPTIVE BIASING
    • 使用自适应偏置的高电平运算放大器输出级
    • US20090051431A1
    • 2009-02-26
    • US11844314
    • 2007-08-23
    • Hayg-Taniel DabagDongwon SeoManu Mishra
    • Hayg-Taniel DabagDongwon SeoManu Mishra
    • H03F3/26
    • H03F3/45192H03F1/52H03F1/523H03F3/303H03F2203/30015H03F2203/30084H03F2203/30117H03F2203/45244H03F2203/45626H03F2203/45732
    • An output stage includes two transistors (switching transistor and biasing transistor) coupled in series in a pullup current path between a VDDA node and an output node, and also includes two transistors (switching transistor and biasing transistor) coupled in series in a pulldown current path between the output node and a ground node. Providing the biasing transistors reduces the maximum voltage dropped across the transistors, thereby allowing the transistors to have lower breakdown voltages than VDDA. An adaptive biasing circuit adjusts the gate voltage on a biasing transistor based on the output node voltage. If the output voltage is in a midrange, then the gate voltage is set farther away from a rail voltage in order to reduce voltage stress. If the output voltage is in a range closer to the rail voltage, then the gate voltage is set closer to the rail voltage, thereby facilitating rail-to-rail output voltage swings.
    • 输出级包括在VDDA节点和输出节点之间的上拉电流路径中串联耦合的两个晶体管(开关晶体管和偏置晶体管),并且还包括串联耦合在下拉电流路径中的两个晶体管(开关晶体管和偏置晶体管) 在输出节点和接地节点之间。 提供偏置晶体管降低了跨越晶体管的最大电压,从而允许晶体管具有比VDDA更低的击穿电压。 自适应偏置电路基于输出节点电压来调节偏置晶体管上的栅极电压。 如果输出电压处于中频范围,则栅极电压被设置得更远离轨道电压,以便减小电压应力。 如果输出电压在更接近导轨电压的范围内,则栅极电压被设置为更接近导轨电压,从而便于轨至轨输出电压摆动。
    • 79. 发明授权
    • Amplifier fault detection circuit
    • 放大器故障检测电路
    • US07484139B2
    • 2009-01-27
    • US11316319
    • 2005-12-22
    • Robert Watts
    • Robert Watts
    • G01R31/28G06F7/02H03F3/26H03F1/38H03F1/36H04B1/10
    • H03F3/217H03F1/52H03F2200/331H03F2200/351H03F2200/426
    • An amplifier (1) adapted to receive an input signal and to generate an output signal at an amplifier output (7) according to the input signal, the amplifier (1) comprising: a feedback circuit arranged to provide a feedback signal indicative of the output signal; an error signal generating circuit (12, 44) arranged to receive the feedback signal and generate a digital error signal according to the feedback signal; and an output signal generating circuit arranged to generate the output signal and to receive the digital error signal and to adjust the output signal according to the digital error signal; the amplifier (1) further comprising: a fault detection circuit (50) arranged to receive the digital error signal and to determine the presence or absence of a fault condition at the amplifier output (7) according to the digital error signal and to provide a signal (54) indicative of the presence or absence of the fault condition.
    • 一种适于接收输入信号并根据输入信号在放大器输出(7)产生输出信号的放大器(1),放大器(1)包括:反馈电路,被配置为提供指示输出的反馈信号 信号; 布置成接收反馈信号并根据反馈信号产生数字误差信号的误差信号发生电路(12,44); 以及输出信号生成电路,被配置为产生所述输出信号并接收所述数字误差信号并根据所述数字误差信号调整所述输出信号; 所述放大器(1)还包括:故障检测电路(50),被布置成接收所述数字误差信号并且根据所述数字误差信号确定所述放大器输出(7)处的故障状况的存在或不存在,并且提供 指示故障状况的存在或不存在的信号(54)。