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71. 发明申请

US20040033688A1 ATOMIC LAYER DEPOSITION METHODS 有权
标题翻译：原子层沉积法
公开(公告)号：US20040033688A1
公开(公告)日：2004-02-19
申请号：US10222282
申请日：2002-08-15
发明人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
IPC分类号： H01L021/44 , H01L021/31 , H01L021/469
CPC分类号： H01L21/32051 , C23C16/4404 , C23C16/4405 , C23C16/45531 , C23C16/45534 , H01L21/02178 , H01L21/02186 , H01L21/0228 , H01L21/28562 , H01L21/3141 , H01L21/31616
摘要： The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.
摘要翻译：本发明包括在基板上形成沉积的组合物层的原子层沉积方法。该方法包括将半导体衬底定位在原子层沉积室内。在基材上形成中间组合物单层，随后是与中间体组合物反应所需的沉积组合物，统称为将多种不同的组合物沉积前体流到沉积室内的基底。材料粘附到室内部件表面，从而依次形成。在这种顺序形成之后，反应性气体流入到与多种不同的沉积前体不同的组合物中，并有效地与这种粘附材料反应。在反应气体流动之后，重复这种顺序形成。考虑进一步的实现。

72. 发明申请

US20040029398A1 METHODS OF FORMING GATE OXIDE FILMS IN INTEGRATED CIRCUIT DEVICES USING WET OR DRY OXIDIZATION PROCESSES WITH REDUCED CHLORIDE 有权
标题翻译：使用减少氯化物的湿式或干式氧化工艺在集成电路设备中形成栅极氧化膜的方法
公开(公告)号：US20040029398A1
公开(公告)日：2004-02-12
申请号：US10630101
申请日：2003-07-30
发明人： Kong-soo Lee , Jae-jong Han , Sung-eui Kim
IPC分类号： H01L021/8242 , H01L021/336 , H01L021/31 , H01L021/469
CPC分类号： H01L21/28185 , H01L21/02164 , H01L21/02211 , H01L21/02238 , H01L21/02255 , H01L21/02274 , H01L21/02304 , H01L21/02337 , H01L21/28211 , H01L21/31662 , H01L21/823462 , H01L21/823481 , H01L27/105 , H01L27/10894 , H01L27/11
摘要： Methods of forming gate oxide films in integrated circuit devices using wet or dry oxidization processes with a reduced amount of chloride are disclosed. A gate oxide film is formed on a substrate on an active region adjacent to a trench isolation region in a first gas atmosphere with a first amount of chloride. The gate oxide film is annealed in a second gas atmosphere including a second amount of chloride that is greater than the first amount.
摘要翻译：公开了使用具有减少量的氯化物的湿式或干式氧化方法在集成电路器件中形成栅极氧化膜的方法。在具有第一量氯化物的第一气体气氛中的与沟槽隔离区相邻的有源区上的衬底上形成栅极氧化膜。栅极氧化膜在包括大于第一量的第二量氯化物的第二气体气氛中退火。

73. 发明申请

US20040023512A1 METHOD OF FORMING MULTIPLE OXIDE LAYERS WITH DIFFERENT THICKNESSES IN A LINEAR NITROGEN DOPING PROCESS 有权
标题翻译：在线性氮掺杂过程中形成具有不同厚度的多个氧化物层的方法
公开(公告)号：US20040023512A1
公开(公告)日：2004-02-05
申请号：US10064668
申请日：2002-08-05
发明人： June-Min Yao , Cheng-Shun Chen , Shu-Ya Hsu
IPC分类号： H01L021/336 , H01L021/31 , H01L021/469 , G03F007/20 , G03F007/40 , G03F007/16
CPC分类号： H01L21/26506 , H01L21/3185 , H01L21/823462 , Y10S438/981
摘要： Multiple oxide layers with different thicknesses are formed on a semiconductor substrate with a silicon surface, having a first and second region. A sacrificial oxide layer is formed on the silicon surface to cover both the first region and the second region, with a mask layer formed on the surface of the sacrificial oxide layer. By defining and patterning the mask layer, a first opening and a second opening, having predetermined surface areas, are formed in portions of the first and second regions of the mask layer to expose portions of the. The sacrificial oxide layer has a surface area equal to the first predetermined surface area, and portions of the sacrificial oxide layer having a surface area equal to the second predetermined surface area. A linear nitrogen doping process is then performed to simultaneously implant nitrogen ions with a first and second predetermined concentration into the first and second region, through the first opening and the second opening, respectively. Thereafter, the mask layer and the sacrificial oxide layer are removed, respectively. An oxidation process is performed to two silicon oxide layers with different thicknesses in the first and second regions.
摘要翻译：在具有第一和第二区域的具有硅表面的半导体衬底上形成具有不同厚度的多个氧化物层。牺牲氧化物层形成在硅表面上，以覆盖第一区域和第二区域，掩模层形成在牺牲氧化物层的表面上。通过限定和图案化掩模层，具有预定表面积的第一开口和第二开口形成在掩模层的第一和第二区域的一部分中，以暴露部分。牺牲氧化物层的表面积等于第一预定表面积，牺牲氧化物层的表面积等于第二预定表面积的部分。然后进行线性氮掺杂过程，以分别通过第一开口和第二开口将第一和第二预定浓度的氮离子注入第一和第二区域。此后，分别去除掩模层和牺牲氧化物层。对第一和第二区域中具有不同厚度的两个氧化硅层进行氧化处理。

74. 发明申请

US20040023454A1 Method for utilizing re-oxidation of nitride layer to form super thin nitride gate oxide layer 审中-公开
标题翻译：利用氮化物层的再氧化形成超薄氮化物栅氧化层的方法
公开(公告)号：US20040023454A1
公开(公告)日：2004-02-05
申请号：US10211286
申请日：2002-08-05
发明人： June-Min Yao , Shu-Ya Hsu
IPC分类号： H01L021/8238 , H01L021/336 , H01L021/31
CPC分类号： H01L21/02326 , H01L21/022 , H01L21/02329 , H01L21/02337 , H01L21/28202 , H01L21/3144 , H01L29/511 , H01L29/513 , H01L29/518
摘要： The present invention generally relates to provides a method for utilizing a re-oxidation step of a nitride layer to form a super thin nitride gate oxide layer. First, an oxide layer or a nitride oxide layer provided with a high nitrogen contain and a very thin thickness is growing on a semiconductor substrate, wherein the oxide layer can be provided with a large quantity nitrogen element by a nitrogen-penetrating treatment. Then, a second oxide layer is growing by a rapidly thermal step. Since in the second time to perform the oxidation of the substrate, the oxygen atom must penetrate the nitrogenized oxide layer to perform the oxidation with the substrate, so the present invention can decrease the oxidation rate and obtain a dense gate oxide layer with a good interface performance. The present invention can improve the disadvantage of too fast oxidation rate of the super thin gate oxide layer process and overcome the disadvantage of the difficult for obtaining a uniform and dense oxide layer.
摘要翻译：本发明一般涉及一种利用氮化物层的再氧化步骤形成超薄氮化物栅氧化层的方法。首先，在半导体衬底上生长具有高氮含量和非常薄的厚度的氧化物层或氮化物氧化物层，其中通过氮渗透处理可以为氧化物层提供大量的氮元素。然后，通过快速热步骤生长第二氧化物层。由于第二次进行基板的氧化，所以氧原子必须穿透氮化的氧化物层以进行与基板的氧化，因此本发明可以降低氧化速率并获得具有良好界面的致密的栅极氧化物层性能。本发明可以改善超薄栅极氧化层工艺的太快氧化速度的缺点，克服难以获得均匀且致密的氧化物层的缺点。

75. 发明申请

US20040018452A1 Method of treatment of porous dielectric films to reduce damage during cleaning 失效
标题翻译：处理多孔电介质膜以减少清洁过程中的损伤的方法
公开(公告)号：US20040018452A1
公开(公告)日：2004-01-29
申请号：US10412121
申请日：2003-04-11
发明人： Paul Schilling
IPC分类号： G03F007/20 , G03F007/40 , H01L021/311 , H01L021/31 , H01L021/469 , C25F001/00 , C25F003/30 , C25F005/00 , B08B006/00
CPC分类号： H01L21/02126 , B08B7/0021 , C03C15/00 , C03C17/30 , C03C23/0075 , C23C8/10 , C23C26/00 , C23C30/00 , G03F7/422 , G03F7/423 , H01L21/02343 , H01L21/3105 , H01L21/31058 , H01L21/31116 , H01L21/3121 , H01L21/3125 , H01L21/316 , H01L21/31629 , H01L21/31633 , H01L21/31695 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A device, method, and system for treating low-k dielectric material films to reduce damage during microelectronic component cleaning processes is disclosed. The current invention cleans porous low-k dielectric material films in a highly selectivity with minimal dielectric material damage by first treating microelectronic components to a passivating process followed by a cleaning solution process.
摘要翻译：公开了一种用于处理低k电介质材料膜以减少微电子部件清洁过程中的损伤的装置，方法和系统。本发明通过首先将微电子部件处理成钝化过程，然后进行清洁溶液处理，以极高的选择性清洁多孔低k电介质材料膜，同时具有最小的介电材料损伤。

76. 发明申请

US20030236001A1 Fabrication process of a semiconductor device 失效
标题翻译：半导体器件的制造工艺
公开(公告)号：US20030236001A1
公开(公告)日：2003-12-25
申请号：US10457450
申请日：2003-06-10
申请人： Tokyo Electron Limited
发明人： Hiroshi Shinriki , Kazumi Kubo
IPC分类号： H01L021/00 , H01L021/31 , H01L021/469
CPC分类号： H01L21/28194 , C23C16/0272 , C23C16/405 , H01L21/0214 , H01L21/02164 , H01L21/022 , H01L21/02271 , H01L21/02356 , H01L21/28202 , H01L21/31604 , H01L21/31612 , H01L28/56 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A method of fabrication a semiconductor device includes the steps of forming an insulation film containing Si and oxygen on a silicon substrate, and depositing a metal oxide film on the insulation film by a chemical vapor deposition process that uses a metal organic source material, wherein the step of depositing the metal oxide film is conducted such that the metal oxide film takes a crystalline state immediately after the deposition step.
摘要翻译：制造半导体器件的方法包括以下步骤：在硅衬底上形成含有Si和氧的绝缘膜，并通过使用金属有机源材料的化学气相沉积工艺在绝缘膜上沉积金属氧化物膜，其中进行沉积金属氧化物膜的步骤，使得金属氧化物膜在沉积步骤之后立即呈结晶状态。

77. 发明申请

US20030235972A1 Thermal processing method and thermal processing apparatus for substrated employing photoirradiation 有权
标题翻译：热处理方法和使用光照射的底层热处理装置
公开(公告)号：US20030235972A1
公开(公告)日：2003-12-25
申请号：US10460292
申请日：2003-06-11
申请人： Dainippon Screen Mfg. Co., Ltd.
发明人： Akihiro Hosokawa
IPC分类号： A61N005/00 , G21G005/00 , H01L021/425 , H01L021/31 , H01L021/469
CPC分类号： H01L21/67115 , G21K5/04 , H01L21/2686
摘要： Each of a plurality of flash lamps forming a light source is a bar lamp having an elongated cylindrical shape. The ratio of the distance between the flash lamps and a semiconductor wafer to the distance between the flash lamps and a reflector is set to not more than 1.8 or at least 2.2. Consequently, illuminance is weakened on portions of the main surface of the semiconductor wafer located immediately under the flash lamps along the vertical direction and strengthened in portions located immediately under the clearances between adjacent ones of the flash lamps along the vertical direction, thereby reducing illuminance irregularity on the overall main surface of the semiconductor wafer and improving in-plane uniformity of temperature distribution on the semiconductor wafer. Thus, a thermal processing apparatus capable of improving in-plane uniformity of temperature distribution on a substrate is provided.
摘要翻译：形成光源的多个闪光灯中的每一个都是具有细长圆柱形状的条形灯。闪光灯与半导体晶片之间的距离与闪光灯与反射器之间的距离的比率设定为不大于1.8或至少2.2。因此，沿着垂直方向位于闪光灯正下方的半导体晶片的主表面的部分上的照度被削弱，并且在垂直方向上位于相邻闪光灯之间的间隙正下方的部分被加强，由此减小照度不均匀在半导体晶片的整个主表面上，提高半导体晶片上的温度分布的面内均匀性。因此，提供能够提高基板上的温度分布的面内均匀性的热处理装置。

78. 发明申请

US20030232510A1 Dielectric film 失效
标题翻译：电介质膜
公开(公告)号：US20030232510A1
公开(公告)日：2003-12-18
申请号：US10460310
申请日：2003-06-13
发明人： Keith Edward Buchanan , Joon-Chai Yeoh
IPC分类号： H01L021/31 , H01L021/469 , H01L021/302
CPC分类号： H01L21/3105 , H01L21/02126 , H01L21/02203 , H01L21/31116 , H01L21/31138 , H01L21/31633 , H01L21/31695 , H01L21/76802 , H01L21/76843
摘要： A low k porous dielectric film is described wherein the exposed surface or surfaces of the film are substantially non-porous. A densification method is described for treating such exposed surfaces to render porous surfaces non-porous.
摘要翻译：描述了一种低k多孔介电膜，其中所述膜的暴露表面或表面基本上是无孔的。描述了用于处理这种暴露表面以使多孔表面无孔的致密化方法。

79. 发明申请

US20030232506A1 System and method for forming a gate dielectric 失效
标题翻译：用于形成栅极电介质的系统和方法
公开(公告)号：US20030232506A1
公开(公告)日：2003-12-18
申请号：US10256563
申请日：2002-09-27
申请人： Applied Materials, Inc.
发明人： Craig R. Metzner , Shreyas S. Kher , Shixue Han
IPC分类号： H01L021/336 , H01L021/3205 , H01L021/4763 , H01L021/469 , H01L021/31
CPC分类号： H01L21/02307 , C23C14/083 , C23C14/10 , C23C14/5806 , C23C14/5826 , C23C14/5853 , C23C14/586 , C23C16/0218 , C23C16/0227 , C23C16/405 , C23C16/56 , H01L21/02148 , H01L21/02181 , H01L21/022 , H01L21/02205 , H01L21/02271 , H01L21/02337 , H01L21/28194 , H01L21/3141 , H01L21/3143 , H01L21/31604 , H01L21/31612 , H01L21/3162 , H01L21/31645 , H01L21/31683 , H01L29/517 , H01L29/78
摘要： A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydroflouric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NH3 in a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH3, forming the stack after the pre-treating, and providing a flow of N2 in a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming. The pre-treating includes providing an inert gas flow in a process zone surrounding the HF-last surface, reacting hydrogen with an oxidizer in the process zone for a very short duration, and providing an inert gas flew in the process zone after the reacting.
摘要翻译：在预处理表面上形成电介质叠层的方法。该方法包括预先清洁半导体晶片以除去天然氧化物，例如通过施加氢氟酸以形成HF-最后的表面，用臭氧化的去离子水预处理HF-最后的表面，在预处理表面，并在围绕晶片的工艺区域中提供NH 3流。或者，该方法包括用NH 3预处理HF-最后表面，在预处理之后形成堆叠，并且在成形之后在晶片周围的处理区域中提供N2流。该方法还包括使用原位蒸汽产生过程预处理HF-最后的表面，在预处理的表面上形成叠层，以及在成形后退火晶片。预处理包括在围绕HF最后表面的处理区域中提供惰性气体流，使处理区中的氢与氧化剂反应非常短的时间，并且在反应之后在处理区中提供惰性气体。

80. 发明申请

US20030232284A1 Method of forming a system on chip 审中-公开
标题翻译：形成片上系统的方法
公开(公告)号：US20030232284A1
公开(公告)日：2003-12-18
申请号：US10064113
申请日：2002-06-12
发明人： Chien-Hung Liu , Shyi-Shuh Pan , Shou-Wei Huang , Ying-Tso Chen , Erh-Kun Lai
IPC分类号： G03F007/16 , G03F007/20 , G03F007/40 , H01L021/20 , H01L021/36 , H01L021/425 , H01L021/311 , H01L021/31 , H01L021/469
CPC分类号： H01L27/11568 , H01L21/823418 , H01L21/823481 , H01L27/105 , H01L27/11573
摘要： A method of forming a system on chip(SOC) comprising read only memory(ROM) and nitride read only memory(NROM) by utilizing nitride read only memory. The method is to form a plurality of field oxide layers on a surface of a substrate in order to define an active area of each device. An ONO dielectric layer is then formed on the surface of the substrate, thereafter performing a photolithography and ion implantation process to form a plurality of N-type bit lines and P-type pocket doping areas in the substrate inside the memory area. After that, an etching process is performed in order to remove regions of the ONO dielectric layer in the periphery area and regions of the ONO dielectric layer in the memory area, optionally. After that, a thermal oxidation process is utilized in order to form a buried drain oxide layer atop each bit line and a gate oxide layer on the surface of the active area in the periphery area, respectively. Then, a polysilicon layer is deposited on the surface of the substrate and a photolithography and etching process are utilized in order to simultaneously form a word line in the memory area and the gates of the periphery transistor in the periphery area. Finally, a ROM code process is performed to adjust the threshold voltage of the high threshold voltage(high Vth) device in the read only memory area.
摘要翻译：通过利用氮化物只读存储器形成包括只读存储器（ROM）和氮化物只读存储器（NROM）的片上系统（SOC）的方法。该方法是在衬底的表面上形成多个场氧化物层，以便限定每个器件的有效面积。然后在衬底的表面上形成ONO电介质层，然后进行光刻和离子注入工艺，以在存储区域内的衬底中形成多个N型位线和P型口袋掺杂区域。之后，进行蚀刻处理，以便可选地除去存储区域中的ONO介电层的周边区域和区域中的ONO电介质层的区域。之后，利用热氧化工艺，以分别在周边区域的有源区域的表面上的每个位线和栅极氧化物层的顶部形成掩埋的漏极氧化层。然后，在衬底的表面上沉积多晶硅层，并利用光刻和蚀刻工艺，以便在周边区域的存储区域和外围晶体管的栅极中同时形成字线。最后，执行ROM代码处理以在只读存储器区域中调整高阈值电压（高Vth）器件的阈值电压。

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