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71. 发明授权

US07622995B2 Negative-feedback type ultra-wideband signal amplification circuit 有权
标题翻译：负反馈型超宽带信号放大电路
公开(公告)号：US07622995B2
公开(公告)日：2009-11-24
申请号：US12142550
申请日：2008-06-19
申请人： Wei-Yang Lee , Jean-Fu Kiang
发明人： Wei-Yang Lee , Jean-Fu Kiang
IPC分类号： H03F1/08
CPC分类号： H03F1/342 , H03F1/223 , H03F1/42 , H03F3/195 , H03F2200/144 , H03F2200/225 , H03F2200/294 , H03F2200/36 , H03F2200/411 , H03F2200/451 , H03F2200/54
摘要： A negative-feedback type ultra-wideband signal amplification circuit is proposed, which is designed for integration to an ultra-wideband (UWB) signal processing circuit system for providing a low-noise amplification function to UWB signals. The proposed circuit architecture is characterized by the provision of a dual-step filter circuit on the input side, the provision of a resistive-type feedback circuit in the transistor-based amplification circuitry, and the provision of a common-source transistor-based amplification circuit on the output side. These features allow the proposed signal amplification circuit to have flat power gain, lower power consumption, low noise figure, and higher operational stability.
摘要翻译：提出了一种负反馈型超宽带信号放大电路，其被设计用于集成到用于向UWB信号提供低噪声放大功能的超宽带（UWB）信号处理电路系统。所提出的电路架构的特征在于在输入侧提供双级滤波器电路，在基于晶体管的放大电路中提供电阻型反馈电路，以及提供基于共源的基于晶体管的放大电路在输出端。这些特征使得所提出的信号放大电路具有平坦的功率增益，更低的功耗，低噪声系数和更高的操作稳定性。

72. 发明授权

US07613239B2 Digital signal offset adjusting apparatus and pulse pattern generator using the same 失效
标题翻译：数字信号偏移调整装置及使用其的脉冲图案发生器
公开(公告)号：US07613239B2
公开(公告)日：2009-11-03
申请号：US10579385
申请日：2005-09-29
申请人： Satoru Shiratsuchi , Kazuhiro Fujinuma , Sumio Saito
发明人： Satoru Shiratsuchi , Kazuhiro Fujinuma , Sumio Saito
IPC分类号： H03K7/04
CPC分类号： H04L1/24 , H03F1/3211 , H03F1/42 , H03F3/45475 , H03F3/45968 , H03F2203/45526 , H03F2203/45532 , H03F2203/45554 , H03F2203/45588 , H03F2203/45638 , H03F2203/45681
摘要： A digital signal offset adjusting apparatus has a capacitor causing an output terminal to pass a high frequency band of an input digital signal. A first coil has one end connected to an input terminal and a second coil has one end connected to an output. An operational amplifier has an input connected to another end of the first coil, a second input connected to a direct current voltage generator and an output connected to another end of the second coil. The operational amplifier outputs a signal obtained by subtracting and combining the low frequency band, the direct current component and a direct current bias voltage. A frequency characteristic compensating circuit is connected between a reference point and the second input of the operational amplifier. The gain of the operational amplifier increases with a component having a higher frequency from among low frequency bands of the input digital signal.
摘要翻译：数字信号偏移调整装置具有使输出端子通过输入数字信号的高频带的电容器。第一线圈的一端连接到输入端子，第二线圈的一端连接到输出端。运算放大器具有连接到第一线圈的另一端的输入端，连接到直流电压发生器的第二输入端和连接到第二线圈另一端的输出端。运算放大器输出通过减去和组合低频带，直流分量和直流偏置电压而获得的信号。频率特性补偿电路连接在运算放大器的参考点和第二输入端之间。运算放大器的增益随着输入数字信号的低频带中具有较高频率的分量而增加。

73. 发明申请

US20090184769A1 NEGATIVE-FEEDBACK TYPE ULTRA-WIDEBAND SIGNAL AMPLIFICATION CIRCUIT 有权
标题翻译：负反馈型超宽带信号放大电路
公开(公告)号：US20090184769A1
公开(公告)日：2009-07-23
申请号：US12142550
申请日：2008-06-19
申请人： Wei-Yang Lee , Jean-Fu Kiang
发明人： Wei-Yang Lee , Jean-Fu Kiang
IPC分类号： H03F1/34
CPC分类号： H03F1/342 , H03F1/223 , H03F1/42 , H03F3/195 , H03F2200/144 , H03F2200/225 , H03F2200/294 , H03F2200/36 , H03F2200/411 , H03F2200/451 , H03F2200/54
摘要： A negative-feedback type ultra-wideband signal amplification circuit is proposed, which is designed for integration to an ultra-wideband (UWB) signal processing circuit system for providing a low-noise amplification function to UWB signals. The proposed circuit architecture is characterized by the provision of a dual-step filter circuit on the input side, the provision of a resistive-type feedback circuit in the transistor-based amplification circuitry, and the provision of a common-source transistor-based amplification circuit on the output side. These features allow the proposed signal amplification circuit to have flat power gain, lower power consumption, low noise figure, and higher operational stability.
摘要翻译：提出了一种负反馈型超宽带信号放大电路，其被设计用于集成到用于向UWB信号提供低噪声放大功能的超宽带（UWB）信号处理电路系统。所提出的电路架构的特征在于在输入侧提供双级滤波器电路，在基于晶体管的放大电路中提供电阻型反馈电路，以及提供基于共源的基于晶体管的放大电路在输出端。这些特征使得所提出的信号放大电路具有平坦的功率增益，更低的功耗，低噪声系数和更高的操作稳定性。

74. 发明申请

US20090179705A1 IMPEDANCE-MAPPING AMPLIFIER CIRCUIT WITH EXCLUSIVELY REACTIVE NEGATIVE FEEDBACK 有权
标题翻译：具有独特反应性负反馈的阻抗映射放大器电路
公开(公告)号：US20090179705A1
公开(公告)日：2009-07-16
申请号：US12331512
申请日：2008-12-10
申请人： Ralph Oppelt , Markus Vester
发明人： Ralph Oppelt , Markus Vester
IPC分类号： H03F1/00
CPC分类号： H03F1/34 , H03F1/26 , H03F1/42 , H03F1/56 , H03F3/195 , H03F2200/147 , H03F2200/36 , H03F2200/372
摘要： An amplifier circuit has a transistor element that has an input terminal, an output terminal) and a third terminal. An input signal to be amplified is supplied to the input terminal. The amplified input signal is emitted as an output signal at the output terminal. The input terminal is connected with the output terminal via a first reactance. The third terminal is connected via a second reactance with a zero potential. One of the reactances is fashioned as an inductor and the other of the reactances is fashioned as a capacitor. An inductance value of the inductor and a capacitance value of the capacitor are dimensioned such that the quotient of the inductance value of the inductor and the capacitance value of the capacitor is equal to the product of a desired input impedance that is effective at the input terminal and an output impedance associated with the output impedance. Based on this dimensioning, the output impedance associated with the output terminal is mapped to the input terminal at the same level or scaled.
摘要翻译：放大器电路具有晶体管元件，其具有输入端子，输出端子）和第三端子。要放大的输入信号被提供给输入端。放大的输入信号作为输出端子处的输出信号发出。输入端通过第一电抗与输出端连接。第三端子经由具有零电位的第二电抗连接。其中一个电抗被形成为一个电感，另一个是电抗器。电感器的电感值和电容器的电容值被设定为使得电感器的电感值和电容器的电容值的商数等于在输入端子处有效的期望的输入阻抗的乘积以及与输出阻抗相关联的输出阻抗。基于此尺寸，与输出端子相关联的输出阻抗被映射到相同电平或缩放的输入端子。

75. 发明申请

US20090140807A1 DIFFERENTIAL AMPLIFIER CIRCUIT 审中-公开
标题翻译：差分放大器电路
公开(公告)号：US20090140807A1
公开(公告)日：2009-06-04
申请号：US12046558
申请日：2008-03-12
申请人： Jun Takasoh , Norio Higashisaka
发明人： Jun Takasoh , Norio Higashisaka
IPC分类号： H03F3/45
CPC分类号： H03F3/45085 , H03F1/42 , H03F2200/36 , H03F2203/45638 , H03F2203/45702
摘要： A differential amplifier circuit has first and second transistors composing a differential pair; a first inductor connected between the output terminal of the first transistor and a power source; a second inductor connected between the output terminal of the second transistor and the power source; a first transmission gate connected in series with the first inductor; and a second transmission gate connected in series with the second inductor.
摘要翻译：差分放大器电路具有构成差分对的第一和第二晶体管; 连接在第一晶体管的输出端和电源之间的第一电感器; 连接在第二晶体管的输出端和电源之间的第二电感器; 与第一电感器串联连接的第一传输栅极; 以及与第二电感器串联连接的第二传输栅极。

76. 发明授权

US07498843B2 Current-controlled CMOS circuits with inductive broadbanding 有权
标题翻译：带电感宽带的电流控制CMOS电路
公开(公告)号：US07498843B2
公开(公告)日：2009-03-03
申请号：US11343322
申请日：2006-01-31
申请人： Michael M. Green
发明人： Michael M. Green
IPC分类号： H03K19/094
CPC分类号： H03F1/42 , H03F3/45183 , H03F3/72 , H03F2200/36 , H03F2203/45506 , H03F2203/45631 , H03F2203/45638 , H03F2203/45702 , H03F2203/45704 , H03F2203/7203 , H03K17/04163 , H03K17/693 , H03K19/01707 , H03K19/09432
摘要： Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic with inductive broadbanding fabricated in conventional CMOS process technology. Optimum balance between power consumption and speed for each circuit application is achieved by combining high speed C3MOS logic with inductive broadbanding/C3MOS logic with low power conventional CMOS logic. The combined C3MOS logic with inductive broadbanding/C3MOS/CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems.
摘要翻译：用于实现超高速电路的各种电路技术使用以常规CMOS工艺技术制造的感应宽带的电流控制CMOS（C3MOS）逻辑。通过将高速C3MOS逻辑与感应宽带/ C3MOS逻辑与低功耗常规CMOS逻辑相结合，实现了每个电路应用的功耗和速度之间的最佳平衡。具有感应宽带/ C3MOS / CMOS逻辑的组合C3MOS逻辑允许更多地集成诸如光纤通信系统中使用的高速收发器之类的电路。

77. 发明申请

US20080290937A1 Constant gain amplifier system with positive and negative feedback 有权
标题翻译：具有正和负反馈的恒定增益放大器系统
公开(公告)号：US20080290937A1
公开(公告)日：2008-11-27
申请号：US12151294
申请日：2008-05-06
申请人： Fred A. Mirow
发明人： Fred A. Mirow
IPC分类号： H03G3/30
CPC分类号： H03F1/42 , H03F1/34 , H03F2200/36 , H03G3/00 , H03G3/20
摘要： Constant and accurate signal gain systems based on controlling oscillator loop gain. A constant gain positive feedback network and an amplifier form an oscillator. Only when the oscillator loop gain is at least one does the oscillator produces an AC signal. Negative feedback of the oscillator's AC signal level is used to keep the loop gain close to or at the value of one by controlling the loop gain of the oscillator circuit. By maintaining the loop gain of the oscillator circuit substantially constant the signal gain is also maintained substantially constant.
摘要翻译：基于控制振荡器环路增益的恒定和准确的信号增益系统。恒定增益正反馈网络和放大器形成振荡器。只有当振荡器环路增益至少为1时，振荡器产生一个AC信号。通过控制振荡器电路的环路增益，振荡器的交流信号电平的负反馈用于保持环路增益接近或达到一个值。通过保持振荡器电路的环路增益基本上恒定，信号增益也保持基本恒定。

78. 发明授权

US07400196B2 Ultra wide band, differential input/output, high frequency amplifier in an integrated circuit 有权
标题翻译：超宽带，差分输入/输出，集成电路中的高频放大器
公开(公告)号：US07400196B2
公开(公告)日：2008-07-15
申请号：US11504431
申请日：2006-08-15
申请人： Michael A. Wyatt
发明人： Michael A. Wyatt
IPC分类号： H03F3/18
CPC分类号： H03F3/195 , H03F1/42 , H03F3/45085 , H03F3/45475 , H03F3/45497 , H03F3/45941 , H03F2200/36 , H03F2203/45178 , H03F2203/45352 , H03F2203/45418 , H03F2203/45434 , H03F2203/45576 , H03F2203/45596 , H03F2203/45601 , H03F2203/45622 , H03F2203/45638 , H03F2203/45696
摘要： A wide band amplifier includes a core amplifier having input terminals and output terminals for, respectively, receiving differential input signals and providing amplified differential output signals. A bandwidth peaking network is coupled to the core amplifier and includes (a) a first coil and a first resistor connected in series and (b) a second coil and a second resistor connected in series. The first coil and resistor and the second coil and resistor, respectively, are coupled to the core amplifier for receiving the amplified differential output signals. The bandwidth peaking network is configured to increase the frequency bandwidth of the amplifier. The bandwidth peaking network includes (a) a first node formed between the first coil and resistor, (b) a second node formed between the second coil and resistor, and (c) a third resistor is connected between the first node and the second node. This resistor is free of current flow at low frequency operation of the amplifier.
摘要翻译：宽带放大器包括具有输入端的核心放大器和用于分别接收差分输入信号并提供放大的差分输出信号的输出端。带宽峰化网络耦合到核心放大器，并且包括（a）串联连接的第一线圈和第一电阻器，以及串联连接的第二线圈和第二电阻器。第一线圈和电阻器以及第二线圈和电阻器分别耦合到核心放大器以接收放大的差分输出信号。带宽峰化网络被配置为增加放大器的频率带宽。带宽峰化网络包括（a）形成在第一线圈和电阻器之间的第一节点，（b）形成在第二线圈和电阻器之间的第二节点，以及（c）第三电阻器连接在第一节点和第二节点之间。该放大器的低频工作时，该电阻没有电流流动。

79. 发明授权

US07362174B2 Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection 有权
标题翻译：电流控制CMOS（C3MOS）宽带输入数据放大器，用于降低差分和共模反射
公开(公告)号：US07362174B2
公开(公告)日：2008-04-22
申请号：US11320402
申请日：2005-12-28
申请人： Jun Cao
发明人： Jun Cao
IPC分类号： H03F3/45
CPC分类号： H03F3/601 , C08G61/02 , C08G61/124 , C08G61/126 , C09K11/06 , C09K2211/1416 , C09K2211/1425 , C09K2211/1433 , C09K2211/145 , C09K2211/1458 , C09K2211/1466 , C09K2211/1483 , C09K2211/1491 , C09K2211/186 , H01L51/0039 , H01L51/0052 , H01L51/0053 , H01L51/0054 , H01L51/0056 , H01L51/0059 , H01L51/0067 , H01L51/0068 , H01L51/0071 , H01L51/0081 , H01L51/0095 , H01L51/5293 , H03F1/42 , H03F3/195 , H03F3/45183 , H03F3/45632 , H03F3/45704 , H03F2200/36 , H03F2203/45084 , H03F2203/45118 , H03F2203/45296 , H03F2203/45318 , H03F2203/45332 , H03F2203/45418 , H03F2203/45466 , H03F2203/45512 , H03F2203/45548 , H03F2203/45554 , H03F2203/45638 , H03F2203/45702 , H05B33/14
摘要： Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection. Impedance matching and bandwidth extension provides desired gain at higher frequencies and may be achieved at the interface between silicon and package and/or circuit board within various integrated circuits that may be employed within communication devices. In some instances, a differential transistor pair is employed that also includes Miller capacitors coupled between the gate of one transistor of the differential transistor pair to the drain of the other transistor of the differential transistor pair. This can also include series load connected resistors and inductors coupled between the respective drains of the transistors of the differential transistor pair to a power supply voltage. Also, series connected input inductors may also couple to the gates of the transistors of the differential transistor pair.
摘要翻译：电流控制CMOS（C3MOS）宽带输入数据放大器，用于降低差分和共模反射。阻抗匹配和带宽扩展在较高频率下提供期望的增益，并且可以在可以在通信设备中使用的各种集成电路内的硅和封装和/或电路板之间的接口处实现。在一些情况下，使用差分晶体管对，其还包括耦合在差分晶体管对的一个晶体管的栅极与差分晶体管对的另一个晶体管的漏极之间的米勒电容器。这还可以包括串联负载连接的电阻器和电感器，该电阻器和电感器耦合在差分晶体管对的晶体管的相应的漏极之间到电源电压。此外，串联的输入电感器也可以耦合到差分晶体管对的晶体管的栅极。

80. 发明申请

US20080018405A1 Ultra wide band, differential input/output, high frequency amplifier in an integrated circuit 有权
公开(公告)号：US20080018405A1
公开(公告)日：2008-01-24
申请号：US11504431
申请日：2006-08-15
申请人： Michael A. Wyatt
发明人： Michael A. Wyatt
IPC分类号： H03F3/04
CPC分类号： H03F3/195 , H03F1/42 , H03F3/45085 , H03F3/45475 , H03F3/45497 , H03F3/45941 , H03F2200/36 , H03F2203/45178 , H03F2203/45352 , H03F2203/45418 , H03F2203/45434 , H03F2203/45576 , H03F2203/45596 , H03F2203/45601 , H03F2203/45622 , H03F2203/45638 , H03F2203/45696
摘要： A wide band amplifier includes a core amplifier having input terminals and output terminals for, respectively, receiving differential input signals and providing amplified differential output signals. A bandwidth peaking network is coupled to the core amplifier and includes (a) a first coil and a first resistor connected in series and (b) a second coil and a second resistor connected in series. The first coil and resistor and the second coil and resistor, respectively, are coupled to the core amplifier for receiving the amplified differential output signals. The bandwidth peaking network is configured to increase the frequency bandwidth of the amplifier. The bandwidth peaking network includes (a) a first node formed between the first coil and resistor, (b) a second node formed between the second coil and resistor, and (c) a third resistor is connected between the first node and the second node. This resistor is free of current flow at low frequency operation of the amplifier.

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