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71. 发明申请

US20070114608A1 Lateral thin-film soi device having a field plate with isolated metallic regions 有权
标题翻译：具有带隔离金属区域的场板的横向薄膜设备
公开(公告)号：US20070114608A1
公开(公告)日：2007-05-24
申请号：US10574065
申请日：2004-09-27
申请人： Theodore Letavic
发明人： Theodore Letavic
IPC分类号： H01L27/12
CPC分类号： H01L29/78624 , H01L29/404 , H01L29/405 , H01L29/41733 , H01L29/7835
摘要： In a lateral thin-film Silicon-On-Insulator (SOI) device, a field plate is provided to extend substantially over a lateral drift region to protect the device from package and surface charge effects. In particular, the field plate comprises a layer of plural metallic regions which are isolated laterally from one another by spacing so as to assume a lateral electric field profile which is established by a volume doping gradient in the silicon drift region.
摘要翻译：在横向薄膜绝缘体上硅（SOI）器件中，提供场板基本上在横向漂移区域上延伸以保护器件免受封装和表面电荷的影响。特别地，场板包括多个金属区域的层，它们通过间隔彼此侧向隔离，以便呈现通过硅漂移区域中的体积掺杂梯度建立的横向电场分布。

72. 发明申请

US20070114532A1 SEMICONDUCTOR DISPLAY DEVICE 有权
标题翻译：半导体显示设备
公开(公告)号：US20070114532A1
公开(公告)日：2007-05-24
申请号：US11625930
申请日：2007-01-23
申请人： Shunpei Yamazaki , Jun Koyama
发明人： Shunpei Yamazaki , Jun Koyama
IPC分类号： H01L29/04
CPC分类号： H01L27/1214 , G09G3/2018 , G09G3/2022 , G09G3/3233 , G09G3/3258 , G09G3/3275 , G09G2300/0426 , G09G2300/0809 , G09G2300/0819 , G09G2300/0861 , G09G2310/027 , G09G2320/0285 , G09G2320/029 , G09G2320/043 , G09G2320/045 , G09G2330/021 , G09G2360/142 , G09G2360/145 , G09G2360/148 , G09G2360/16 , H01L27/14678 , H01L27/3211 , H01L27/3246 , H01L27/3269 , H01L27/3295 , H01L29/4908 , H01L29/78624 , H01L51/5271 , H01L2251/5315
摘要： To provide a semiconductor display device capable of displaying an image having clarity and a desired color, even when the speed of deterioration of an EL layer is influenced by its environment. Display pixels and sensor pixels of an EL display each have an EL element, and the sensor pixels each have a diode. The luminance of the EL elements of each in the display pixels is controlled in accordance with the amount of electric current flowing in each of the diodes.
摘要翻译：为了提供能够显示具有清晰度和期望颜色的图像的半导体显示装置，即使当EL层的劣化速度受其环境的影响时。 EL显示器的显示像素和传感器像素各自具有EL元件，并且传感器像素各自具有二极管。根据在每个二极管中流动的电流量来控制显示像素中的每一个的EL元件的亮度。

73. 发明申请

US20070102713A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070102713A1
公开(公告)日：2007-05-10
申请号：US11615151
申请日：2006-12-22
申请人： Shunpei Yamazaki , Jun Koyama
发明人： Shunpei Yamazaki , Jun Koyama
IPC分类号： H01L31/12 , H01L27/15 , H01L33/00 , H01L29/16
CPC分类号： H01L29/66757 , H01L27/12 , H01L27/1248 , H01L29/42384 , H01L29/4908 , H01L29/78621 , H01L29/78624 , H01L29/78633 , H01L29/78636 , H01L2029/7863
摘要： OFF current of a TFT is reduced. There is provided a semiconductor device comprising: a substrate; a shielding film formed so as to be in contact with the substrate; a planarization insulating film formed on the substrate so as to cover the shielding film; and a semiconductor layer formed so as to be in contact with the planarization insulating film. The semiconductor device is characterized in that the shielding film overlaps the semiconductor layer with the planarization insulating film sandwiched therebetween, and that the planarization insulating film is polished by CMP before the semiconductor layer is formed.
摘要翻译： TFT的OFF电流降低。提供一种半导体器件，包括：衬底; 形成为与基板接触的屏蔽膜; 形成在所述基板上以覆盖所述屏蔽膜的平坦化绝缘膜; 以及形成为与平坦化绝缘膜接触的半导体层。半导体器件的特征在于，屏蔽膜与夹在其间的平坦化绝缘膜的半导体层重叠，并且在形成半导体层之前通过CMP对平坦化绝缘膜进行抛光。

74. 发明申请

US20070080395A1 Lateral SOI component having a reduced on resistance 有权
标题翻译：具有降低导通电阻的横向SOI元件
公开(公告)号：US20070080395A1
公开(公告)日：2007-04-12
申请号：US11527760
申请日：2006-09-26
申请人： Uwe Wahl , Ralf Rudolf , Dirk Priefert
发明人： Uwe Wahl , Ralf Rudolf , Dirk Priefert
IPC分类号： H01L29/76
CPC分类号： H01L29/78624 , H01L29/0623 , H01L29/0692 , H01L29/0878 , H01L29/402 , H01L29/404 , H01L29/407 , H01L29/7803 , H01L29/7808 , H01L29/7818 , H01L29/7824 , H01L29/78639 , H01L29/861
摘要： An SOI semiconductor component comprises a semiconductor substrate having a basic doping, a dielectric layer arranged on the semiconductor substrate, and a semiconductor layer arranged on the dielectric layer. The semiconductor layer includes a drift zone of a first conduction type, a junction between the drift zone and a further component zone which is configured in such a way that a space charge zone is formed in the drift zone when a reverse voltage is applied to the junction, and a terminal zone adjacent to the drift zone. A first terminal electrode is connected to the further component zone, and a second terminal electrode is connected to the terminal zone. In the semiconductor substrate a first semiconductor zone is doped complementarily with respect to a basic doping of the semiconductor substrate, and the first terminal electrode is connected to the first semiconductor zone. A rectifier element is connected between the first terminal electrode and the first semiconductor zone.
摘要翻译： SOI半导体部件包括具有基本掺杂的半导体衬底，布置在半导体衬底上的电介质层和布置在电介质层上的半导体层。半导体层包括第一导电类型的漂移区域，漂移区域和另一组件区域之间的结，该区域构造成使得当反向电压施加到漂移区域时在漂移区域中形成空间电荷区域结和与漂移区相邻的终端区。第一端子电极连接到另一组件区域，并且第二端子电极连接到端子区域。在半导体衬底中，第一半导体区相对于半导体衬底的基本掺杂互补地掺杂，并且第一端电极连接到第一半导体区。整流元件连接在第一端子电极和第一半导体区域之间。

75. 发明授权

US07202096B2 Control TFT for OLED display 有权
标题翻译：用于OLED显示器的控制TFT
公开(公告)号：US07202096B2
公开(公告)日：2007-04-10
申请号：US11178940
申请日：2005-07-11
申请人： Kun-Hong Chen
发明人： Kun-Hong Chen
IPC分类号： H01L21/66 , H01L21/00 , H01L21/84 , H01L21/336
CPC分类号： H01L29/66757 , G09G3/3208 , H01L27/12 , H01L27/1214 , H01L27/3244 , H01L29/78624
摘要： The present invention discloses a control TFT structure (i.e. a driving TFT) for reducing leakage in an OLED display. A semiconductor layer, such as a polysilicon layer, is deposited on a transparent substrate as a channel region. A lightly doped region and a drain region are disposed on one side of the polysilicon layer and a source region is disposed on the opposite side of the polysilicon layer. An insulating layer is deposited covering the surface of the polysilicon layer, the lightly doped region, and the source/drain regions. Source and drain electrodes are disposed in the insulating layer, electrically connecting the source and drain region respectively. A gate metal layer is disposed on the insulating layer, at approximately the top right portion of the polysilicon layer to form a transistor structure.
摘要翻译：本发明公开了一种用于减少OLED显示器中的泄漏的控制TFT结构（即驱动TFT）。诸如多晶硅层的半导体层作为沟道区沉积在透明衬底上。轻掺杂区域和漏极区域设置在多晶硅层的一侧上，源极区域设置在多晶硅层的相反侧。沉积覆盖多晶硅层，轻掺杂区域和源极/漏极区域的表面的绝缘层。源电极和漏电极设置在绝缘层中，分别电连接源区和漏区。栅极金属层设置在绝缘层上，大致在多晶硅层的右上部分，以形成晶体管结构。

76. 发明申请

US20070037069A1 EXPOSURE MASK 有权
标题翻译：曝光面膜
公开(公告)号：US20070037069A1
公开(公告)日：2007-02-15
申请号：US11462824
申请日：2006-08-07
申请人： Hideto Ohnuma
发明人： Hideto Ohnuma
IPC分类号： G03F1/00 , G03C5/00
CPC分类号： H01L27/1288 , G03F1/28 , G03F1/32 , H01L27/1214 , H01L27/124 , H01L27/127 , H01L29/42384 , H01L29/458 , H01L29/66757 , H01L29/78621 , H01L29/78624 , Y10T428/24802
摘要： An exposure mask provided with a semi-transparent film, capable of forming a resist in which a convex portion is not formed in an end portion and the end portion has gentle shape. In an exposure mask having a first region and a second region having different phase and transmittance with respect to exposure light, the phase difference Δθ with respect to exposure light which transmits though the first region and the second region and the transmittance n of the second region with respect to exposure light are defined so as to satisfy following formula 1. Δθ≦arccos (−√n/2) [Formula 1]Accordingly, a resist having regions with different thicknesses and having gentle shape in an edge can be formed. By performing a process such as etching with this resist, regions having different thicknesses can be formed in a self-aligned manner.
摘要翻译：一种具有半透明膜的曝光掩模，能够形成在端部不形成凸部并且端部具有平缓形状的抗蚀剂。在具有相对于曝光光具有不同相位和透射率的第一区域和第二区域的曝光掩模中，相对于通过第一区域和第二区域透射的曝光光的相位差Deltatheta和第二区域的透射率n 定义为曝光光以满足下面的公式1. <？in-line-formula description =“In-line Formulas”end =“lead”？> Deltatheta <= arccos（-√n/ 2）[式 1] <？in-line-formula description =“In-line Formulas”end =“tail”？>因此，可以形成具有不同厚度且具有边缘温和形状的区域的抗蚀剂。通过利用该抗蚀剂进行蚀刻等处理，能够以自对准的方式形成具有不同厚度的区域。

77. 发明授权

US07176491B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07176491B2
公开(公告)日：2007-02-13
申请号：US11091570
申请日：2005-03-29
申请人： Yoshihiko Toyoda , Takao Sakamoto , Kazuyuki Sugahara
发明人： Yoshihiko Toyoda , Takao Sakamoto , Kazuyuki Sugahara
IPC分类号： H01L29/04
CPC分类号： H01L27/1222 , H01L27/1214 , H01L27/127 , H01L29/66757 , H01L29/78624 , H01L2029/7863
摘要： A silicon nitride film and a silicon oxide film are formed on a glass substrate. On the silicon oxide film is formed a thin film transistor T including a source region, a drain region, a channel region having a predetermined channel length, a first GOLD region having an impurity concentration lower than the impurity concentration of the source region, a second GOLD region having an impurity concentration lower than the impurity concentration of the drain region, a gate insulation film, and a gate electrode. The length of an overlapping portion in plane between the gate electrode and the second GOLD region in the direction of the channel length is set longer than the length in the direction of the channel region of an overlapping portion in plane between the gate electrode and the first GOLD region.
摘要翻译：在玻璃基板上形成氮化硅膜和氧化硅膜。在氧化硅膜上形成薄膜晶体管T，该薄膜晶体管T包括源极区，漏极区，具有预定沟道长度的沟道区，具有低于源区杂质浓度的杂质浓度的第一GOLD区， GOLD区域的杂质浓度低于漏极区域的杂质浓度，栅极绝缘膜和栅电极。在沟道长度方向上的栅电极和第二GOLD区之间的平面重叠部分的长度被设定为长于栅电极和第一栅极之间的平面重叠部分的沟道区域的方向上的长度金地区。

78. 发明授权

US07163848B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07163848B2
公开(公告)日：2007-01-16
申请号：US09894950
申请日：2001-06-27
申请人： Shunpei Yamazaki , Jun Koyama
发明人： Shunpei Yamazaki , Jun Koyama
IPC分类号： H01L21/00
CPC分类号： H01L29/66757 , H01L27/12 , H01L27/1248 , H01L29/42384 , H01L29/4908 , H01L29/78621 , H01L29/78624 , H01L29/78633 , H01L29/78636 , H01L2029/7863
摘要： OFF current of a TFT is reduced. There is provided a semiconductor device includung: a substrate; a shielding film formed so as to be in contact with the substrate; a planarization insulating film formed on the substrate so as to cover the shielding film; and a semiconductor layer formed so as to be in contact with the planarization insulating film. The semiconductor device is characterized in that the shielding film overlaps the semiconductor layer with the planarization insulating film sandwiched therebetween, and that the planarization insulating film is polished by CMP before the semiconductor layer is formed.
摘要翻译： TFT的OFF电流降低。提供了一种半导体器件，包括：衬底; 形成为与基板接触的屏蔽膜; 形成在所述基板上以覆盖所述屏蔽膜的平坦化绝缘膜; 以及形成为与平坦化绝缘膜接触的半导体层。半导体器件的特征在于，屏蔽膜与夹在其间的平坦化绝缘膜的半导体层重叠，并且在形成半导体层之前通过CMP对平坦化绝缘膜进行抛光。

79. 发明申请

US20060267012A1 Thin-film transistor and method of fabricating the same 失效
公开(公告)号：US20060267012A1
公开(公告)日：2006-11-30
申请号：US11498800
申请日：2006-08-04
申请人： Shigeto Maegawa , Takashi Ipposhi , Toshiaki Iwamatsu , Shigenobu Maeda , Il-Jung Kim , Kazuhito Tsutsumi , Hirotada Kuriyama , Yoshiyuki Ishigaki , Motomu Ukita , Toshiaki Tsutsumi
发明人： Shigeto Maegawa , Takashi Ipposhi , Toshiaki Iwamatsu , Shigenobu Maeda , Il-Jung Kim , Kazuhito Tsutsumi , Hirotada Kuriyama , Yoshiyuki Ishigaki , Motomu Ukita , Toshiaki Tsutsumi
IPC分类号： H01L31/00
CPC分类号： H01L29/78609 , H01L27/124 , H01L29/41733 , H01L29/458 , H01L29/66757 , H01L29/78618 , H01L29/78624 , H01L29/78639
摘要： Provided are a thin-film transistor formed by connecting polysilicon layers having different conductivity types with each other which prevents occurrence of inconvenience resulting from diffusion of impurities and a method of fabricating the same. A drain (6), a channel (7) and a source (8) are integrally formed on a surface of a second oxide film (4) by polysilicon. The drain (6) is formed to be connected with a pad layer (3) (second polycrystalline semiconductor layer) through a contact hole (5) which is formed to reach an upper surface of the pad layer (3). The pad layer (3) positioned on a bottom portion of the contact hole (5) (opening) is provided with a boron implantation region BR.

80. 发明申请

US20060231867A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060231867A1
公开(公告)日：2006-10-19
申请号：US11395772
申请日：2006-03-31
申请人： Tetsuya Takahashi
发明人： Tetsuya Takahashi
IPC分类号： H01L29/768
CPC分类号： H01L29/861 , H01L29/0649 , H01L29/0653 , H01L29/0878 , H01L29/7394 , H01L29/7824 , H01L29/78624 , H01L29/868
摘要： A semiconductor device has a semiconductor base, an anode electrode, and a cathode electrode. The semiconductor base includes a P type semiconductor substrate, an insulating film, an N− type semiconductor region formed on the insulating film, an N+ type semiconductor region, and a P+ type semiconductor region facing the N+ type semiconductor region via the N− type semiconductor region. The semiconductor device further has an N type diffusion layer which is formed, in the N− type semiconductor region at the interface between the insulating film and the N− type semiconductor region, so as to have a concentration gradient such that the N type impurity concentration increases from the side of the anode electrode to the side of the cathode electrode.
摘要翻译：半导体器件具有半导体基底，阳极电极和阴极电极。半导体基底包括形成在绝缘膜上的P型半导体衬底，绝缘膜，N +型半导体区域，N + +型半导体区域和P 经由N + O型半导体区域面向N + +型半导体区域的超导型半导体区域。半导体器件还具有N型扩散层，其在绝缘膜和N +型半导体区域之间的界面处形成在N + - 型半导体区域中，使得具有浓度梯度，使得N型杂质浓度从阳极侧到阴极侧增加。

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