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71. 发明授权

US08395203B2 Semiconductor device and a manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08395203B2
公开(公告)日：2013-03-12
申请号：US12951012
申请日：2010-11-20
申请人： Hiraku Chakihara , Yasushi Ishii
发明人： Hiraku Chakihara , Yasushi Ishii
IPC分类号： H01L29/788 , H01L21/8238
CPC分类号： H01L21/28273 , G11C16/0466 , H01L21/28282 , H01L27/115 , H01L27/11573 , H01L29/42324 , H01L29/42344 , H01L29/66833 , H01L29/792
摘要： Over the top of a semiconductor substrate, a lamination pattern having a control gate electrode, a first insulation film thereover, and a second insulation film thereover is formed. Over the top of the semiconductor substrate, a memory gate electrode adjacent to the lamination pattern is formed. Between the control gate electrode and the semiconductor substrate, a third insulation film for gate insulation film is formed. Between the memory gate electrode and the semiconductor substrate, and between the lamination pattern and the memory gate electrode, a fourth insulation film including a lamination film of a silicon oxide film, a silicon nitride film, and another silicon oxide film is formed. At the sidewall on the side of the lamination pattern adjacent to the memory gate electrode, the first insulation film is retreated from the control gate electrode and the second insulation film, and the upper end corner portion of the control gate electrode is rounded.
摘要翻译：在半导体衬底的顶部上，形成了具有控制栅电极，其上的第一绝缘膜和其上的第二绝缘膜的叠层图案。在半导体衬底的顶部上，形成与层压图案相邻的存储栅电极。在控制栅极电极和半导体衬底之间形成第三绝缘膜用绝缘膜。在存储栅电极和半导体衬底之间以及叠层图案和存储栅电极之间形成包括氧化硅膜，氮化硅膜和另一氧化硅膜的叠层膜的第四绝缘膜。在与存储栅电极相邻的层叠图案侧的侧壁处，第一绝缘膜从控制栅极电极和第二绝缘膜退回，并且控制栅电极的上端角部分被倒圆。

72. 发明申请

US20120292679A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120292679A1
公开(公告)日：2012-11-22
申请号：US13468992
申请日：2012-05-10
申请人： Kota FUNAYAMA , Hiraku Chakihara , Yasushi Ishii
发明人： Kota FUNAYAMA , Hiraku Chakihara , Yasushi Ishii
IPC分类号： H01L29/94 , H01L21/336
CPC分类号： H01L27/11563 , G11C16/0466 , H01L21/28282 , H01L27/1052 , H01L27/11517 , H01L27/11565 , H01L27/11568 , H01L28/40 , H01L29/4234 , H01L29/66477 , H01L29/66833 , H01L29/792
摘要： A memory cell of a nonvolatile memory and a capacitive element are formed over the same semiconductor substrate. The memory cell includes a control gate electrode formed over the semiconductor substrate via a first insulating film, a memory gate electrode formed adjacent to the control gate electrode over the semiconductor substrate via a second insulating film, and the second insulating film having therein a charge storing portion. The capacitive element includes a lower electrode formed of the same layer of a silicon film as the control gate electrode, a capacity insulating film formed of the same insulating film as the second insulating film, and an upper electrode formed of the same layer of a silicon film as the memory gate electrode. The concentration of impurities of the upper electrode is higher than that of the memory gate electrode.
摘要翻译：在相同的半导体衬底上形成非易失性存储器和电容元件的存储单元。存储单元包括经由第一绝缘膜形成在半导体衬底上的控制栅极电极，经由第二绝缘膜在半导体衬底上与控制栅电极相邻形成的存储栅电极，并且其中具有电荷存储的第二绝缘膜一部分。电容元件包括由与控制栅电极相同的硅膜层形成的下电极，由与第二绝缘膜相同的绝缘膜形成的电容绝缘膜和由相同的硅层形成的上电极薄膜作为记忆栅电极。上部电极的杂质浓度高于记忆栅电极的浓度。

73. 发明申请

US20100038700A1 Semiconductor Device 有权
标题翻译：半导体器件
公开(公告)号：US20100038700A1
公开(公告)日：2010-02-18
申请号：US12580289
申请日：2009-10-16
申请人： Tsutomu OKAZAKI , Daisuke Okada , Kyoya Nitta , Toshihiro Tanaka , Akira Kato , Toshikazu Matsui , Yasushi Ishii , Digh Hisamoto , Kan Yasui
发明人： Tsutomu OKAZAKI , Daisuke Okada , Kyoya Nitta , Toshihiro Tanaka , Akira Kato , Toshikazu Matsui , Yasushi Ishii , Digh Hisamoto , Kan Yasui
IPC分类号： H01L29/792
CPC分类号： H01L27/1157 , G11C16/0425 , H01L21/28282 , H01L27/0207 , H01L27/105 , H01L27/115 , H01L27/11568 , H01L29/0649 , H01L29/4234 , H01L29/42344 , H01L29/518 , H01L29/66833 , H01L29/792
摘要： A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.
摘要翻译：半导体存储器阵列包括具有第一电荷存储层和第一非易失性存储单元的第一非易失性存储单元，第一非易失性存储单元与第一存储单元相邻，具有第二电荷存储层和第二栅电极。第一电极和第二电极在垂直于第一方向的第二方向上延伸，第一电极具有在第一方向上朝向第二电极延伸的第一接触部分，并且第二电极具有朝向第一电极的第二接触部分第一个方向第一和第二接触位置分别沿第二方向移动，第一电极和第一接触部分与第二电极和第二接触部分电气分离。

74. 发明授权

US07502257B2 Semiconductor device 有权
公开(公告)号：US07502257B2
公开(公告)日：2009-03-10
申请号：US11797164
申请日：2007-05-01
申请人： Tsutomu Okazaki , Daisuke Okada , Kyoya Nitta , Toshihiro Tanaka , Akira Kato , Toshikazu Matsui , Yasushi Ishii , Digh Hisamoto , Kan Yasui
发明人： Tsutomu Okazaki , Daisuke Okada , Kyoya Nitta , Toshihiro Tanaka , Akira Kato , Toshikazu Matsui , Yasushi Ishii , Digh Hisamoto , Kan Yasui
IPC分类号： G11C11/34
CPC分类号： H01L27/1157 , G11C16/0425 , H01L21/28282 , H01L27/0207 , H01L27/105 , H01L27/115 , H01L27/11568 , H01L29/0649 , H01L29/4234 , H01L29/42344 , H01L29/518 , H01L29/66833 , H01L29/792
摘要： A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

75. 发明授权

US06729921B1 Catalyzer arrangement in outboard motor 有权
标题翻译：催化剂排列在舷外马达
公开(公告)号：US06729921B1
公开(公告)日：2004-05-04
申请号：US09591745
申请日：2000-06-12
申请人： Yasushi Ishii
发明人： Yasushi Ishii
IPC分类号： B63H2132
CPC分类号： F01N13/004 , F01N3/28 , F01N2590/021 , F02B61/04 , F02B61/045 , F02B75/007 , F02B2075/1816
摘要： A catalyzer arrangement in an outboard motor includes an improved construction that does not require a large space for furnishing a catalyzer having a relatively large volume and that keeps the catalyzer away from the body of water in which the outboard motor is operated. The outboard motor includes an engine having an internal or external exhaust section. A driveshaft housing of the motor is adapted to be mounted on an associated watercraft. An exhaust guide is mounted on the driveshaft housing for supporting the engine. The exhaust guide includes an internal exhaust section coupled to the exhaust section of the engine. An exhaust unit defines an internal exhaust section that is coupled to the exhaust section of the exhaust guide. The exhaust unit includes a catalyzer disposed in its internal exhaust section.
摘要翻译：舷外马达中的催化剂装置包括改进的结构，其不需要大的空间用于提供具有相对较大体积的催化剂，并且使催化剂远离舷外马达操作的水体。舷外马达包括具有内部或外部排气部分的发动机。马达的驱动轴壳体适于安装在相关联的船舶上。排气引导件安装在驱动轴壳体上用于支撑发动机。排气引导件包括联接到发动机的排气部分的内部排气部分。排气单元限定连接到排气引导件的排气部分的内部排气部分。排气单元包括设置在其内部排气部分中的催化剂。

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