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71. 发明授权

US07321144B2 Semiconductor device employing buried insulating layer and method of fabricating the same 有权
标题翻译：采用埋层绝缘层的半导体器件及其制造方法
公开(公告)号：US07321144B2
公开(公告)日：2008-01-22
申请号：US11011258
申请日：2004-12-13
申请人： Chang-Woo Oh , Dong-Gun Park , Jeong-Dong Choe , Kyoung-Hwan Yeo
发明人： Chang-Woo Oh , Dong-Gun Park , Jeong-Dong Choe , Kyoung-Hwan Yeo
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L29/66651 , H01L27/10873 , H01L29/0653 , H01L29/66659
摘要： A semiconductor device employs an asymmetrical buried insulating layer, and a method of fabricating the same. The semiconductor device includes a lower semiconductor substrate. An upper silicon pattern is located on the lower semiconductor substrate. The upper silicon pattern includes a channel region, and a source region and a drain region spaced apart from each other by the channel region. A gate electrode is electrically insulated from the upper silicon pattern and intersects over the channel region. A bit line and a cell capacitor are electrically connected to the source region and the drain region, respectively. A buried insulating layer is interposed between the drain region and the lower semiconductor substrate. The buried insulating layer has an extension portion partially interposed between the channel region and the lower semiconductor substrate.
摘要翻译：半导体器件采用非对称埋层绝缘层及其制造方法。半导体器件包括下半导体衬底。上硅图案位于下半导体衬底上。上部硅图案包括通道区域以及由沟道区域彼此间隔开的源极区域和漏极区域。栅电极与上硅图案电绝缘，并且在沟道区域上相交。位线和单元电容器分别电连接到源极区域和漏极区域。掩埋绝缘层插入在漏区和下半导体衬底之间。掩埋绝缘层具有部分插入在沟道区域和下半导体衬底之间的延伸部分。

72. 发明申请

US20070205459A1 Nonvolatile memory devices and methods of forming the same 审中-公开
标题翻译：非易失存储器件及其形成方法
公开(公告)号：US20070205459A1
公开(公告)日：2007-09-06
申请号：US11653359
申请日：2007-01-16
申请人： Eun-Suk Cho , Dong-Gun Park , Choong-Ho Lee , Jong-Jin Lee , Jeong-Dong Choe
发明人： Eun-Suk Cho , Dong-Gun Park , Choong-Ho Lee , Jong-Jin Lee , Jeong-Dong Choe
IPC分类号： H01L29/788
CPC分类号： H01L27/11568 , B82Y10/00 , H01L27/115 , H01L27/11521 , H01L29/40114 , H01L29/40117 , H01L29/42324 , H01L29/4234 , H01L29/66825 , H01L29/66833 , H01L29/7854 , H01L29/7881 , H01L29/792
摘要： A nonvolatile memory device includes a semiconductor pin including a first semiconductor pattern, a second semiconductor pattern on the first semiconductor pattern, and a third semiconductor pattern, disposed between the first semiconductor pattern and the second semiconductor pattern, connecting the first semiconductor pattern and the second semiconductor pattern, a charge storage layer on the second semiconductor pattern with a tunneling insulation layer interposed therebetween, and a gate electrode on the charge storage layer with a blocking insulation layer interposed therebetween, wherein a width of the second semiconductor pattern is greater than a width of the third semiconductor pattern.
摘要翻译：非易失性存储器件包括：半导体引脚，包括第一半导体图案，第一半导体图案上的第二半导体图案和设置在第一半导体图案和第二半导体图案之间的第三半导体图案，将第一半导体图案和第二半导体图案半导体图案，在第二半导体图案上的电荷存储层，其间插入有隧道绝缘层，以及在电荷存储层上的栅电极，其间插入有阻挡绝缘层，其中第二半导体图案的宽度大于宽度的第三半导体图案。

73. 发明申请

US20050133881A1 Semiconductor device employing buried insulating layer and method of fabricating the same 有权
标题翻译：采用埋层绝缘层的半导体器件及其制造方法
公开(公告)号：US20050133881A1
公开(公告)日：2005-06-23
申请号：US11011258
申请日：2004-12-13
申请人： Chang-Woo Oh , Dong-Gun Park , Jeong-Dong Choe , Kyoung-Hwan Yeo
发明人： Chang-Woo Oh , Dong-Gun Park , Jeong-Dong Choe , Kyoung-Hwan Yeo
IPC分类号： H01L27/108 , H01L21/336 , H01L21/8238 , H01L21/8242 , H01L29/00 , H01L29/06
CPC分类号： H01L29/66651 , H01L27/10873 , H01L29/0653 , H01L29/66659
摘要： A semiconductor device employs an asymmetrical buried insulating layer, and a method of fabricating the same. The semiconductor device includes a lower semiconductor substrate. An upper silicon pattern is located on the lower semiconductor substrate. The upper silicon pattern includes a channel region, and a source region and a drain region spaced apart from each other by the channel region. A gate electrode is electrically insulated from the upper silicon pattern and intersects over the channel region. A bit line and a cell capacitor are electrically connected to the source region and the drain region, respectively. A buried insulating layer is interposed between the drain region and the lower semiconductor substrate. The buried insulating layer has an extension portion partially interposed between the channel region and the lower semiconductor substrate.
摘要翻译：半导体器件采用非对称埋层绝缘层及其制造方法。半导体器件包括下半导体衬底。上硅图案位于下半导体衬底上。上部硅图案包括通道区域以及由沟道区域彼此间隔开的源极区域和漏极区域。栅电极与上硅图案电绝缘，并且在沟道区域上相交。位线和单元电容器分别电连接到源极区域和漏极区域。掩埋绝缘层插入在漏区和下半导体衬底之间。掩埋绝缘层具有部分插入在沟道区域和下半导体衬底之间的延伸部分。

74. 发明申请

US20050098094A1 Semiconductor device having partially insulated field effect transistor (PiFET) and method of fabricating the same 有权
标题翻译：具有部分绝缘的场效应晶体管（PiFET）的半导体器件及其制造方法
公开(公告)号：US20050098094A1
公开(公告)日：2005-05-12
申请号：US10982554
申请日：2004-11-05
申请人： Chang-Woo Oh , Dong-Gun Park , Jeong-Dong Choe , Mia-Sang Kim , Sung-Ming Kim
发明人： Chang-Woo Oh , Dong-Gun Park , Jeong-Dong Choe , Mia-Sang Kim , Sung-Ming Kim
IPC分类号： H01L21/336 , C30B23/00 , H01L21/331 , H01L21/762 , H01L21/8234 , H01L29/10 , H01L29/78
CPC分类号： H01L21/823481 , H01L21/76283 , H01L29/1079 , H01L29/78
摘要： Embodiments of the invention include a partially insulated field effect transistor and a method of fabricating the same. According to some embodiments, a semiconductor substrate is formed by sequentially stacking a bottom semiconductor layer, a sacrificial layer, and a top semiconductor layer. The sacrificial layer may be removed to form a buried gap region between the bottom semiconductor layer and the top semiconductor layer. Then, a transistor may be formed on the semiconductor substrate. The sacrificial layer may be a crystalline semiconductor formed by an epitaxial growth technology.
摘要翻译：本发明的实施例包括部分绝缘的场效应晶体管及其制造方法。根据一些实施例，通过顺序堆叠底部半导体层，牺牲层和顶部半导体层来形成半导体衬底。可以去除牺牲层以在底部半导体层和顶部半导体层之间形成掩埋间隙区域。然后，可以在半导体衬底上形成晶体管。牺牲层可以是通过外延生长技术形成的晶体半导体。

75. 发明申请

US20120058613A1 FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20120058613A1
公开(公告)日：2012-03-08
申请号：US13284889
申请日：2011-10-29
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Dong-Uk Choi , Kyoung-Hwan Yeo
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Dong-Uk Choi , Kyoung-Hwan Yeo
IPC分类号： H01L21/336
CPC分类号： H01L29/0847 , H01L29/1054 , H01L29/665 , H01L29/66621 , H01L29/66636 , H01L29/66651 , H01L29/66795 , H01L29/7851 , H01L29/78687 , H01L29/7881
摘要： A field effect transistor (FET) and a method for manufacturing the same, in which the FET may include an isolation film formed on a semiconductor substrate to define an active region, and a gate electrode formed on a given portion of the semiconductor substrate. A channel layer may be formed on a portion of the gate electrode, with source and drain regions formed on either side of the channel layer so that boundaries between the channel layer and the source and drain regions of the FET may be perpendicular to a surface of the semiconductor substrate.
摘要翻译：场效应晶体管（FET）及其制造方法，其中FET可以包括形成在半导体衬底上以形成有源区的隔离膜，以及形成在半导体衬底的给定部分上的栅电极。沟道层可以形成在栅电极的一部分上，源极和漏极区形成在沟道层的任一侧上，使得沟道层与FET的源极和漏极区之间的边界可以垂直于半导体衬底。

76. 发明申请

US20090065850A1 NON-VOLATILE MEMORY DEVICES 审中-公开
标题翻译：非易失性存储器件
公开(公告)号：US20090065850A1
公开(公告)日：2009-03-12
申请号：US12266201
申请日：2008-11-06
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
IPC分类号： H01L29/792
CPC分类号： H01L29/785 , B82Y10/00 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L27/1203 , H01L29/42392 , H01L29/66545 , H01L29/66795 , H01L29/66825 , H01L29/66833 , H01L29/7851 , H01L29/7854 , H01L29/78645
摘要： According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a charge storage layer, a tunneling insulating layer, a blocking insulating layer and a gate electrode layer are not attacked from etching in a process for forming the gate electrode, thereby forming a nonvolatile memory device having good reliability.
摘要翻译：根据本发明的具有多栅极结构的非易失性存储器件及其形成方法，使用镶嵌工艺形成栅电极。因此，在用于形成栅电极的工艺中，电荷存储层，隧道绝缘层，阻挡绝缘层和栅极电极层不会被蚀刻侵蚀，从而形成具有良好可靠性的非易失性存储器件。

77. 发明授权

US07402493B2 Method for forming non-volatile memory devices 有权
标题翻译：用于形成非易失性存储器件的方法
公开(公告)号：US07402493B2
公开(公告)日：2008-07-22
申请号：US11602032
申请日：2006-11-20
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
IPC分类号： H01L21/336
CPC分类号： H01L29/785 , B82Y10/00 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L27/1203 , H01L29/42392 , H01L29/66545 , H01L29/66795 , H01L29/66825 , H01L29/66833 , H01L29/7851 , H01L29/7854 , H01L29/78645
摘要： According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a charge storage layer, a tunneling insulating layer, a blocking insulating layer and a gate electrode layer are not attacked from etching in a process for forming the gate electrode, thereby forming a nonvolatile memory device having good reliability.
摘要翻译：根据本发明的具有多栅极结构的非易失性存储器件及其形成方法，使用镶嵌工艺形成栅电极。因此，在用于形成栅电极的工艺中，电荷存储层，隧道绝缘层，阻挡绝缘层和栅极电极层不会被蚀刻侵蚀，从而形成具有良好可靠性的非易失性存储器件。

78. 发明申请

US20100035398A1 Field effect transistor and method for manufacturing the same 有权
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20100035398A1
公开(公告)日：2010-02-11
申请号：US12588193
申请日：2009-10-07
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Dong-Uk Choi , Kyoung-Hwan Yeo
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Dong-Uk Choi , Kyoung-Hwan Yeo
IPC分类号： H01L21/336
CPC分类号： H01L29/0847 , H01L29/1054 , H01L29/665 , H01L29/66621 , H01L29/66636 , H01L29/66651 , H01L29/66795 , H01L29/7851 , H01L29/78687 , H01L29/7881
摘要： A field effect transistor (FET) and a method for manufacturing the same, in which the FET may include an isolation film formed on a semiconductor substrate to define an active region, and a gate electrode formed on a given portion of the semiconductor substrate. A channel layer may be formed on a portion of the gate electrode, with source and drain regions formed on either side of the channel layer so that boundaries between the channel layer and the source and drain regions of the FET may be perpendicular to a surface of the semiconductor substrate.
摘要翻译：场效应晶体管（FET）及其制造方法，其中FET可以包括形成在半导体衬底上以形成有源区的隔离膜，以及形成在半导体衬底的给定部分上的栅电极。沟道层可以形成在栅电极的一部分上，源极和漏极区形成在沟道层的任一侧上，使得沟道层与FET的源极和漏极区之间的边界可以垂直于半导体衬底。

79. 发明授权

US07297600B2 Methods of forming fin field effect transistors using oxidation barrier layers 有权
标题翻译：使用氧化阻挡层形成鳍状场效应晶体管的方法
公开(公告)号：US07297600B2
公开(公告)日：2007-11-20
申请号：US11020899
申请日：2004-12-23
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
IPC分类号： H01L21/336
CPC分类号： H01L29/7854 , B82Y10/00 , H01L29/66545 , H01L29/66553 , H01L29/66795 , H01L29/78645
摘要： A method of forming a fin field effect transistor on a semiconductor substrate includes forming a fin-shaped active region vertically protruding from the substrate. An oxide layer is formed on a top surface and opposing sidewalls of the fin-shaped active region. An oxidation barrier layer is formed on the opposing sidewalls of the fin-shaped active region and is planarized to a height no greater than about a height of the oxide layer to form a fin structure. The fin structure is oxidized to form a capping oxide layer on the top surface of the fin-shaped active region and to form at least one curved sidewall portion proximate the top surface of the fin-shaped active region. The oxidation barrier layer has a height sufficient to reduce oxidation on the sidewalls of the fin-shaped active region about halfway between the top surface and a base of the fin-shaped active region. Related devices are also discussed.
摘要翻译：在半导体衬底上形成鳍状场效应晶体管的方法包括形成从衬底垂直突出的鳍状有源区。在鳍状有源区的上表面和相对侧壁上形成氧化物层。在翅片状有源区域的相对的侧壁上形成氧化阻挡层，并将其平坦化至不大于氧化物层高度的高度以形成翅片结构。翅片结构被氧化以在翅片形有源区的顶表面上形成封盖氧化层，并且在翅片形有源区的顶表面附近形成至少一个弯曲的侧壁部分。氧化阻挡层的高度足以减小翅片形有源区的侧壁上的氧化，大约在鳍状有源区的顶表面和基底之间的一半处。还讨论了相关设备。

80. 发明授权

US08415210B2 Field effect transistor and method for manufacturing the same 有权
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US08415210B2
公开(公告)日：2013-04-09
申请号：US13284889
申请日：2011-10-29
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Dong-Uk Choi , Kyoung-Hwan Yeo
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Dong-Uk Choi , Kyoung-Hwan Yeo
IPC分类号： H01L21/337 , H01L21/8234
CPC分类号： H01L29/0847 , H01L29/1054 , H01L29/665 , H01L29/66621 , H01L29/66636 , H01L29/66651 , H01L29/66795 , H01L29/7851 , H01L29/78687 , H01L29/7881
摘要： A field effect transistor (FET) and a method for manufacturing the same, in which the FET may include an isolation film formed on a semiconductor substrate to define an active region, and a gate electrode formed on a given portion of the semiconductor substrate. A channel layer may be formed on a portion of the gate electrode, with source and drain regions formed on either side of the channel layer so that boundaries between the channel layer and the source and drain regions of the FET may be perpendicular to a surface of the semiconductor substrate.
摘要翻译：场效应晶体管（FET）及其制造方法，其中FET可以包括形成在半导体衬底上以形成有源区的隔离膜和形成在半导体衬底的给定部分上的栅电极。沟道层可以形成在栅电极的一部分上，源极和漏极区形成在沟道层的任一侧上，使得沟道层与FET的源极和漏极区之间的边界可以垂直于半导体衬底。

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