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    • 71. 发明授权
    • Sampling rate converting method and apparatus
    • 采样率转换方法和装置
    • US5856796A
    • 1999-01-05
    • US905909
    • 1997-08-04
    • Makoto AkuneTadao Suzuki
    • Makoto AkuneTadao Suzuki
    • H03H17/00H03H17/06
    • H03H17/0685
    • A sampling rate converting method and apparatus for converting the sampling frequency of a 1-bit digital data obtained a .SIGMA..DELTA. modulator to 32 kHz, 48 kHz, 96 kHz or 192 kHz without producing jitter. A decimation filter 3 decimates the sampling frequency of 1-bit digital data of 2.8224 MHz supplied from an input terminal 2 by 1/2-tuple decimation. An interpolation filter 4 oversamples the frequency of the output of the decimation filter 3 by quintuple oversampling with an integer ratio of 1:5. A decimation filter 5 decimates the frequency of the output of the interpolation filter 4 by 1/21-tuple decimation with an integer ratio of 21:1.
    • 用于将获得的SIGMA DELTA调制器的1位数字数据的采样频率转换为32kHz,48kHz,96kHz或192kHz的采样率转换方法和装置,而不产生抖动。 抽取滤波器3抽取从输入端子2提供的1 / 8224MHz的1位数字数据的采样频率1/2抽取。 内插滤波器4通过五比特过采样以1:5的整数比过滤抽取滤波器3的输出频率。 抽取滤波器5以21:1的整数比抽取内插滤波器4的输出的频率1/2/2元抽取。
    • 72. 发明授权
    • Sampling rate converting method and apparatus
    • 采样率转换方法和装置
    • US5719571A
    • 1998-02-17
    • US715430
    • 1996-09-18
    • Makoto AkuneTadao Suzuki
    • Makoto AkuneTadao Suzuki
    • H03H17/00H03H17/06
    • H03H17/0685
    • A sampling rate converting method and apparatus for converting the sampling frequency of a 1-bit digital data obtained by a .SIGMA..DELTA. modulator to 32 kHz, 48 kHz, 96 kHz or 192 kHz without producing jitter. A decimation filter 3 decimates the sampling frequency of 1-bit digital data of 2.8224 MHz supplied from an input terminal 2 by 1/21-tuple decimation. An interpolation filter 4 oversamples the frequency of the output of the decimation filter 3 by quintuple oversampling with an integer ratio of 1:5. A decimation filter 5 decimates the frequency of the output of the interpolation filter 4 by 1/21-tuple decimation with an integer ratio of 21:1.
    • 用于将由SIGMA DELTA调制器获得的1位数字数据的采样频率转换为32kHz,48kHz,96kHz或192kHz而不产生抖动的采样率转换方法和装置。 抽取滤波器3对从输入端子2提供的1 / 212424MHz的1位数字数据的采样频率进行1/2抽取。 内插滤波器4通过五比特过采样以1:5的整数比过滤抽取滤波器3的输出频率。 抽取滤波器5以21:1的整数比抽取内插滤波器4的输出的频率1/2/2元抽取。
    • 74. 发明授权
    • Cash handling machine
    • 现金处理机
    • US4628192A
    • 1986-12-09
    • US797944
    • 1985-11-14
    • Tadao Suzuki
    • Tadao Suzuki
    • B65H29/12B41J13/10G07D1/00G07D9/00G07D11/00G07D13/00G07F7/04G07F19/00G07G5/00
    • G07F19/20G07D11/0015G07D11/0018G07F19/201G07G5/00
    • The cash handling machine with a cash containing device housed within a safe and a receipt printer mounted on the safe comprises a cash carrying device for carrying cash from the cash containing device to an operation panel cash outlet and a receipt carrying device for carrying a printed receipt to an operation panel receipt outlet. Since the receipt carrying device is pivotally supported by the receipt printer at one end thereof and disposed obliquely between the receipt printer and the receipt outlet, it is possible to bring the receipt outlet into close proximity to the cash outlet in the operation panel even where the safe wall is sufficiently thick for crime prevention. Therefore, the user can readily take both the discharged cash and receipt simultaneously. Further, the receipt carrying device can be moved backward for easy access thereto in case of receipt jamming trouble.
    • 具有装在保险箱内的现金收纳装置的现金处理机和安装在保险箱上的收据打印机包括用于从现金收纳装置携带现金到操作面板现金出口的现金携带装置和用于携带打印收据的收据携带装置 到操作面板收据出口。 由于收据承载装置在其一端由收据打印机枢轴支撑并且倾斜地布置在收据打印机和收据出口之间,所以可以使收据出口靠近操作面板中的现金出口,即使在 安全墙足够厚,可以预防犯罪。 因此,用户可以同时容易地同时收取已发放的现金和收据。 此外,收据携带装置可以向后移动,以便在接收到卡纸故障的情况下容易接近。
    • 75. 发明授权
    • Pulse width modulated signal amplifier
    • 脉宽调制信号放大器
    • US4134076A
    • 1979-01-09
    • US857176
    • 1977-12-02
    • Tadao SuzukiTakeshi Fukami
    • Tadao SuzukiTakeshi Fukami
    • H03F3/20H03F3/217H03F3/38H03F3/183
    • H03F3/2171H03F3/217H03F2200/511
    • A pulse width modulated signal amplifier includes an integrator having a positive or non-inverted input terminal supplied with a modulating signal, such as, an audio signal, and an inverted input terminal supplied with a rectangular wave signal as a carrier, a high gain amplifier receiving the output of the integrator and producing a pulse width modulated signal, a pulse power amplifier receiving the pulse width modulated signal, a low pass filter receiving the output of the pulse power amplifier and producing an amplified demodulated signal corresponding to the original modulating signal and which is supplied to an output terminal, and a negative feedback circuit connected between the output terminal of the pulse power amplifier and the inverted input terminal of the integrator.
    • 脉宽调制信号放大器包括积分器,该积分器具有被提供有诸如音频信号的调制信号的正或非反相输入端,以及提供有矩形波信号作为载波的反相输入端,高增益放大器 接收积分器的输出并产生脉冲宽度调制信号,接收脉宽调制信号的脉冲功率放大器,接收脉冲功率放大器输出的低通滤波器,并产生对应于原始调制信号的放大解调信号;以及 连接在脉冲功率放大器的输出端和积分器的反相输入端之间的负反馈电路。
    • 77. 发明授权
    • Push-pull pulse amplifier having improved turn-on and turn-off times
    • 推挽脉冲放大器具有改善的导通和关断时间
    • US4115740A
    • 1978-09-19
    • US850830
    • 1977-11-11
    • Tadao YoshidaTadao Suzuki
    • Tadao YoshidaTadao Suzuki
    • H03F3/20H03F3/217H03F3/30H03F3/34H03F3/345H03K5/02H03F3/16H03F3/26H03K17/60
    • H03F3/30H03F3/217H03F3/2171H03K5/023
    • A pulse amplifier formed of first and second field effect transistors, each exhibiting an inherent input capacitance at its gate electrode, the field effect transistors being connected in push-pull relation whereby their drain or source electrodes are connected to a common output terminal. First and second resistive circuits are connected in a pulse supply circuit to supply pulse signals to the respective gate electrodes of the field effect transistors. Each of the resistive circuits exhibits a higher resistance when a pulse is supplied therethrough to turn the respective field effect transistor ON and a lower resistance when the pulse is terminated to turn the respective field effect transistor OFF. The higher resistance of the resistive circuit cooperates with the inherent input capacitance of the respective field effect transistor to provide a higher discharge time constant to turn that field effect transistor ON and the lower resistance cooperates with the inherent input capacitance of the field effect transistor to provide a lower charge time constant to turn that field effect transistor OFF, whereby the field effect transistors are not ON concurrently. In a preferred embodiment, the field effect transistors are complementary field effect transistors so that a positive-going pulse turns one of those field effect transistors OFF while turning the other ON, and a negative-going pulse turns the one field effect transistor ON while turning the other OFF.
    • 由第一场效应晶体管和第二场效应晶体管构成的脉冲放大器,每个场效应晶体管在其栅极处呈现固有的输入电容,场效应晶体管以推挽方式连接,由此其漏极或源极连接到公共输出端。 第一和第二电阻电路连接在脉冲供电电路中,以向场效应晶体管的各个栅电极提供脉冲信号。 当脉冲被提供通过其中以使各个场效应晶体管导通时,每个电阻电路呈现较高的电阻,并且当脉冲终止时使电阻电阻降低,以使各个场效应晶体管截止。 电阻电路的较高电阻与相应的场效应晶体管的固有输入电容配合,以提供更高的放电时间常数,以使该场效应晶体管导通,并且较低电阻与场效应晶体管的固有输入电容配合,以提供 较低的充电时间常数使该场效应晶体管截止,由此场效应晶体管不是同时导通。 在优选实施例中,场效应晶体管是互补的场效应晶体管,使得正向脉冲将这些场效应晶体管中的一个截止,同时使另一个导通,而负向脉冲使一个场效应晶体管导通,同时转动 另一个OFF。
    • 79. 发明授权
    • Surge current protection circuit
    • 浪涌电流保护电路
    • US4091434A
    • 1978-05-23
    • US731766
    • 1976-10-12
    • Tadao SuzukiShigeaki Wachi
    • Tadao SuzukiShigeaki Wachi
    • G05F1/10G05F1/56H02H3/08H02H7/12H02H9/00H02H11/00H02M3/00H02M3/28H03F1/52H02H7/10
    • H03F1/52H02H11/006H02H3/08H02H7/12H02H9/005H02M3/00
    • A surge current protection circuit includes an input terminal supplied with a rectified alternating voltage, an output terminal to be connected to a load, and a semiconductor controlled rectifier having its anode and cathode electrodes connected in series between the input and output terminals. The collector and emitter electrodes of a control transistor are connected between the gate and cathode electrodes of the rectifier. The base-emitter voltage is supplied with any sharp transients, and the transistor becomes conductive before the rectifier if the transients are sharp enough and of high enough amplitude. Conduction of the transistor prevents the semiconductor controlled rectifier from conducting surge currents and protects circuits connected in series with the rectifier.
    • 浪涌电流保护电路包括提供有整流交流电压的输入端子,要连接到负载的输出端子以及其阳极和阴极电极串联连接在输入和输出端子之间的半导体可控整流器。 控制晶体管的集电极和发射极连接在整流器的栅极和阴极之间。 基极 - 发射极电压提供任何尖锐的瞬变,如果瞬变足够锐利且足够高的幅度,晶体管将在整流器之前导通。 晶体管的导通防止半导体可控整流器传导浪涌电流并保护与整流器串联连接的电路。