会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 71. 发明授权
    • Fabrication method of inductor devices using a substrate conversion
technique
    • 使用基板转换技术的电感器件的制造方法
    • US6153489A
    • 2000-11-28
    • US162784
    • 1998-09-30
    • Min ParkHyun Kyu Yu
    • Min ParkHyun Kyu Yu
    • H01L21/02H01L27/08H01L21/20
    • H01L28/10H01L27/08
    • A fabrication method of high performance integrated inductor devices using a substrate conversion technique is disclosed. By employing the trench-shaped porous silicon with high insulating property, the lossy characteristic of the silicon substrate is essentially to minimize. Also, by employing the conductive doped layer interposed between the porous silicon layer and the silicon substrate, the parasitic capacitance between metal lines and the silicon substrate is remarkably decreased. The present invention allows fabrication of high performance integrated inductors having high quality factor. Also, this invention prevents mutual-coupling between the silicon substrate and metal lines. As a result, integrated inductor devices according to this invention is readily adaptable for use in radio frequency integrated circuit (RF IC).
    • 公开了使用基板转换技术的高性能集成电感器件的制造方法。 通过采用具有高绝缘性能的沟槽状多孔硅,硅衬底的有损特性基本上是最小化的。 此外,通过使用介于多孔硅层和硅衬底之间的导电掺杂层,金属线与硅衬底之间的寄生电容显着降低。 本发明允许制造具有高品质因数的高性能集成电感器。 此外,本发明防止硅衬底和金属线之间的相互耦合。 因此,根据本发明的集成电感器件易于适用于射频集成电路(RF IC)。
    • 72. 发明授权
    • Method for forming an inductor devices using substrate biasing technique
    • 使用衬底偏置技术形成电感器件的方法
    • US5770509A
    • 1998-06-23
    • US844750
    • 1997-04-22
    • Hyun-Kyu YuMin Park
    • Hyun-Kyu YuMin Park
    • H01F17/00H01L21/02H01L21/20
    • H01L28/10H01F2017/0046
    • Methods for foming an inductor devices used for impedance matching in the radio frequency integrated circuits are disclosed. In the integrated inductor device according to the present invention, an additional electrode is arranged in surroundings of an inductor metal line, and the reverse bias voltage is applied to the region between the substrate and the electrode so as to form a depletion layer. Therefore, the substrate biasing is effected and thus an inductor having improved performance can be formed by decreasing the parasitic capacitance between the inductor metal line and the substrate. The present invention can also be applied to another semiconductor device having metal lines and pads.
    • 公开了用于在射频集成电路中用于阻抗匹配的电感器件的方法。 在根据本发明的集成电感器件中,在电感器金属线的周围布置附加电极,并且将反向偏置电压施加到衬底和电极之间的区域以形成耗尽层。 因此,进行衬底偏置,因此可以通过减小电感器金属线和衬底之间的寄生电容来形成具有改进性能的电感器。 本发明也可以应用于具有金属线和焊盘的另一半导体器件。