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    • 72. 发明申请
    • Semiconductor device
    • 半导体器件
    • US20070291148A1
    • 2007-12-20
    • US11818292
    • 2007-06-14
    • Hiroaki Takasu
    • Hiroaki Takasu
    • H04N5/335H04N3/14
    • H01L27/14603H01L27/14609H01L27/14643
    • Provided is a MOS image sensor IC in which: conductors for potential fixation, each fixed to the same potential, surround a plurality of pixel regions; the conductors for potential fixation are each formed in a narrow shape in the pixel regions, and are electrically connected to each other so that the conductors have the potential of a silicon substrate. Accordingly, each potential of the entire pixel regions, which are formed under a protective film when a protective film is formed, is made constant, thereby obtaining a uniform thickness and quality of the protective film, which can suppress a variation in photoelectric conversion characteristic of pixels.
    • 提供了一种MOS图像传感器IC,其中:固定为相同电位的电位固定用导体围绕多个像素区域; 用于电位固定的导体各自在像素区域中形成为窄形状,并且彼此电连接,使得导体具有硅衬底的电位。 因此,形成保护膜时形成在保护膜下方的整个像素区域的每个电位保持恒定,从而获得均匀的厚度和质量的保护膜,其可以抑制光电转换特性的变化 像素。
    • 74. 发明申请
    • Semiconductor device and method of manufacturing semiconductor device
    • 半导体装置及其制造方法
    • US20070200189A1
    • 2007-08-30
    • US11709496
    • 2007-02-22
    • Atsushi IwasakiHiroaki Takasu
    • Atsushi IwasakiHiroaki Takasu
    • H01L27/14
    • H01L27/14689H01L27/1463H01L27/14643
    • Provided is a semiconductor device for performing photoelectric conversion of incident light, including: a p-type substrate (1), an n-type well (2) having a predetermined depth and formed in a predetermined region of the p-type substrate (1), and a depletion layer generated at a junction interface between the p-type substrate (1) and the n-type well (2). In the trenches (22) having a depth larger than that of a depletion layer (K1) generated on a bottom side of the n-type well (2) and a width larger than that of depletion layers (K2, K3) generated on sides of the n-type well (2) are provided so as to remove junction interfaces (J2, J3) on the sides of the n-type well (2), and an insulating layer (21) is buried in the trenches (22).
    • 提供一种用于进行入射光的光电转换的半导体器件,包括:p型衬底(1),具有预定深度并形成在p型衬底(1)的预定区域中的n型阱(2) )和在p型衬底(1)和n型阱(2)之间的结界面处产生的耗尽层。 在沟槽(22)中,其深度大于在n型阱(2)的底侧上产生的耗尽层(K L1)的深度,并且其宽度大于耗尽层的宽度 提供在n型阱(2)的侧面上产生的(K 2 N 3,K 3 N),以便去除接合界面(J 2 (2)的侧面上,并且绝缘层(21)被埋在沟槽(22)中。
    • 76. 发明授权
    • Thin film resistor with stress compensation
    • 具有应力补偿的薄膜电阻
    • US06653713B2
    • 2003-11-25
    • US09975823
    • 2001-10-12
    • Hiroaki Takasu
    • Hiroaki Takasu
    • H01L2900
    • H01L27/0802H01L28/20
    • A thin film resistor maintains its resistance value when stress is applied so that it may be used in a high precision bleeder resistor circuit to maintain an accurate voltage dividing ratio. The thin film resistor has a P-type thin film resistor formed of a P-type semiconductor thin film and an N-type thin film resistor formed of an N-type semiconductor thin film overlapping the P-type thin film resistor with an insulating layer interposed therebetween, so that a change in resistance value when stress is applied is prevented. In a bleeder resistor circuit, a resistance value of one unit is regulated by a resistance value formed by a combination of the P-type thin film resistor and the N-type thin film resistor so that an accurate voltage dividing ratio can be maintained when stress is applied.
    • 当施加应力时,薄膜电阻器保持其电阻值,使其可用于高精度泄放电阻电路中,以保持精确的分压比。 薄膜电阻器具有由P型半导体薄膜构成的P型薄膜电阻和由与P型薄膜电阻器重叠的绝缘层的N型半导体薄膜形成的N型薄膜电阻器 插入其间,从而防止施加应力时的电阻值的变化。 在泄放电阻电路中,通过由P型薄膜电阻器和N型薄膜电阻器的组合形成的电阻值来调节一个单位的电阻值,使得在应力时可以保持精确的分压比 被申请;被应用。