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71. 发明申请

US20080307147A1 COMPUTER SYSTEM BUS BRIDGE 失效
标题翻译：计算机系统总线桥
公开(公告)号：US20080307147A1
公开(公告)日：2008-12-11
申请号：US12195134
申请日：2008-08-20
申请人： Giora Biran , Robert Allen Drehmel , Robert Spencer Horton , Mark E. Kautzman , Jamie Randall Kuesel , Ming-i Mark Lin , Eric Oliver Mejdrich , Clarence Rosser Ogilvie , Charles S. Woodruff
发明人： Giora Biran , Robert Allen Drehmel , Robert Spencer Horton , Mark E. Kautzman , Jamie Randall Kuesel , Ming-i Mark Lin , Eric Oliver Mejdrich , Clarence Rosser Ogilvie , Charles S. Woodruff
IPC分类号： G06F13/36 , G06F12/08 , G06F13/00
CPC分类号： G06F13/4059 , G06F12/0831
摘要： A bus bridge between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI). Another preferred embodiment is a bus bridge in a bus transceiver on a multi-chip module.
摘要翻译：高速计算机总线与高速输出总线之间的总线桥。优选实施例是用于来自国际商业机器公司（IBM）的GPUL PowerPC微处理器的GPUL总线与输出高速接口（MPI）之间的总线桥。另一个优选实施例是多芯片模块上的总线收发器中的总线桥。

72. 发明申请

US20080168191A1 Barrier and Interrupt Mechanism for High Latency and Out of Order DMA Device 失效
标题翻译：高延迟和高阶DMA设备的屏障和中断机制
公开(公告)号：US20080168191A1
公开(公告)日：2008-07-10
申请号：US11621776
申请日：2007-01-10
申请人： Giora Biran , Luis E. De la Torre , Bernard C. Drerup , Jyoti Gupta , Richard Nicholas
发明人： Giora Biran , Luis E. De la Torre , Bernard C. Drerup , Jyoti Gupta , Richard Nicholas
IPC分类号： G06F13/28 , G06F12/14
CPC分类号： G06F13/28
摘要： A direct memory access (DMA) device includes a barrier and interrupt mechanism that allows interrupt and mailbox operations to occur in such a way that ensures correct operation, but still allows for high performance out-of-order data moves to occur whenever possible. Certain descriptors are defined to be “barrier descriptors.” When the DMA device encounters a barrier descriptor, it ensures that all of the previous descriptors complete before the barrier descriptor completes. The DMA device further ensures that any interrupt generated by a barrier descriptor will not assert until the data move associated with the barrier descriptor completes. The DMA controller only permits interrupts to be generated by barrier descriptors. The barrier descriptor concept also allows software to embed mailbox completion messages into the scatter/gather linked list of descriptors.
摘要翻译：直接存储器访问（DMA）设备包括屏障和中断机制，允许中断和邮箱操作以确保正确操作的方式发生，但仍然允许在可能的情况下发生高性能无序数据移动。某些描述符被定义为“屏障描述符”。当DMA设备遇到屏障描述符时，它确保所有先前的描述符在屏障描述符完成之前完成。 DMA设备进一步确保在与屏障描述符关联的数据移动完成之前，屏障描述符产生的任何中断都不会断言。 DMA控制器仅允许由屏障描述符生成中断。屏障描述符概念还允许软件将邮箱完成消息嵌入到描述符的分散/收集链接列表中。

73. 发明授权

US07386637B2 System, method, and computer program product for a fully trusted adapter validation of incoming memory mapped I/O operations on a physical adapter that supports virtual adapters or virtual resources 失效
标题翻译：用于完全信任的适配器的系统，方法和计算机程序产品验证支持虚拟适配器或虚拟资源的物理适配器上的传入内存映射I / O操作
公开(公告)号：US07386637B2
公开(公告)日：2008-06-10
申请号：US11066353
申请日：2005-02-25
申请人： Richard Louis Arndt , Giora Biran , Harvey Gene Kiel , Vadim Makhervaks , Renato John Recio , Leah Shalev , Jaya Srikrishnan
发明人： Richard Louis Arndt , Giora Biran , Harvey Gene Kiel , Vadim Makhervaks , Renato John Recio , Leah Shalev , Jaya Srikrishnan
IPC分类号： G06F13/38
CPC分类号： G06F12/1483
摘要： A method, computer program product, and distributed data processing system that allows a single physical I/O adapter to validate that a memory mapped I/O address referenced by an incoming I/O operation is associated with a virtual host that initiated the incoming memory mapped I/O operation is provided. Specifically, the present invention is directed to a mechanism for sharing a PCI family I/O adapter and, in general, any I/O adapter that uses a memory mapped I/O interface for communications. A mechanism is provided that allows a single physical I/O adapter to validate that a memory mapped I/O address referenced by an incoming memory mapped I/O operation used to initiate an I/O transaction is associated with a virtual host that initiated the incoming memory mapped I/O operation.
摘要翻译：一种方法，计算机程序产品和分布式数据处理系统，其允许单个物理I / O适配器验证由进入的I / O操作引用的存储器映射I / O地址与启动进入存储器的虚拟主机相关联提供映射的I / O操作。具体地说，本发明涉及一种用于共享PCI系列I / O适配器以及通常使用任何使用存储器映射I / O接口进行通信的I / O适配器的机制。提供了一种机制，允许单个物理I / O适配器验证由用于启动I / O事务的进入内存映射I / O操作引用的内存映射I / O地址与启动I / O事务的虚拟主机相关联进入内存映射的I / O操作。

74. 发明授权

US07376770B2 System and method for virtual adapter resource allocation matrix that defines the amount of resources of a physical I/O adapter 失效
标题翻译：用于定义物理I / O适配器的资源量的虚拟适配器资源分配矩阵的系统和方法
公开(公告)号：US07376770B2
公开(公告)日：2008-05-20
申请号：US11066521
申请日：2005-02-25
申请人： Richard Louis Arndt , Giora Biran , Harvey Gene Kiel , Vadim Makhervaks , Renato John Recio , Leah Shalev , Jaya Srikrishnan
发明人： Richard Louis Arndt , Giora Biran , Harvey Gene Kiel , Vadim Makhervaks , Renato John Recio , Leah Shalev , Jaya Srikrishnan
IPC分类号： G06F13/38 , G06F13/28 , G06F3/00
CPC分类号： G06F9/5077 , G06F9/5011
摘要： A method, computer program product, and distributed data processing system that enables host software or firmware to allocate virtual resources to one or more system images from a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, is provided. Adapter resource groups are assigned to respective system images. An adapter resource group is exclusively available to the system image to which the adapter resource group assignment was made. Assignment of adapter resource groups may be made per a relative resource assignment or an absolute resource assignment. In another embodiment, adapter resource groups are assigned to system images on a first come, first served basis.
摘要翻译：一种方法，计算机程序产品和分布式数据处理系统，其使得主机软件或固件能够将虚拟资源分配给来自单个物理I / O适配器（例如PCI，PCI-X或PCI-E）的一个或多个系统图像适配器。适配器资源组分配给相应的系统映像。适配器资源组对适配器资源组分配进行了分配的系统映像是唯一可用的。适配器资源组的分配可以根据相对资源分配或绝对资源分配进行。在另一个实施例中，适配器资源组以先到先得的原则被分配给系统图像。

75. 发明申请

US20070288828A1 DATA TRANSFER ERROR CHECKING 失效
标题翻译：数据传输错误检查
公开(公告)号：US20070288828A1
公开(公告)日：2007-12-13
申请号：US11843938
申请日：2007-08-23
申请人： Giora Biran , Zorik Machulsky , Vadim Makhervaks
发明人： Giora Biran , Zorik Machulsky , Vadim Makhervaks
IPC分类号： H03M13/09
CPC分类号： H03M13/00
摘要： An RNIC implementation that performs direct data placement to memory where all segments of a particular connection are aligned, or moves data through reassembly buffers where all segments of a particular connection are non-aligned. The type of connection that cuts-through without accessing the reassembly buffers is referred to as a “Fast” connection because it is highly likely to be aligned, while the other type is referred to as a “Slow” connection. When a consumer establishes a connection, it specifies a connection type. The connection type can change from Fast to Slow and back. The invention reduces memory bandwidth, latency, error recovery using TCP retransmit and provides for a “graceful recovery” from an empty receive queue. The implementation also may conduct CRC validation for a majority of inbound DDP segments in the Fast connection before sending a TCP acknowledgement (Ack) confirming segment reception.
摘要翻译：执行直接数据放置到特定连接的所有段对齐的存储器的RNIC实现，或者通过重组缓冲区移动数据，其中特定连接的所有段都不对齐。在不访问重组缓冲区的情况下，直接连接的类型被称为“快速”连接，因为它很可能被对齐，而另一种类型被称为“慢速”连接。当消费者建立连接时，它指定一个连接类型。连接类型可以从快速变慢到慢。本发明减少了内存带宽，延迟，使用TCP重传的错误恢复，并提供了从空接收队列的“优雅恢复”。在确认段接收之前，实现还可以在Fast连接中的大部分入站DDP段进行CRC校验。

76. 发明授权

US07260664B2 Interrupt mechanism on an IO adapter that supports virtualization 有权
标题翻译：支持虚拟化的IO适配器上的中断机制
公开(公告)号：US07260664B2
公开(公告)日：2007-08-21
申请号：US11065951
申请日：2005-02-25
申请人： Richard Louis Arndt , Giora Biran , Vadim Makhervaks , Renato John Recio , Leah Shalev , Jaya Srikrishnan
发明人： Richard Louis Arndt , Giora Biran , Vadim Makhervaks , Renato John Recio , Leah Shalev , Jaya Srikrishnan
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , G06F2213/0024
摘要： A mechanism for handling event notifications or interrupts in a logically partitioned computing system having IO adapters that support adapter virtualization are provided. A virtual adapter associated with a physical IO adapter detects an event, identifies a logical partition associated with the event, and writes an event notification entry in a partition interrupt control block (PICB) of the logical partition memory space. The virtual adapter notifies shared control point logic on the physical IO adapter of the update to the PICB which may then write an entry to a logical partition manager interrupt control block (LPAR manager ICB) identifying the update to the PICB and the operating system associated with the PICB. The LPAR manager may then inform the operating system of the logical partition of the updates to the PICB which may then read the entries in the PICB, process them and inform appropriate application instances of the events.
摘要翻译：提供了一种在具有支持适配器虚拟化的IO适配器的逻辑分区计算系统中处理事件通知或中断的机制。与物理IO适配器相关联的虚拟适配器检测事件，识别与事件相关联的逻辑分区，并将事件通知条目写入逻辑分区存储器空间的分区中断控制块（PICB）。虚拟适配器将更新的物理IO适配器上的共享控制点逻辑通知给PICB，PICB可以将条目写入逻辑分区管理器中断控制块（LPAR管理器ICB），以识别PICB和与之相关的操作系统的更新 PICB。然后，LPAR管理器可以通知操作系统对PICB的更新的逻辑分区，然后可以读取PICB中的条目，处理它们并通知事件的适当应用实例。

77. 发明授权

US07234017B2 Computer system architecture for a processor connected to a high speed bus transceiver 有权
标题翻译：用于连接到高速总线收发器的处理器的计算机系统架构
公开(公告)号：US07234017B2
公开(公告)日：2007-06-19
申请号：US11064745
申请日：2005-02-24
申请人： Giora Biran , Matthew Adam Cushing , Robert Allen Drehmel , Allen James Gavin , Mark E. Kautzman , Jamie Randall Kuesel , Ming-I Mark Lin , David Arnold Luick , James Anthony Marcella , Mark Owen Maxson , Eric Oliver Mejdrich , Adam James Muff , Clarence Rosser Ogilvie , Charles S. Woodruff
发明人： Giora Biran , Matthew Adam Cushing , Robert Allen Drehmel , Allen James Gavin , Mark E. Kautzman , Jamie Randall Kuesel , Ming-I Mark Lin , David Arnold Luick , James Anthony Marcella , Mark Owen Maxson , Eric Oliver Mejdrich , Adam James Muff , Clarence Rosser Ogilvie , Charles S. Woodruff
IPC分类号： G06F13/36
CPC分类号： G06F13/4059
摘要： A high speed computer processor system has a high speed interface for a graphics processor. A preferred embodiment combines a PowerPC microprocessor called the Giga-Processor Ultralite (GPUL) 110 from International Business Machines Corporation (IBM) with a high speed interface on a multi-chip module.
摘要翻译：高速计算机处理器系统具有用于图形处理器的高速接口。优选实施例将来自国际商业机器公司（IBM）的称为Giga-Processor Ultralite（GPUL）110的PowerPC微处理器与多芯片模块上的高速接口相结合。

78. 发明授权

US07177941B2 Increasing TCP re-transmission process speed 有权
标题翻译：增加TCP重传过程速度
公开(公告)号：US07177941B2
公开(公告)日：2007-02-13
申请号：US10733630
申请日：2003-12-11
申请人： Giora Biran , Zorik Machulsky , Vadim Makhervaks , Leah Shalev
发明人： Giora Biran , Zorik Machulsky , Vadim Makhervaks , Leah Shalev
IPC分类号： G06F15/16 , G06F15/173 , G01R31/08
CPC分类号： H04L69/16 , H04L69/163
摘要： An RNIC implementation that performs direct data placement to memory where all segments of a particular connection are aligned, or moves data through reassembly buffers where all segments of a particular connection are non-aligned. The type of connection that cuts-through without accessing the reassembly buffers is referred to as a “Fast” connection because it is highly likely to be aligned, while the other type is referred to as a “Slow” connection. When a consumer establishes a connection, it specifies a connection type. The connection type can change from Fast to Slow and back. The invention reduces memory bandwidth, latency, error recovery using TCP retransmit and provides for a “graceful recovery” from an empty receive queue. The implementation also may conduct CRC validation for a majority of inbound DDP segments in the Fast connection before sending a TCP acknowledgement (Ack) confirming segment reception.
摘要翻译：执行直接数据放置到特定连接的所有段对齐的存储器的RNIC实现，或者通过重组缓冲区移动数据，其中特定连接的所有段都不对齐。在不访问重组缓冲区的情况下，直接连接的类型被称为“快速”连接，因为它很可能被对齐，而另一种类型被称为“慢速”连接。当消费者建立连接时，它指定一个连接类型。连接类型可以从快速变慢到慢。本发明减少了内存带宽，延迟，使用TCP重传的错误恢复，并提供了从空接收队列的“优雅恢复”。在确认段接收之前，实现还可以在Fast连接中的大部分入站DDP段进行CRC校验。

79. 发明申请

US20060262799A1 Transmit flow for network acceleration architecture 有权
标题翻译：传输流网络加速架构
公开(公告)号：US20060262799A1
公开(公告)日：2006-11-23
申请号：US11132853
申请日：2005-05-19
申请人： Giora Biran , Zorik Machulsky , Vadim Makhervaks , Renato Recio , Julian Satran , Leah Shalev , Ilan Shimony
发明人： Giora Biran , Zorik Machulsky , Vadim Makhervaks , Renato Recio , Julian Satran , Leah Shalev , Ilan Shimony
IPC分类号： H04L12/56
CPC分类号： H04L69/16 , H04L69/12 , H04L69/161 , H04L69/163
摘要： A method for receiving data in a network acceleration architecture for use with TCP (transport control protocol), iSCSI (Internet Small Computer System Interface) and/or RDMA (Remote Direct Memory Access) over TCP, including providing a hardware acceleration engine, called a streamer, adapted for communication with and processing data from a consumer application in a system that supports TCP, iSCSI and RDMA over TCP, providing a software protocol processor adapted for carrying out TCP implementation, the software control processor being called a TCE (TCP Control Engine), wherein the streamer and the TCE are adapted to operate asynchronously and independently of one another, and transmitting a TCP segment with the streamer.
摘要翻译：一种用于在TCP（传输控制协议），iSCSI（因特网小型计算机系统接口）和/或RDMA（远程直接存储器访问）TCP上使用的网络加速架构中接收数据的方法，包括提供称为流式传输器，适用于通过TCP支持TCP，iSCSI和RDMA的系统中的消费者应用程序的通信和处理数据，提供适用于执行TCP实现的软件协议处理器，该软件控制处理器被称为TCE（TCP控制引擎），其中所述流送器和所述TCE适于彼此异步地且彼此独立地操作，并且与所述流送器传输TCP段。

80. 发明申请

US20060221946A1 CONNECTION ESTABLISHMENT ON A TCP OFFLOAD ENGINE 审中-公开
标题翻译： TCP卸载引擎的连接建立
公开(公告)号：US20060221946A1
公开(公告)日：2006-10-05
申请号：US10907507
申请日：2005-04-04
申请人： Leah Shalev , Giora Biran
发明人： Leah Shalev , Giora Biran
IPC分类号： H04L12/56
CPC分类号： H04L69/16 , H04L69/12 , H04L69/163 , H04L69/326
摘要： A method for performing connection establishment in TCP (transmission control protocol), the method including sending a SYN segment from a sender to a TCP offload engine (TOE), the SYN segment comprising a TCP packet adapted to synchronize sequence numbers on connecting computers, creating a connection context, acknowledging receipt of the SYN segment by sending a SYN/ACK segment to the sender, and sending an ACK segment from the sender to the TOE to acknowledge receipt of the SYN/ACK segment. Alternatively, the method may include sending a SYN segment from a sender to a computer, acknowledging receipt of the SYN segment by sending a SYN/ACK segment to the TOE, creating a connection context, and sending an ACK segment from the TOE to acknowledge receipt of the SYN/ACK segment.
摘要翻译：一种用于在TCP（传输控制协议）中执行连接建立的方法，所述方法包括从发送方向TCP卸载引擎（TOE）发送SYN段，所述SYN段包括适于在连接计算机上同步序列号的TCP分组，连接上下文，通过向发送者发送SYN / ACK段来确认SYN段的接收，以及从发送方向TOE发送ACK段以确认接收到SYN / ACK段。或者，该方法可以包括从发送方发送SYN分段到计算机，通过向TOE发送SYN / ACK分段来确认接收到SYN分段，创建连接上下文，以及从TOE发送ACK分段以确认接收的SYN / ACK段。

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