专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明申请

US20160247704A1 LED DIE DISPERSAL IN DISPLAYS AND LIGHT PANELS WITH PRESERVING NEIGHBORING RELATIONSHIP 审中-公开
标题翻译：显示屏和LED面板中的LED指示灯保持相邻关系
公开(公告)号：US20160247704A1
公开(公告)日：2016-08-25
申请号：US15143748
申请日：2016-05-02
申请人： Chan-Long Shieh , Gang Yu
发明人： Chan-Long Shieh , Gang Yu
IPC分类号： H01L21/683 , H01L21/687 , H01L25/075 , H01L27/12 , H01L33/44 , H01L33/58 , H01L33/62 , H01L21/677 , H01L25/00
CPC分类号： H01L21/6836 , H01L21/67144 , H01L21/67721 , H01L21/68757 , H01L21/68778 , H01L25/042 , H01L25/0753 , H01L25/50 , H01L27/1222 , H01L27/1225 , H01L31/18 , H01L33/0095 , H01L33/44 , H01L33/58 , H01L33/62 , H01L2224/83 , H01L2224/95 , H01L2225/06527 , H01L2225/06555 , H01L2924/0002 , H01L2933/0025 , H01L2933/0058 , H01L2933/0066 , Y10T156/171 , H01L2924/00
摘要： A method of dispersing semiconductor chips from a wafer of semiconductor chips onto a substrate while preserving the neighboring relationship of each chip to each adjacent chip is disclosed. The method includes dispersing the wafer into sequential columns of semiconductor chips with a first pitch between columns while preserving the neighboring relationship and sequentially dispersing the columns of semiconductor chips into rows of individual chips with a second pitch between rows onto a substrate while preserving the neighboring relationship.
摘要翻译：公开了将半导体芯片从半导体芯片的晶片分散到基板上同时保持每个芯片与每个相邻芯片的相邻关系的方法。该方法包括将晶片分散在具有列之间的第一间距的顺序的半导体芯片列中，同时保持相邻关系，并将半导体芯片的列顺序地分散到具有行之间的第二间距的单个芯片行到基板上，同时保持相邻关系。

72. 发明授权

US09401431B2 Double self-aligned metal oxide TFT 有权
标题翻译：双自对准金属氧化物TFT
公开(公告)号：US09401431B2
公开(公告)日：2016-07-26
申请号：US13366503
申请日：2012-02-06
申请人： Chan-Long Shieh , Gang Yu
发明人： Chan-Long Shieh , Gang Yu
IPC分类号： H01L21/04 , H01L21/02 , H01L27/12 , H01L29/786 , H01L29/66 , H01L29/45
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L27/1225 , H01L27/1259 , H01L29/45 , H01L29/66969 , H01L29/78606
摘要： A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.
摘要翻译：在透明基板上制造金属氧化物TFT的方法包括以下步骤：在衬底的前表面上定位不透明栅极金属区域，沉积覆盖栅极金属和周围区域的透明栅极电介质和透明金属氧化物半导体层，沉积透明钝化在所述半导体材料上沉积光致抗蚀剂，在所述钝化材料上沉积光致抗蚀剂，曝光和显影所述光致抗蚀剂以去除暴露部分，蚀刻所述钝化材料以留下限定沟道区的钝化区，在所述钝化区上沉积透明导电材料，导电材料，曝光和显影光致抗蚀剂以去除未曝光部分，并且蚀刻导电材料以在沟道区域的相对侧上留下源极和漏极区域。

73. 发明授权

US09397282B2 Active matrix light emitting diode array and projector display comprising it 有权
标题翻译：有源矩阵发光二极管阵列和包括它的投影仪显示器
公开(公告)号：US09397282B2
公开(公告)日：2016-07-19
申请号：US14620910
申请日：2015-02-12
申请人： Chan-Long Shieh , Gang Yu
发明人： Chan-Long Shieh , Gang Yu
IPC分类号： H01L21/00 , H01L33/64 , H01L27/12 , H01L33/00 , H01L33/44 , H01L33/46 , H01L33/62 , H01L31/0368 , H01L27/146 , H01L31/0376 , H01L31/20
CPC分类号： H01L33/642 , H01L23/3677 , H01L27/1218 , H01L27/1225 , H01L27/1248 , H01L27/1262 , H01L27/1463 , H01L27/14663 , H01L27/14692 , H01L31/0368 , H01L31/0376 , H01L31/20 , H01L33/0075 , H01L33/44 , H01L33/46 , H01L33/62 , H01L2933/0025 , H01L2933/0033 , H01L2933/0066 , H01L2933/0075
摘要： A method of fabricating a pixelated projector display includes providing a wafer with a supporting substrate, a first semiconductive layer, an emission layer, and a second semiconductive layer. The wafer is patterned into an array of LEDs/LDs and a planarization layer is deposited over the array. One via for each LED/LD element is formed through the planarization layer. A MOTFT backplane is positioned on the planarization layer, one driver circuit in controlling electrical communication with each via through the planarization layer. A passivation layer is deposited over the MOTFT backplane and heat plugs are extended through the passivation layer, the MOTFT backplane, the planarization layer, and the III-V LED/LD wafer partially through the first semiconductive layer to thermally couple heat from the array of LEDs/LDs to the surface of the passivation layer. An upper end of the heat plugs is accessible for thermal coupling to a heat spreader and/or a heatsink.
摘要翻译：制造像素化投影仪显示器的方法包括向晶片提供支撑衬底，第一半导体层，发射层和第二半导体层。将晶片图案化成LED / LD阵列，并且平坦化层沉积在阵列上。通过平坦化层形成每个LED / LD元件的一个通孔。 MFTFT背板位于平坦化层上，一个驱动电路通过平坦化层控制与每个通孔的电连通。钝化层沉积在MOTFT背板上，并且热插塞通过钝化层，MOTFT背板，平坦化层和III-V LED / LD晶片部分延伸穿过第一半导体层，以热耦合来自 LED / LDs到钝化层的表面。散热器和/或散热器的热连接可以接近热塞的上端。

74. 发明授权

US09331230B2 LED die dispersal in displays and light panels with preserving neighboring relationship 有权
标题翻译： LED裸片分散在显示屏和灯板之间，保持邻近的关系
公开(公告)号：US09331230B2
公开(公告)日：2016-05-03
申请号：US13663519
申请日：2012-10-30
申请人： Chan-Long Shieh , Gang Yu
发明人： Chan-Long Shieh , Gang Yu
IPC分类号： H05K3/30 , H01L31/18 , H01L21/67 , H01L33/00 , H01L25/04 , H01L25/075
CPC分类号： H01L21/6836 , H01L21/67144 , H01L21/67721 , H01L21/68757 , H01L21/68778 , H01L25/042 , H01L25/0753 , H01L25/50 , H01L27/1222 , H01L27/1225 , H01L31/18 , H01L33/0095 , H01L33/44 , H01L33/58 , H01L33/62 , H01L2224/83 , H01L2224/95 , H01L2225/06527 , H01L2225/06555 , H01L2924/0002 , H01L2933/0025 , H01L2933/0058 , H01L2933/0066 , Y10T156/171 , H01L2924/00
摘要： A method of dispersing semiconductor chips from a wafer of semiconductor chips onto a substrate while preserving the neighboring relationship of each chip to each adjacent chip is disclosed. The method includes dispersing the wafer into sequential columns of semiconductor chips with a first pitch between columns while preserving the neighboring relationship and sequentially dispersing the columns of semiconductor chips into rows of individual chips with a second pitch between rows onto a substrate while preserving the neighboring relationship.
摘要翻译：公开了将半导体芯片从半导体芯片的晶片分散到基板上同时保持每个芯片与每个相邻芯片的相邻关系的方法。该方法包括将晶片分散在具有列之间的第一间距的顺序的半导体芯片列中，同时保持相邻关系，并将半导体芯片的列顺序地分散到具有行之间的第二间距的单个芯片行到基板上，同时保持相邻关系。

75. 发明授权

US09306078B2 Stable amorphous metal oxide semiconductor 有权
公开(公告)号：US09306078B2
公开(公告)日：2016-04-05
申请号：US12206615
申请日：2008-09-08
申请人： Chan-Long Shieh , Gang Yu
发明人： Chan-Long Shieh , Gang Yu
IPC分类号： H01L29/10 , H01L29/786 , H01L21/02 , H01L29/04 , H01L27/12 , H01L21/285 , H01L51/50 , H01L21/00 , H01L21/16
CPC分类号： H01L29/04 , H01L21/00 , H01L21/02554 , H01L21/02565 , H01L21/02592 , H01L21/16 , H01L21/28556 , H01L27/1214 , H01L27/1225 , H01L29/24 , H01L29/7869 , H01L29/78693 , H01L51/5012
摘要： A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.

76. 发明申请

US20150263078A1 FLEXIBLE TFT BACKPANEL BY GLASS SUBSTRATE REMOVAL 有权
标题翻译：透明玻璃底板去除柔性TFT背板
公开(公告)号：US20150263078A1
公开(公告)日：2015-09-17
申请号：US14216920
申请日：2014-03-17
申请人： Chan-Long Shieh , Fatt Foong , Gang Yu , Guangming Wang
发明人： Chan-Long Shieh , Fatt Foong , Gang Yu , Guangming Wang
IPC分类号： H01L27/32 , H01L51/52 , H01L29/786 , H01L51/56 , H01L51/00 , H01L27/12
CPC分类号： H01L27/3244 , H01L27/1259 , H01L27/322 , H01L29/78603 , H01L51/003 , H01L51/0097 , H01L51/5246 , H01L51/56 , H01L2227/323 , H01L2251/5338
摘要： A process of fabricating a flexible TFT back-panel on a glass support includes a step of providing a flat glass support member sufficiently thick to prevent bending during the processing. A layer of etch stop material is positioned on the upper surface of the glass support member and an insulating buffer layer is positioned on the layer of etch stop material. A TFT back-panel is positioned on the insulating buffer layer and a flexible plastic carrier is affixed to the TFT back-panel. The glass support member is etched away, whereby a flexible TFT back-panel is provided. The TFT back-panel can include a matrix of either OLED cells or LCD cells.
摘要翻译：在玻璃支架上制造柔性TFT背板的工艺包括提供足够厚的平板玻璃支撑件以防止加工过程中弯曲的步骤。一层蚀刻停止材料定位在玻璃支撑构件的上表面上，并且绝缘缓冲层位于蚀刻停止材料层上。 TFT背板位于绝缘缓冲层上，柔性塑料载体固定在TFT后面板上。蚀刻玻璃支撑构件，由此提供柔性TFT背面板。 TFT背面板可以包括OLED单元或LCD单元的矩阵。

77. 发明申请

US20150137113A1 MOTFT WITH UN-PATTERNED ETCH-STOP 有权
标题翻译：具有不间断蚀刻的MOTFT
公开(公告)号：US20150137113A1
公开(公告)日：2015-05-21
申请号：US14081130
申请日：2013-11-15
申请人： Gang Yu , Chan-Long Shieh , Juergen Musolf , Fatt Foong , Tian Xiao
发明人： Gang Yu , Chan-Long Shieh , Juergen Musolf , Fatt Foong , Tian Xiao
IPC分类号： H01L29/786 , H01L29/24 , H01L21/02 , H01L29/66
CPC分类号： H01L27/1203 , H01L21/02565 , H01L21/02664 , H01L29/24 , H01L29/66969 , H01L29/7869
摘要： A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.
摘要翻译：一种制造高迁移率半导体金属氧化物薄膜晶体管的方法，包括以下步骤：沉积半导体金属氧化物材料层，在MO材料层上沉积蚀刻停止材料的覆盖层，以及图案化源/漏层包括将源极/漏极金属层蚀刻成定位成限定半导体金属氧化物层中的沟道区域的源极/漏极端子的蚀刻停止材料的覆盖层上的金属。蚀刻停止材料至少在源极/漏极端子之下在垂直于覆盖层的平面的方向上导电，以在源极/漏极端子和半导体金属氧化物材料层之间提供电接触。蚀刻停止材料也是化学稳固的，以在蚀刻工艺期间保护半导体金属氧化物沟道材料层。

78. 发明授权

US08962377B2 Pixelated imager with motfet and process 有权
标题翻译： Pixelated成像器与motfet和过程
公开(公告)号：US08962377B2
公开(公告)日：2015-02-24
申请号：US13713744
申请日：2012-12-13
申请人： Chan-Long Shieh , Gang Yu
发明人： Chan-Long Shieh , Gang Yu
IPC分类号： H01L21/00 , H01L31/20 , H01L31/0368 , H01L31/0376
CPC分类号： H01L31/20 , H01L27/1225 , H01L27/1463 , H01L27/14632 , H01L27/14663 , H01L27/14687 , H01L27/14692 , H01L31/0368 , H01L31/0376 , Y02E10/50
摘要： A method of fabricating a pixelated imager includes providing a substrate with bottom contact layer and sensing element blanket layers on the contact layer. The blanket layers are separated into an array of sensing elements by trenches isolating adjacent sensing elements. A sensing element electrode is formed adjacent each sensing element overlying a trench and defining a TFT. A layer of metal oxide semiconductor (MOS) material is formed on a dielectric layer overlying the electrodes and on an exposed upper surface of the blanket layers defining the sensing element adjacent each TFT. A layer of metal is deposited on each TFT and separated into source/drain electrodes on opposite sides of the sensing element electrode. The metal forming one of the S/D electrodes contacts the MOS material overlying the exposed surface of the semiconductor layer, whereby each sensing element in the array is electrically connected to the adjacent TFT by the MOS material.
摘要翻译：制造像素化成像器的方法包括在接触层上提供底层接触层和感测元件覆盖层。橡皮布层通过隔离相邻感测元件的沟槽分离成感测元件的阵列。感测元件电极邻近覆盖沟槽的每个感测元件形成并且限定TFT。一层金属氧化物半导体（MOS）材料形成在覆盖电极的电介质层上，并且在覆盖层的暴露的上表面上形成与每个TFT相邻的感测元件。一层金属沉积在每个TFT上，并分离成在感测元件电极的相对侧上的源极/漏极。形成S / D电极之一的金属接触覆盖半导体层的暴露表面的MOS材料，由此阵列中的每个感测元件通过MOS材料电连接到相邻的TFT。

79. 发明申请

US20120313092A1 METAL OXIDE TFT WITH IMPROVED SOURCE/DRAIN CONTACTS 有权
标题翻译：具有改进源/漏联系的金属氧化物薄膜
公开(公告)号：US20120313092A1
公开(公告)日：2012-12-13
申请号：US13155749
申请日：2011-06-08
申请人： Chan-Long Shieh , Gang Yu , Fatt Foong
发明人： Chan-Long Shieh , Gang Yu , Fatt Foong
IPC分类号： H01L29/786 , H01L21/383
CPC分类号： H01L29/7869 , H01L21/428 , H01L29/45 , H01L29/66969 , H01L29/78606
摘要： A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal.
摘要翻译：在金属氧化物半导体薄膜晶体管中形成欧姆源极/漏极接触的方法包括：提供栅极，栅极电介质，具有带隙的高载流子浓度金属氧化物半导体有源层和间隔开的源/漏极金属接触体薄膜晶体管配置。间隔开的源极/漏极金属触点限定有源层中的沟道区。在沟道区域附近提供氧化环境，并且栅极和沟道区域在氧化环境中被加热以降低沟道区域中的载流子浓度。或者或另外每个源极/漏极触点包括位于金属氧化物半导体有源层上的非常薄的低功函数金属层，并且高功函数金属的势垒层位于低功函数金属上。

80. 发明申请

US20120168744A1 SELF-ALIGNED METAL OXIDE TFT WITH REDUCED NUMBER OF MASKS 有权
标题翻译：自对准金属氧化物膜，具有减少数量的掩模
公开(公告)号：US20120168744A1
公开(公告)日：2012-07-05
申请号：US13195882
申请日：2011-08-02
申请人： Chan-Long Shieh , Gang Yu , Fatt Foong
发明人： Chan-Long Shieh , Gang Yu , Fatt Foong
IPC分类号： H01L29/786 , H01L21/8254
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565
摘要： A method of fabricating MO TFTs on transparent substrates by positioning opaque gate metal on the front surface of the substrate defining a gate area, depositing gate dielectric material on the front surface of the substrate, overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material on the gate dielectric material. Depositing etch stop material on the semiconductor material. Positioning photoresist on the etch stop material, the etch stop material and the photoresist being selectively removable, and the photoresist defining an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the rear surface of the substrate using the gate metal as a mask and removing exposed portions so as to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material on the etch stop layer and on the semiconductor material to form source and drain areas on opposed sides of the channel area.
摘要翻译：一种在透明基板上制造MO TFT的方法，该方法是通过在形成栅极区域的衬底的前表面上定位不透明栅极金属，在衬底的前表面上沉积栅介电材料，覆盖栅极金属和周围区域，并沉积金属氧化物半导体材料。在半导体材料上沉积蚀刻停止材料。将光致抗蚀剂定位在蚀刻停止材料上，蚀刻停止材料和光致抗蚀剂可选择性地移除，并且光刻胶在半导体材料中限定隔离区域。去除蚀刻停止件的未覆盖部分。使用栅极金属作为掩模从基板的后表面露出光致抗蚀剂，并除去暴露部分，以使除蚀刻停止材料未被覆盖，除了覆盖并与栅极金属对准的部分之外。蚀刻半导体材料的未覆盖部分以隔离TFT。使用光致抗蚀剂，选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分并限定半导体材料中的沟道区域。在蚀刻停止层和半导体材料上沉积和图案化导电材料，以在沟道区域的相对侧上形成源极和漏极区域。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式