会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 72. 发明申请
    • ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 有机发光显示装置及其制造方法
    • US20120326174A1
    • 2012-12-27
    • US13368536
    • 2012-02-08
    • Byoung-Keon ParkTak-Young LeeJin-Wook SeoKi-Yong LeeHeung-Yeol Na
    • Byoung-Keon ParkTak-Young LeeJin-Wook SeoKi-Yong LeeHeung-Yeol Na
    • H01L33/62
    • H01L29/78627H01L27/3262H01L29/42384
    • A method of manufacturing an organic light-emitting display device includes forming a gate electrode including a lower gate electrode on a gate insulating layer and an upper gate electrode on the lower gate electrode; forming a source region and a drain region at a semiconductor active layer using the gate electrode as a mask; forming an interlayer insulating layer on a substrate and etching the interlayer insulating layer, resulting in contact holes that expose portions of the source region and the drain region; forming a source/drain electrode raw material on the substrate and etching the source/drain electrode raw material to form a source electrode and a drain electrode; forming a gold overlapped lightly doped drain (GOLDD) structure having a LDD region at the semiconductor active layer by injecting impurity ions; depositing a protective layer on the substrate; and forming a display device on the substrate.
    • 一种制造有机发光显示装置的方法包括在栅绝缘层上形成包括下栅电极的栅电极和在下栅电极上形成上栅电极; 使用栅电极作为掩模在半导体有源层上形成源区和漏区; 在衬底上形成层间绝缘层,蚀刻层间绝缘层,形成露出源区和漏区的部分的接触孔; 在所述基板上形成源极/漏极原料,并蚀刻所述源极/漏极原料以形成源极和漏极; 通过注入杂质离子在半导体有源层上形成具有LDD区的金重叠轻掺杂漏极(GOLDD)结构; 在衬底上沉积保护层; 以及在所述基板上形成显示装置。
    • 73. 发明授权
    • Organic light-emitting display device and method of manufacturing the same
    • 有机发光显示装置及其制造方法
    • US08658460B2
    • 2014-02-25
    • US13368536
    • 2012-02-08
    • Byoung-Keon ParkTak-Young LeeJin-Wook SeoKi-Yong LeeHeung-Yeol Na
    • Byoung-Keon ParkTak-Young LeeJin-Wook SeoKi-Yong LeeHeung-Yeol Na
    • H01L51/40H01L21/00
    • H01L29/78627H01L27/3262H01L29/42384
    • A method of manufacturing an organic light-emitting display device includes forming a gate electrode including a lower gate electrode on a gate insulating layer and an upper gate electrode on the lower gate electrode; forming a source region and a drain region at a semiconductor active layer using the gate electrode as a mask; forming an interlayer insulating layer on a substrate and etching the interlayer insulating layer, resulting in contact holes that expose portions of the source region and the drain region; forming a source/drain electrode raw material on the substrate and etching the source/drain electrode raw material to form a source electrode and a drain electrode; forming a gold overlapped lightly doped drain (GOLDD) structure having a LDD region at the semiconductor active layer by injecting impurity ions; depositing a protective layer on the substrate; and forming a display device on the substrate.
    • 一种制造有机发光显示装置的方法包括在栅绝缘层上形成包括下栅电极的栅电极和在下栅电极上形成上栅电极; 使用栅电极作为掩模在半导体有源层上形成源区和漏区; 在衬底上形成层间绝缘层,蚀刻层间绝缘层,形成露出源区和漏区的部分的接触孔; 在所述基板上形成源极/漏极原料,并蚀刻所述源极/漏极原料以形成源极和漏极; 通过注入杂质离子在半导体有源层上形成具有LDD区的金重叠轻掺杂漏极(GOLDD)结构; 在衬底上沉积保护层; 以及在所述基板上形成显示装置。
    • 76. 发明授权
    • Thin film transistor and method for fabricating the same
    • 薄膜晶体管及其制造方法
    • US07935586B2
    • 2011-05-03
    • US12853263
    • 2010-08-09
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • H01L21/84
    • H01L29/78654H01L29/66757H01L29/66772H01L29/78675H01L29/78696
    • A thin film transistor that has improved characteristics and uniformity is developed by uniformly controlling low concentration of crystallization catalyst and controlling crystallization position so that no seed exists and no grain boundary exists, or one grain boundary exists in a channel layer of the thin film transistor. The thin film transistor includes a substrate; a semiconductor layer pattern which is formed on the substrate, the semiconductor layer pattern having a channel layer of which no seed exists and no gram boundary exists; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film. A method for fabricating the thin film transistor includes forming an amorphous silicon layer on a substrate; forming a semiconductor layer pattern having a channel layer in which no seed exists and no grain boundary exists by crystallizing and patterning the amorphous silicon layer; forming a gate insulating film on the semiconductor layer pattern; and forming a gate electrode on the gate insulating film.
    • 通过均匀控制结晶催化剂的低浓度和控制结晶位置,使得不存在晶种并且不存在晶界,或者在薄膜晶体管的沟道层中存在一个晶界,开发出具有改善的特性和均匀性的薄膜晶体管。 薄膜晶体管包括基板; 形成在所述基板上的半导体层图案,所述半导体层图案具有不存在种子的沟道层,并且不存在晶界; 形成在半导体层图案上的栅极绝缘膜; 以及形成在栅极绝缘膜上的栅电极。 一种薄膜晶体管的制造方法,包括在基板上形成非晶硅层; 形成具有不存在种子的沟道层的半导体层图案,并且通过对非晶硅层进行结晶和图案化而不存在晶界; 在半导体层图案上形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极。
    • 77. 发明申请
    • THIN FILM TRANSISTOR AND METHOD FOR FABRICATING THE SAME
    • 薄膜晶体管及其制造方法
    • US20110020990A1
    • 2011-01-27
    • US12853263
    • 2010-08-09
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • H01L21/336
    • H01L29/78654H01L29/66757H01L29/66772H01L29/78675H01L29/78696
    • A thin film transistor that has improved characteristics and uniformity is developed by uniformly controlling low concentration of crystallization catalyst and controlling crystallization position so that no seed exists and no grain boundary exists, or one grain boundary exists in a channel layer of the thin film transistor. The thin film transistor includes a substrate; a semiconductor layer pattern which is formed on the substrate, the semiconductor layer pattern having a channel layer of which no seed exists and no gram boundary exists; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film. A method for fabricating the thin film transistor includes forming an amorphous silicon layer on a substrate; forming a semiconductor layer pattern having a channel layer in which no seed exists and no grain boundary exists by crystallizing and patterning the amorphous silicon layer; forming a gate insulating film on the semiconductor layer pattern; and forming a gate electrode on the gate insulating film.
    • 通过均匀控制结晶催化剂的低浓度和控制结晶位置,使得不存在晶种并且不存在晶界,或者在薄膜晶体管的沟道层中存在一个晶界,开发出具有改善的特性和均匀性的薄膜晶体管。 薄膜晶体管包括基板; 形成在所述基板上的半导体层图案,所述半导体层图案具有不存在种子的沟道层,并且不存在晶界; 形成在半导体层图案上的栅极绝缘膜; 以及形成在栅极绝缘膜上的栅电极。 一种薄膜晶体管的制造方法,包括在基板上形成非晶硅层; 形成具有不存在种子的沟道层的半导体层图案,并且通过对非晶硅层进行结晶和图案化而不存在晶界; 在半导体层图案上形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极。
    • 80. 发明授权
    • Method of fabricating thin film transistor
    • 制造薄膜晶体管的方法
    • US07795082B2
    • 2010-09-14
    • US11741273
    • 2007-04-27
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • H01L21/00
    • H01L21/02672H01L21/02488H01L21/02532H01L21/3226H01L27/1277H01L27/1288
    • A method of fabricating a CMOS thin film transistor includes: providing a substrate; forming an amorphous silicon layer on the substrate; performing a first annealing process on the substrate and crystallizing the amorphous silicon layer into a polysilicon layer; patterning the polysilicon layer to form first and second semiconductor layers; implanting first impurities into the first and second semiconductor layers; implanting second impurities into the first or second semiconductor layer; and performing a second annealing process on the semiconductor layers to remove the metal catalyst remaining in the first or second semiconductor layer, on which the second impurities are implanted, wherein the first impurities are implanted at a dose of 6×1013/cm2 to 5×1015/cm2, and the second impurities are implanted at a dose of 1×1011/cm2 to 3×1015/cm2.
    • 制造CMOS薄膜晶体管的方法包括:提供衬底; 在所述基板上形成非晶硅层; 在所述衬底上进行第一退火处理并将所述非晶硅层结晶成多晶硅层; 图案化多晶硅层以形成第一和第二半导体层; 将第一杂质注入到第一和第二半导体层中; 将第二杂质注入第一或第二半导体层; 以及对所述半导体层进行第二退火处理,以去除留在其中注入所述第二杂质的所述第一或第二半导体层中的金属催化剂,其中所述第一杂质以6×10 13 / cm 2至5× 1015 / cm2,第1杂质以1×10 11 / cm 2的剂量注入3×1015 / cm 2。