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71. 发明授权

US4903112A Semiconductor component with contact hole 失效
标题翻译：半导体元件带接触孔
公开(公告)号：US4903112A
公开(公告)日：1990-02-20
申请号：US212365
申请日：1988-06-22
申请人： Helmut Strack , Gottfried Schuh
发明人： Helmut Strack , Gottfried Schuh
IPC分类号： H01L29/78 , H01L21/285 , H01L21/331 , H01L21/336 , H01L23/485 , H01L29/08 , H01L29/41 , H01L29/73
CPC分类号： H01L29/0847 , H01L21/28531 , H01L23/485 , H01L2924/0002 , Y10S257/914
摘要： A semiconductor component. The semiconductor component has two superimposed semiconductor layers of different conduction materials. An upper layer is provided with an opening through which a lower layer is exposed. A space saving scheme for connecting electrically the two layers is provided, by depositing a connecting layer which contacts the upper layer at an edge only and the lower layer is contacted at its depth where its doping material maximum is located. This requires a doping equal to or greater than 10.sup.19 cm.sup.-3 for the upper layer, which is dependent on thickness.
摘要翻译：半导体元件。半导体元件具有不同导电材料的两个重叠的半导体层。上层设置有暴露下层的开口。通过沉积仅在边缘处接触上层的连接层，并且下层在其最大掺杂材料所在的深度处接触来提供用于连接两层电气的节省空间的方案。对于上层，这需要等于或大于1019cm-3的掺杂，其取决于厚度。

72. 发明授权

US4612448A Electronic switch 失效
标题翻译：电子开关
公开(公告)号：US4612448A
公开(公告)日：1986-09-16
申请号：US698000
申请日：1985-02-04
申请人： Helmut Strack
发明人： Helmut Strack
IPC分类号： H03K17/687 , H03K17/04 , H03K17/567 , H03K17/732 , H03K17/72
CPC分类号： H03K17/0406 , H03K17/567
摘要： Connected in series with a thyristor (1) are two IGFETs (2, 3) one to the anode side and the other to the cathode side. Between the inner thyristor zones (6, 8) and the outer IGFET connections, a threshold circuit (10, 11) is connected to each. The threshold voltage of the threshold circuit is higher than that of the p-n junctions between the outer and adjacent inner thyristor zones (6, 7; 8, 9) including the voltage drop of the conducting IGFET. The switch is turned off by operating to turn off the IGFETs. The current then flows via the threshold elements through the two inner zones (6, 8). The charge carriers of this diode are evacuated very quickly, since carrier injection from the outer zones is no longer possible.
摘要翻译：与晶闸管（1）串联连接的是两个IGFET（2,3），一个连接到阳极侧，另一个连接到阴极侧。在内部可控硅区域（6,8）和外部IGFET连接之间，连接有阈值电路（10,11）。阈值电路的阈值电压高于包括导电IGFET的电压降的外部和相邻的内部可控硅区域（6,7; 8,9）之间的p-n结的阈值电压。通过操作关闭开关即可关闭IGFET。电流然后通过两个内部区域（6,8）通过阈值元件流动。这种二极管的电荷载体被非常快地抽真空，因为从外部区域的载流子注入是不可能的。

73. 发明授权

US4543596A Insulated-gate field-effect transistor (IGFET) with injector zone 失效
标题翻译：具有注入区的绝缘栅场效应晶体管（IGFET）
公开(公告)号：US4543596A
公开(公告)日：1985-09-24
申请号：US510081
申请日：1983-06-30
申请人： Helmut Strack , Jeno Tihanyi
发明人： Helmut Strack , Jeno Tihanyi
IPC分类号： H01L29/78 , H01L21/331 , H01L29/10 , H01L29/73 , H01L29/739 , H01L27/02
CPC分类号： H01L29/1095 , H01L29/7393 , H01L29/7803
摘要： An IGFET assembly, includes a semiconductor substrate of a given first conductivity type having first and second surfaces, an IGFET having at least one channel zone of a second conductivity type opposite the first given conductivity type embedded in the first surface of the substrate, a source zone of the first conductivity type embedded planar in the channel zone, a drain zone adjacent the first surface of the substrate, a drain electrode connected to the second surface of the substrate, an insulating layer disposed on the first surface of the substrate, at least one gate electrode disposed on the insulating layer, at least one injector zone of the second conductivity type embedded in the first surface of the substrate, a contact for connecting the injector zone to a voltage source, an emitter zone of the first conductivity type embedded in the injector zone, the emitter zone having a heavier doping than the injector zone, the injector zone including a part thereof emerging to the first surface of the substrate, the drain zone having a part thereof emerging to the first surface of the substrate between the channel zone and the injector zone, the parts of the injector and drain zones emerging to the first surface of the substrate being covered by the gate electrode, and the injector zone having a surface and having a doping, at least at the surface thereof, forming a channel in the surface of the injector zone connecting the drain zone to the emitter zone when a voltage is present switching the IGFET into conduction.
摘要翻译： IGFET组件包括具有第一和第二表面的给定第一导电类型的半导体衬底，具有至少一个第二导电类型的沟道区的IGFET，所述第二导电类型与嵌入衬底的第一表面中的第一给定导电类型相反，源极在沟道区中嵌入平面的第一导电类型的区域，与衬底的第一表面相邻的漏极区域，连接到衬底的第二表面的漏极电极，至少设置在衬底的第一表面上的绝缘层设置在所述绝缘层上的一个栅电极，嵌入在所述基板的第一表面中的至少一个第二导电类型的注入区，用于将所述注入区连接到电压源的接触点，所述第一导电类型的发射极区嵌入喷射器区域，发射区具有比喷射器区域更重的掺杂，喷射器区域包括其出现到冷杉的部分衬底的表面，排水区具有其一部分在通道区域和喷射器区域之间出现在衬底的第一表面上，出射到衬底的第一表面的喷射器和排出区域的部分被栅电极和具有表面并且具有掺杂的注入器区域，至少在其表面处，当存在电压切换IGFET导通时，在连接漏区与发射区的喷射器区域的表面中形成通道。

74. 发明申请

US20100264523A1 Panel, Semiconductor Device and Method for the Production Thereof 有权
标题翻译：面板，半导体器件及其制造方法
公开(公告)号：US20100264523A1
公开(公告)日：2010-10-21
申请号：US12828327
申请日：2010-07-01
申请人： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
发明人： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
IPC分类号： H01L23/552 , H01L23/485
CPC分类号： H01L23/552 , H01L23/3114 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/82 , H01L24/97 , H01L2224/05001 , H01L2224/05022 , H01L2224/05147 , H01L2224/05572 , H01L2224/05647 , H01L2224/16225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/12041 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , H01L2924/19107 , H01L2924/3025 , H01L2224/82 , H01L2924/00 , H01L2224/45099
摘要： A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.
摘要翻译：面板具有具有上部第一金属层和多个垂直半导体部件的基板。每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。半导体部件的第二面分别安装在基板的金属层上。半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。第二金属层布置在半导体部件之间的分离区域中。

75. 发明申请

US20070023881A1 Semiconductor Wafer with a Wiring Structure, a Semiconductor Component, and Methods for Their Production 有权
标题翻译：具有接线结构的半导体晶片，半导体元件及其制造方法
公开(公告)号：US20070023881A1
公开(公告)日：2007-02-01
申请号：US11427204
申请日：2006-06-28
申请人： Helmut Strack
发明人： Helmut Strack
IPC分类号： H01L23/02 , H01L21/00
CPC分类号： H01L21/6835 , H01L21/76256 , H01L21/76834 , H01L21/76838 , H01L29/417 , H01L29/456 , H01L29/861 , H01L2221/6834 , H01L2221/6835 , H01L2221/68363 , H01L2924/0002 , Y10S438/977 , H01L2924/00
摘要： A semiconductor wafer is provided with a wiring structure, and semiconductor chip positions arranged in rows and columns. The semiconductor wafer has at least one coating (6) as a self-supporting dimensionally stable substrate layer (4), and/or as a wiring structure composed of conductive, high-temperature-resistant material. The coating material (6) of the substrate layer (4) and/or of the wiring structure has a ternary carbide and/or a ternary nitride and/or carbon.
摘要翻译：半导体晶片设置有布线结构，半导体芯片位置配置成行和列。半导体晶片具有至少一个作为自支撑尺寸稳定的基板层（4）的涂层（6），和/或作为由导电的耐高温材料构成的布线结构。衬底层（4）和/或布线结构的涂层材料（6）具有三元碳化物和/或三元氮化物和/或碳。

76. 发明申请

US20060180932A1 Component arrangement for series terminal for high-voltage applications 审中-公开
标题翻译：用于高压应用的串联端子的组件布置
公开(公告)号：US20060180932A1
公开(公告)日：2006-08-17
申请号：US11328595
申请日：2006-01-10
申请人： Ralf Otremba , Khalil Hosseini , Helmut Strack
发明人： Ralf Otremba , Khalil Hosseini , Helmut Strack
IPC分类号： H01L23/52
CPC分类号： H01L24/72 , H01L23/051 , H01L23/4334 , H01L23/49562 , H01L24/48 , H01L25/117 , H01L2224/48472 , H01L2924/00014 , H01L2924/01005 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/09701 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/1815 , H01L2924/19043 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： One embodiment of the invention relates to a component arrangement having a semiconductor chip, a chip carrier, a contact piece and a package. The semiconductor chip includes a first load terminal, a second load terminal and a control terminal, with the first load terminal and the second load terminal being arranged on mutually opposite sides of the semiconductor chip. The semiconductor chip is arranged on the chip carrier and is electrically and thermally conductively connected to the first load terminal. The contact piece is arranged on the second load terminal and is electrically and thermally conductively connected to it. The package is formed from a dielectric compound, which surrounds the semiconductor chip, the chip carrier and the contact piece. The chip carrier is exposed on a first side of the package, the contact piece is exposed on a second side of the package opposite the first side. A connecting leg is passed out of the package and is electrically conductively connected to the control terminal. One embodiment of the invention furthermore relates to a component cascade, in which a plurality of component arrangements are arranged on one another in the form of a stack.
摘要翻译：本发明的一个实施例涉及具有半导体芯片，芯片载体，接触片和封装的部件布置。半导体芯片包括第一负载端子，第二负载端子和控制端子，其中第一负载端子和第二负载端子布置在半导体芯片的相对的相对侧上。半导体芯片布置在芯片载体上并且电和热导电地连接到第一负载端子。接触件布置在第二负载端子上，并且与导电连接。封装由围绕半导体芯片，芯片载体和接触片的电介质化合物形成。芯片载体暴露在封装的第一侧上，接触件暴露在与第一侧相对的封装的第二侧上。连接腿从包装件中流出并与导电连接到控制端子。本发明的一个实施例还涉及一种组件级联，其中多个组件布置以堆叠的形式彼此布置。

77. 发明授权

US06828609B2 High-voltage semiconductor component 有权
标题翻译：高压半导体元件
公开(公告)号：US06828609B2
公开(公告)日：2004-12-07
申请号：US10455834
申请日：2003-06-06
申请人： Gerald Deboy , Dirk Ahlers , Helmut Strack , Michael Rueb , Hans Martin Weber
发明人： Gerald Deboy , Dirk Ahlers , Helmut Strack , Michael Rueb , Hans Martin Weber
IPC分类号： H01L2980
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/0696 , H01L29/41766 , H01L29/4232 , H01L29/4238 , H01L29/7801 , H01L29/7802
摘要： A semiconductor component having a semiconductor body comprises a blocking pn junction, a source zone of a first conductivity type and bordering on a zone forming the blocking pn junction of a second conductivity type complementary to the first conductivity type, and a drain zone of the first conductivity type. The side of the zone of the second conductivity type faces the drain zone forming a first surface, and in the region between the first surface and a second surface areas of the first and second conductivity type are nested in one another. The areas of the first and second conductivity type are variably so doped that near the first surface doping atoms of the second conductivity type predominate, and near the second surface doping atoms of the first conductivity type predominate. Furthermore a plurality of floating zones of the first and second conductivity type is provided.
摘要翻译：具有半导体主体的半导体部件包括阻挡pn结，第一导电类型的源极区域，并且与形成与第一导电类型互补的第二导电类型的阻挡pn结的区域接合，并且第一导电类型的漏极区域导电类型。第二导电类型的区域侧面对排水区，形成第一表面，并且在第一表面和第一和第二导电类型的第二表面区域之间的区域彼此嵌套。第一和第二导电类型的区域是可变地掺杂的，在第一表面附近，第二导电类型的掺杂原子占主导地位，并且在第二表面附近，第一导电类型的掺杂原子占主导地位。此外，提供了第一和第二导电类型的多个浮动区域。

78. 发明授权

US06812524B2 Field effect controlled semiconductor component 有权
标题翻译：场效应控制半导体元件
公开(公告)号：US06812524B2
公开(公告)日：2004-11-02
申请号：US10013999
申请日：2001-12-11
申请人： Dirk Ahlers , Jens-Peer Stengl , Jenoe Tihanyi , Hans Weber , Gerald Deboy , Helmut Strack , Armin Willmeroth
发明人： Dirk Ahlers , Jens-Peer Stengl , Jenoe Tihanyi , Hans Weber , Gerald Deboy , Helmut Strack , Armin Willmeroth
IPC分类号： H01L2976
CPC分类号： H01L29/7802 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/1095 , H01L29/41766 , H01L29/7816
摘要： A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.
摘要翻译：半导体部件包括形成在半导体本体中的第一和第二连接区域，围绕半导体主体中的第二连接区域的沟道区域以及形成在沟道区域和第一连接区域之间并且包含补偿区域的漂移路径。补偿区相对于漂移区具有互补导电类型并且包括至少两个段。选择两个相邻段之间的距离，使得这些段之间的穿通电压位于对应于位于额定电流和额定电流两倍之间的电流处的漂移路径上的电压降所假定的电压范围的电压范围当前。

79. 发明授权

US06649459B2 Method for manufacturing a semiconductor component 有权
标题翻译：半导体部件的制造方法
公开(公告)号：US06649459B2
公开(公告)日：2003-11-18
申请号：US09817594
申请日：2001-03-26
申请人： Gerald Deboy , Wolfgang Friza , Oliver Häberlen , Michael Rüb , Helmut Strack
发明人： Gerald Deboy , Wolfgang Friza , Oliver Häberlen , Michael Rüb , Helmut Strack
IPC分类号： H01L21338
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/1095 , H01L29/41766
摘要： The invention relates to a method for producing a semiconductor component including semiconductor areas of different conductivity types which are alternately positioned in a semiconductor body. The semiconductor areas of different conductivity types extend at least from one first zone to a position near a second zone. Because of variable doping in trenches and in the trench fillings, an electric field is generated which increases from both the first zone and the second zone.
摘要翻译：本发明涉及一种用于制造半导体元件的方法，该半导体元件包括交替地位于半导体本体中的不同导电类型的半导体区域。不同导电类型的半导体区域至少从一个第一区延伸到靠近第二区的位置。由于沟槽和沟槽填充中的可变掺杂，产生从第一区和第二区两者增加的电场。

80. 发明授权

US06225643B1 SOI cell and method for producing it 有权
标题翻译： SOI电池及其制造方法
公开(公告)号：US06225643B1
公开(公告)日：2001-05-01
申请号：US09158248
申请日：1998-09-22
申请人： Jenoe Tihanyi , Helmut Strack
发明人： Jenoe Tihanyi , Helmut Strack
IPC分类号： H01L2904
CPC分类号： H01L29/7802 , H01L29/0649 , H01L29/0653 , H01L29/1095 , H01L29/41766 , H01L29/6634 , H01L29/7395 , H01L29/7396
摘要： An SOI cell includes a semiconductor body having at least one insulator layer. A polycrystalline zone doped with a dopant of a first conductivity type is grown on the insulator layer. The polycrystalline zone is adjoined outside the region of the insulator layer by a semiconductor region, which is doped with the dopant of the first conduction type that has been diffused out of the polycrystalline zone. A dopant source having a dopant of a second conductivity type is also provided. A zone having the dopant of the second conductivity type is formed by diffusing the dopant out of the dopant source.
摘要翻译： SOI单元包括具有至少一个绝缘体层的半导体本体。在绝缘体层上生长掺杂有第一导电类型的掺杂剂的多晶区。多晶区域通过半导体区域与绝缘体层的区域相邻，该半导体区域掺杂有已经扩散到多晶区域的第一导电类型的掺杂剂。还提供了具有第二导电类型的掺杂剂的掺杂剂源。通过将掺杂剂从掺杂剂源扩散出来，形成具有第二导电类型的掺杂剂的区域。

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